1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 define void @and_i1() {entry: ret void} 6 define void @and_i8() {entry: ret void} 7 define void @and_i16() {entry: ret void} 8 define void @and_i32() {entry: ret void} 9 define void @and_i64() {entry: ret void} 10 define void @or_i1() {entry: ret void} 11 define void @or_i8() {entry: ret void} 12 define void @or_i16() {entry: ret void} 13 define void @or_i32() {entry: ret void} 14 define void @or_i64() {entry: ret void} 15 define void @xor_i1() {entry: ret void} 16 define void @xor_i8() {entry: ret void} 17 define void @xor_i16() {entry: ret void} 18 define void @xor_i32() {entry: ret void} 19 define void @xor_i64() {entry: ret void} 20 define void @shl(i32) {entry: ret void} 21 define void @ashr(i32) {entry: ret void} 22 define void @lshr(i32) {entry: ret void} 23 define void @lshr_i64_shift_amount(i32) {entry: ret void} 24 define void @shlv(i32, i32) {entry: ret void} 25 define void @ashrv(i32, i32) {entry: ret void} 26 define void @lshrv(i32, i32) {entry: ret void} 27 define void @shl_i16() {entry: ret void} 28 define void @ashr_i8() {entry: ret void} 29 define void @lshr_i16() {entry: ret void} 30 define void @shl_i64() {entry: ret void} 31 define void @ashl_i64() {entry: ret void} 32 define void @lshr_i64() {entry: ret void} 33 34... 35--- 36name: and_i1 37alignment: 4 38tracksRegLiveness: true 39body: | 40 bb.1.entry: 41 liveins: $a0, $a1 42 43 ; MIPS32-LABEL: name: and_i1 44 ; MIPS32: liveins: $a0, $a1 45 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 46 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 47 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 48 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 49 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] 50 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) 51 ; MIPS32: $v0 = COPY [[COPY4]](s32) 52 ; MIPS32: RetRA implicit $v0 53 %2:_(s32) = COPY $a0 54 %0:_(s1) = G_TRUNC %2(s32) 55 %3:_(s32) = COPY $a1 56 %1:_(s1) = G_TRUNC %3(s32) 57 %4:_(s1) = G_AND %1, %0 58 %5:_(s32) = G_ANYEXT %4(s1) 59 $v0 = COPY %5(s32) 60 RetRA implicit $v0 61 62... 63--- 64name: and_i8 65alignment: 4 66tracksRegLiveness: true 67body: | 68 bb.1.entry: 69 liveins: $a0, $a1 70 71 ; MIPS32-LABEL: name: and_i8 72 ; MIPS32: liveins: $a0, $a1 73 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 74 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 75 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 76 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 77 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] 78 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) 79 ; MIPS32: $v0 = COPY [[COPY4]](s32) 80 ; MIPS32: RetRA implicit $v0 81 %2:_(s32) = COPY $a0 82 %0:_(s8) = G_TRUNC %2(s32) 83 %3:_(s32) = COPY $a1 84 %1:_(s8) = G_TRUNC %3(s32) 85 %4:_(s8) = G_AND %1, %0 86 %5:_(s32) = G_ANYEXT %4(s8) 87 $v0 = COPY %5(s32) 88 RetRA implicit $v0 89 90... 91--- 92name: and_i16 93alignment: 4 94tracksRegLiveness: true 95body: | 96 bb.1.entry: 97 liveins: $a0, $a1 98 99 ; MIPS32-LABEL: name: and_i16 100 ; MIPS32: liveins: $a0, $a1 101 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 102 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 103 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 104 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 105 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]] 106 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32) 107 ; MIPS32: $v0 = COPY [[COPY4]](s32) 108 ; MIPS32: RetRA implicit $v0 109 %2:_(s32) = COPY $a0 110 %0:_(s16) = G_TRUNC %2(s32) 111 %3:_(s32) = COPY $a1 112 %1:_(s16) = G_TRUNC %3(s32) 113 %4:_(s16) = G_AND %1, %0 114 %5:_(s32) = G_ANYEXT %4(s16) 115 $v0 = COPY %5(s32) 116 RetRA implicit $v0 117 118... 119--- 120name: and_i32 121alignment: 4 122tracksRegLiveness: true 123body: | 124 bb.1.entry: 125 liveins: $a0, $a1 126 127 ; MIPS32-LABEL: name: and_i32 128 ; MIPS32: liveins: $a0, $a1 129 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 130 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 131 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]] 132 ; MIPS32: $v0 = COPY [[AND]](s32) 133 ; MIPS32: RetRA implicit $v0 134 %0:_(s32) = COPY $a0 135 %1:_(s32) = COPY $a1 136 %2:_(s32) = G_AND %1, %0 137 $v0 = COPY %2(s32) 138 RetRA implicit $v0 139 140... 141--- 142name: and_i64 143alignment: 4 144tracksRegLiveness: true 145body: | 146 bb.1.entry: 147 liveins: $a0, $a1, $a2, $a3 148 149 ; MIPS32-LABEL: name: and_i64 150 ; MIPS32: liveins: $a0, $a1, $a2, $a3 151 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 152 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 153 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 154 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 155 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY]] 156 ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[COPY1]] 157 ; MIPS32: $v0 = COPY [[AND]](s32) 158 ; MIPS32: $v1 = COPY [[AND1]](s32) 159 ; MIPS32: RetRA implicit $v0, implicit $v1 160 %2:_(s32) = COPY $a0 161 %3:_(s32) = COPY $a1 162 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 163 %4:_(s32) = COPY $a2 164 %5:_(s32) = COPY $a3 165 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 166 %6:_(s64) = G_AND %1, %0 167 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 168 $v0 = COPY %7(s32) 169 $v1 = COPY %8(s32) 170 RetRA implicit $v0, implicit $v1 171 172... 173--- 174name: or_i1 175alignment: 4 176tracksRegLiveness: true 177body: | 178 bb.1.entry: 179 liveins: $a0, $a1 180 181 ; MIPS32-LABEL: name: or_i1 182 ; MIPS32: liveins: $a0, $a1 183 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 184 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 185 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 186 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 187 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] 188 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 189 ; MIPS32: $v0 = COPY [[COPY4]](s32) 190 ; MIPS32: RetRA implicit $v0 191 %2:_(s32) = COPY $a0 192 %0:_(s1) = G_TRUNC %2(s32) 193 %3:_(s32) = COPY $a1 194 %1:_(s1) = G_TRUNC %3(s32) 195 %4:_(s1) = G_OR %1, %0 196 %5:_(s32) = G_ANYEXT %4(s1) 197 $v0 = COPY %5(s32) 198 RetRA implicit $v0 199 200... 201--- 202name: or_i8 203alignment: 4 204tracksRegLiveness: true 205body: | 206 bb.1.entry: 207 liveins: $a0, $a1 208 209 ; MIPS32-LABEL: name: or_i8 210 ; MIPS32: liveins: $a0, $a1 211 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 212 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 213 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 214 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 215 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] 216 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 217 ; MIPS32: $v0 = COPY [[COPY4]](s32) 218 ; MIPS32: RetRA implicit $v0 219 %2:_(s32) = COPY $a0 220 %0:_(s8) = G_TRUNC %2(s32) 221 %3:_(s32) = COPY $a1 222 %1:_(s8) = G_TRUNC %3(s32) 223 %4:_(s8) = G_OR %1, %0 224 %5:_(s32) = G_ANYEXT %4(s8) 225 $v0 = COPY %5(s32) 226 RetRA implicit $v0 227 228... 229--- 230name: or_i16 231alignment: 4 232tracksRegLiveness: true 233body: | 234 bb.1.entry: 235 liveins: $a0, $a1 236 237 ; MIPS32-LABEL: name: or_i16 238 ; MIPS32: liveins: $a0, $a1 239 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 240 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 241 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 242 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 243 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]] 244 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 245 ; MIPS32: $v0 = COPY [[COPY4]](s32) 246 ; MIPS32: RetRA implicit $v0 247 %2:_(s32) = COPY $a0 248 %0:_(s16) = G_TRUNC %2(s32) 249 %3:_(s32) = COPY $a1 250 %1:_(s16) = G_TRUNC %3(s32) 251 %4:_(s16) = G_OR %1, %0 252 %5:_(s32) = G_ANYEXT %4(s16) 253 $v0 = COPY %5(s32) 254 RetRA implicit $v0 255 256... 257--- 258name: or_i32 259alignment: 4 260tracksRegLiveness: true 261body: | 262 bb.1.entry: 263 liveins: $a0, $a1 264 265 ; MIPS32-LABEL: name: or_i32 266 ; MIPS32: liveins: $a0, $a1 267 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 268 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 269 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]] 270 ; MIPS32: $v0 = COPY [[OR]](s32) 271 ; MIPS32: RetRA implicit $v0 272 %0:_(s32) = COPY $a0 273 %1:_(s32) = COPY $a1 274 %2:_(s32) = G_OR %1, %0 275 $v0 = COPY %2(s32) 276 RetRA implicit $v0 277 278... 279--- 280name: or_i64 281alignment: 4 282tracksRegLiveness: true 283body: | 284 bb.1.entry: 285 liveins: $a0, $a1, $a2, $a3 286 287 ; MIPS32-LABEL: name: or_i64 288 ; MIPS32: liveins: $a0, $a1, $a2, $a3 289 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 290 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 291 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 292 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 293 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY]] 294 ; MIPS32: [[OR1:%[0-9]+]]:_(s32) = G_OR [[COPY3]], [[COPY1]] 295 ; MIPS32: $v0 = COPY [[OR]](s32) 296 ; MIPS32: $v1 = COPY [[OR1]](s32) 297 ; MIPS32: RetRA implicit $v0, implicit $v1 298 %2:_(s32) = COPY $a0 299 %3:_(s32) = COPY $a1 300 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 301 %4:_(s32) = COPY $a2 302 %5:_(s32) = COPY $a3 303 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 304 %6:_(s64) = G_OR %1, %0 305 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 306 $v0 = COPY %7(s32) 307 $v1 = COPY %8(s32) 308 RetRA implicit $v0, implicit $v1 309 310... 311--- 312name: xor_i1 313alignment: 4 314tracksRegLiveness: true 315body: | 316 bb.1.entry: 317 liveins: $a0, $a1 318 319 ; MIPS32-LABEL: name: xor_i1 320 ; MIPS32: liveins: $a0, $a1 321 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 322 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 323 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 324 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 325 ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 326 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 327 ; MIPS32: $v0 = COPY [[COPY4]](s32) 328 ; MIPS32: RetRA implicit $v0 329 %2:_(s32) = COPY $a0 330 %0:_(s1) = G_TRUNC %2(s32) 331 %3:_(s32) = COPY $a1 332 %1:_(s1) = G_TRUNC %3(s32) 333 %4:_(s1) = G_XOR %1, %0 334 %5:_(s32) = G_ANYEXT %4(s1) 335 $v0 = COPY %5(s32) 336 RetRA implicit $v0 337 338... 339--- 340name: xor_i8 341alignment: 4 342tracksRegLiveness: true 343body: | 344 bb.1.entry: 345 liveins: $a0, $a1 346 347 ; MIPS32-LABEL: name: xor_i8 348 ; MIPS32: liveins: $a0, $a1 349 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 350 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 351 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 352 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 353 ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 354 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 355 ; MIPS32: $v0 = COPY [[COPY4]](s32) 356 ; MIPS32: RetRA implicit $v0 357 %2:_(s32) = COPY $a0 358 %0:_(s8) = G_TRUNC %2(s32) 359 %3:_(s32) = COPY $a1 360 %1:_(s8) = G_TRUNC %3(s32) 361 %4:_(s8) = G_XOR %1, %0 362 %5:_(s32) = G_ANYEXT %4(s8) 363 $v0 = COPY %5(s32) 364 RetRA implicit $v0 365 366... 367--- 368name: xor_i16 369alignment: 4 370tracksRegLiveness: true 371body: | 372 bb.1.entry: 373 liveins: $a0, $a1 374 375 ; MIPS32-LABEL: name: xor_i16 376 ; MIPS32: liveins: $a0, $a1 377 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 378 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 379 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 380 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 381 ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 382 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 383 ; MIPS32: $v0 = COPY [[COPY4]](s32) 384 ; MIPS32: RetRA implicit $v0 385 %2:_(s32) = COPY $a0 386 %0:_(s16) = G_TRUNC %2(s32) 387 %3:_(s32) = COPY $a1 388 %1:_(s16) = G_TRUNC %3(s32) 389 %4:_(s16) = G_XOR %1, %0 390 %5:_(s32) = G_ANYEXT %4(s16) 391 $v0 = COPY %5(s32) 392 RetRA implicit $v0 393 394... 395--- 396name: xor_i32 397alignment: 4 398tracksRegLiveness: true 399body: | 400 bb.1.entry: 401 liveins: $a0, $a1 402 403 ; MIPS32-LABEL: name: xor_i32 404 ; MIPS32: liveins: $a0, $a1 405 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 406 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 407 ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]] 408 ; MIPS32: $v0 = COPY [[XOR]](s32) 409 ; MIPS32: RetRA implicit $v0 410 %0:_(s32) = COPY $a0 411 %1:_(s32) = COPY $a1 412 %2:_(s32) = G_XOR %1, %0 413 $v0 = COPY %2(s32) 414 RetRA implicit $v0 415 416... 417--- 418name: xor_i64 419alignment: 4 420tracksRegLiveness: true 421body: | 422 bb.1.entry: 423 liveins: $a0, $a1, $a2, $a3 424 425 ; MIPS32-LABEL: name: xor_i64 426 ; MIPS32: liveins: $a0, $a1, $a2, $a3 427 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 428 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 429 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 430 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 431 ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY]] 432 ; MIPS32: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[COPY1]] 433 ; MIPS32: $v0 = COPY [[XOR]](s32) 434 ; MIPS32: $v1 = COPY [[XOR1]](s32) 435 ; MIPS32: RetRA implicit $v0, implicit $v1 436 %2:_(s32) = COPY $a0 437 %3:_(s32) = COPY $a1 438 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 439 %4:_(s32) = COPY $a2 440 %5:_(s32) = COPY $a3 441 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 442 %6:_(s64) = G_XOR %1, %0 443 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 444 $v0 = COPY %7(s32) 445 $v1 = COPY %8(s32) 446 RetRA implicit $v0, implicit $v1 447 448... 449--- 450name: shl 451alignment: 4 452tracksRegLiveness: true 453body: | 454 bb.1.entry: 455 liveins: $a0 456 457 ; MIPS32-LABEL: name: shl 458 ; MIPS32: liveins: $a0 459 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 460 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 461 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32) 462 ; MIPS32: $v0 = COPY [[SHL]](s32) 463 ; MIPS32: RetRA implicit $v0 464 %0:_(s32) = COPY $a0 465 %1:_(s32) = G_CONSTANT i32 1 466 %2:_(s32) = G_SHL %0, %1 467 $v0 = COPY %2(s32) 468 RetRA implicit $v0 469 470... 471--- 472name: ashr 473alignment: 4 474tracksRegLiveness: true 475body: | 476 bb.1.entry: 477 liveins: $a0 478 479 ; MIPS32-LABEL: name: ashr 480 ; MIPS32: liveins: $a0 481 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 482 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 483 ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32) 484 ; MIPS32: $v0 = COPY [[ASHR]](s32) 485 ; MIPS32: RetRA implicit $v0 486 %0:_(s32) = COPY $a0 487 %1:_(s32) = G_CONSTANT i32 1 488 %2:_(s32) = G_ASHR %0, %1 489 $v0 = COPY %2(s32) 490 RetRA implicit $v0 491 492... 493--- 494name: lshr 495alignment: 4 496tracksRegLiveness: true 497body: | 498 bb.1.entry: 499 liveins: $a0 500 501 ; MIPS32-LABEL: name: lshr 502 ; MIPS32: liveins: $a0 503 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 504 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 505 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 506 ; MIPS32: $v0 = COPY [[LSHR]](s32) 507 ; MIPS32: RetRA implicit $v0 508 %0:_(s32) = COPY $a0 509 %1:_(s32) = G_CONSTANT i32 1 510 %2:_(s32) = G_LSHR %0, %1 511 $v0 = COPY %2(s32) 512 RetRA implicit $v0 513 514... 515--- 516name: lshr_i64_shift_amount 517alignment: 4 518tracksRegLiveness: true 519body: | 520 bb.1.entry: 521 liveins: $a0 522 523 ; MIPS32-LABEL: name: lshr_i64_shift_amount 524 ; MIPS32: liveins: $a0 525 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 526 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 527 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 528 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 529 ; MIPS32: $v0 = COPY [[LSHR]](s32) 530 ; MIPS32: RetRA implicit $v0 531 %0:_(s32) = COPY $a0 532 %1:_(s64) = G_CONSTANT i64 1 533 %2:_(s32) = G_LSHR %0, %1 534 $v0 = COPY %2(s32) 535 RetRA implicit $v0 536 537... 538--- 539name: shlv 540alignment: 4 541tracksRegLiveness: true 542body: | 543 bb.1.entry: 544 liveins: $a0, $a1 545 546 ; MIPS32-LABEL: name: shlv 547 ; MIPS32: liveins: $a0, $a1 548 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 549 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 550 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]](s32) 551 ; MIPS32: $v0 = COPY [[SHL]](s32) 552 ; MIPS32: RetRA implicit $v0 553 %0:_(s32) = COPY $a0 554 %1:_(s32) = COPY $a1 555 %2:_(s32) = G_SHL %0, %1 556 $v0 = COPY %2(s32) 557 RetRA implicit $v0 558 559... 560--- 561name: ashrv 562alignment: 4 563tracksRegLiveness: true 564body: | 565 bb.1.entry: 566 liveins: $a0, $a1 567 568 ; MIPS32-LABEL: name: ashrv 569 ; MIPS32: liveins: $a0, $a1 570 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 571 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 572 ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32) 573 ; MIPS32: $v0 = COPY [[ASHR]](s32) 574 ; MIPS32: RetRA implicit $v0 575 %0:_(s32) = COPY $a0 576 %1:_(s32) = COPY $a1 577 %2:_(s32) = G_ASHR %0, %1 578 $v0 = COPY %2(s32) 579 RetRA implicit $v0 580 581... 582--- 583name: lshrv 584alignment: 4 585tracksRegLiveness: true 586body: | 587 bb.1.entry: 588 liveins: $a0, $a1 589 590 ; MIPS32-LABEL: name: lshrv 591 ; MIPS32: liveins: $a0, $a1 592 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 593 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 594 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32) 595 ; MIPS32: $v0 = COPY [[LSHR]](s32) 596 ; MIPS32: RetRA implicit $v0 597 %0:_(s32) = COPY $a0 598 %1:_(s32) = COPY $a1 599 %2:_(s32) = G_LSHR %0, %1 600 $v0 = COPY %2(s32) 601 RetRA implicit $v0 602 603... 604--- 605name: shl_i16 606alignment: 4 607tracksRegLiveness: true 608body: | 609 bb.1.entry: 610 liveins: $a0 611 612 ; MIPS32-LABEL: name: shl_i16 613 ; MIPS32: liveins: $a0 614 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 615 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 616 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 617 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 618 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 619 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 620 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[AND]](s32) 621 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SHL]](s32) 622 ; MIPS32: $v0 = COPY [[COPY3]](s32) 623 ; MIPS32: RetRA implicit $v0 624 %1:_(s32) = COPY $a0 625 %0:_(s16) = G_TRUNC %1(s32) 626 %2:_(s16) = G_CONSTANT i16 2 627 %3:_(s16) = G_SHL %0, %2(s16) 628 %4:_(s32) = G_ANYEXT %3(s16) 629 $v0 = COPY %4(s32) 630 RetRA implicit $v0 631 632... 633--- 634name: ashr_i8 635alignment: 4 636tracksRegLiveness: true 637body: | 638 bb.1.entry: 639 liveins: $a0 640 641 ; MIPS32-LABEL: name: ashr_i8 642 ; MIPS32: liveins: $a0 643 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 644 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 645 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 646 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 647 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 648 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 649 ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 650 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C2]](s32) 651 ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C2]](s32) 652 ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32) 653 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ASHR1]](s32) 654 ; MIPS32: $v0 = COPY [[COPY3]](s32) 655 ; MIPS32: RetRA implicit $v0 656 %1:_(s32) = COPY $a0 657 %0:_(s8) = G_TRUNC %1(s32) 658 %2:_(s8) = G_CONSTANT i8 2 659 %3:_(s8) = G_ASHR %0, %2(s8) 660 %4:_(s32) = G_ANYEXT %3(s8) 661 $v0 = COPY %4(s32) 662 RetRA implicit $v0 663 664... 665--- 666name: lshr_i16 667alignment: 4 668tracksRegLiveness: true 669body: | 670 bb.1.entry: 671 liveins: $a0 672 673 ; MIPS32-LABEL: name: lshr_i16 674 ; MIPS32: liveins: $a0 675 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 676 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 677 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 678 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 679 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 680 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 681 ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 682 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32) 683 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 684 ; MIPS32: $v0 = COPY [[COPY3]](s32) 685 ; MIPS32: RetRA implicit $v0 686 %1:_(s32) = COPY $a0 687 %0:_(s16) = G_TRUNC %1(s32) 688 %2:_(s16) = G_CONSTANT i16 2 689 %3:_(s16) = G_LSHR %0, %2(s16) 690 %4:_(s32) = G_ANYEXT %3(s16) 691 $v0 = COPY %4(s32) 692 RetRA implicit $v0 693 694... 695--- 696name: shl_i64 697alignment: 4 698tracksRegLiveness: true 699body: | 700 bb.1.entry: 701 liveins: $a0, $a1, $a2, $a3 702 703 ; MIPS32-LABEL: name: shl_i64 704 ; MIPS32: liveins: $a0, $a1, $a2, $a3 705 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 706 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 707 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 708 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 709 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 710 ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]] 711 ; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]] 712 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 713 ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]] 714 ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]] 715 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY2]](s32) 716 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB1]](s32) 717 ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY2]](s32) 718 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]] 719 ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB]](s32) 720 ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 721 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 722 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]] 723 ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C1]] 724 ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 725 ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]] 726 ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[OR]], [[SHL2]] 727 ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) 728 ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]] 729 ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[COPY1]], [[SELECT1]] 730 ; MIPS32: $v0 = COPY [[SELECT]](s32) 731 ; MIPS32: $v1 = COPY [[SELECT2]](s32) 732 ; MIPS32: RetRA implicit $v0, implicit $v1 733 %2:_(s32) = COPY $a0 734 %3:_(s32) = COPY $a1 735 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 736 %4:_(s32) = COPY $a2 737 %5:_(s32) = COPY $a3 738 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 739 %6:_(s64) = G_SHL %0, %1(s64) 740 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 741 $v0 = COPY %7(s32) 742 $v1 = COPY %8(s32) 743 RetRA implicit $v0, implicit $v1 744 745... 746--- 747name: ashl_i64 748alignment: 4 749tracksRegLiveness: true 750body: | 751 bb.1.entry: 752 liveins: $a0, $a1, $a2, $a3 753 754 ; MIPS32-LABEL: name: ashl_i64 755 ; MIPS32: liveins: $a0, $a1, $a2, $a3 756 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 757 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 758 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 759 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 760 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 761 ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]] 762 ; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]] 763 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 764 ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]] 765 ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]] 766 ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY2]](s32) 767 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32) 768 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32) 769 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]] 770 ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 771 ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[C2]](s32) 772 ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[SUB]](s32) 773 ; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 774 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 775 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 776 ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]] 777 ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) 778 ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 779 ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]] 780 ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 781 ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 782 ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]] 783 ; MIPS32: $v0 = COPY [[SELECT1]](s32) 784 ; MIPS32: $v1 = COPY [[SELECT2]](s32) 785 ; MIPS32: RetRA implicit $v0, implicit $v1 786 %2:_(s32) = COPY $a0 787 %3:_(s32) = COPY $a1 788 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 789 %4:_(s32) = COPY $a2 790 %5:_(s32) = COPY $a3 791 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 792 %6:_(s64) = G_ASHR %0, %1(s64) 793 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 794 $v0 = COPY %7(s32) 795 $v1 = COPY %8(s32) 796 RetRA implicit $v0, implicit $v1 797 798... 799--- 800name: lshr_i64 801alignment: 4 802tracksRegLiveness: true 803body: | 804 bb.1.entry: 805 liveins: $a0, $a1, $a2, $a3 806 807 ; MIPS32-LABEL: name: lshr_i64 808 ; MIPS32: liveins: $a0, $a1, $a2, $a3 809 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 810 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 811 ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 812 ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 813 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 814 ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]] 815 ; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]] 816 ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 817 ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]] 818 ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]] 819 ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY2]](s32) 820 ; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32) 821 ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32) 822 ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]] 823 ; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB]](s32) 824 ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 825 ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 826 ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]] 827 ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[LSHR2]] 828 ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) 829 ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]] 830 ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]] 831 ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) 832 ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]] 833 ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[LSHR]], [[C1]] 834 ; MIPS32: $v0 = COPY [[SELECT1]](s32) 835 ; MIPS32: $v1 = COPY [[SELECT2]](s32) 836 ; MIPS32: RetRA implicit $v0, implicit $v1 837 %2:_(s32) = COPY $a0 838 %3:_(s32) = COPY $a1 839 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) 840 %4:_(s32) = COPY $a2 841 %5:_(s32) = COPY $a3 842 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 843 %6:_(s64) = G_LSHR %0, %1(s64) 844 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) 845 $v0 = COPY %7(s32) 846 $v1 = COPY %8(s32) 847 RetRA implicit $v0, implicit $v1 848 849... 850