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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3# RUN: llc -mtriple=mipsel-linux-gnu -run-pass=legalizer -mattr=+mips32r2 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R2
4--- |
5
6  define void @bswap_i32() { entry: ret void }
7  define void @bswap_i64() { entry: ret void }
8
9...
10---
11name:            bswap_i32
12alignment:       4
13tracksRegLiveness: true
14body:             |
15  bb.1.entry:
16    liveins: $a0
17
18    ; MIPS32-LABEL: name: bswap_i32
19    ; MIPS32: liveins: $a0
20    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
21    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
22    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
23    ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
24    ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
25    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65280
26    ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
27    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
28    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C2]](s32)
29    ; MIPS32: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
30    ; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32)
31    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C1]]
32    ; MIPS32: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[AND1]]
33    ; MIPS32: $v0 = COPY [[OR2]](s32)
34    ; MIPS32: RetRA implicit $v0
35    ; MIPS32R2-LABEL: name: bswap_i32
36    ; MIPS32R2: liveins: $a0
37    ; MIPS32R2: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
38    ; MIPS32R2: [[BSWAP:%[0-9]+]]:_(s32) = G_BSWAP [[COPY]]
39    ; MIPS32R2: $v0 = COPY [[BSWAP]](s32)
40    ; MIPS32R2: RetRA implicit $v0
41    %0:_(s32) = COPY $a0
42    %1:_(s32) = G_BSWAP %0
43    $v0 = COPY %1(s32)
44    RetRA implicit $v0
45
46...
47---
48name:            bswap_i64
49alignment:       4
50tracksRegLiveness: true
51body:             |
52  bb.1.entry:
53    liveins: $a0, $a1
54
55    ; MIPS32-LABEL: name: bswap_i64
56    ; MIPS32: liveins: $a0, $a1
57    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
58    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
59    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
60    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
61    ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
62    ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
63    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65280
64    ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
65    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
66    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C2]](s32)
67    ; MIPS32: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
68    ; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
69    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C1]]
70    ; MIPS32: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[AND1]]
71    ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
72    ; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
73    ; MIPS32: [[OR3:%[0-9]+]]:_(s32) = G_OR [[LSHR2]], [[SHL2]]
74    ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
75    ; MIPS32: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C2]](s32)
76    ; MIPS32: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL3]]
77    ; MIPS32: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32)
78    ; MIPS32: [[AND3:%[0-9]+]]:_(s32) = G_AND [[LSHR3]], [[C1]]
79    ; MIPS32: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[AND3]]
80    ; MIPS32: $v0 = COPY [[OR2]](s32)
81    ; MIPS32: $v1 = COPY [[OR5]](s32)
82    ; MIPS32: RetRA implicit $v0, implicit $v1
83    ; MIPS32R2-LABEL: name: bswap_i64
84    ; MIPS32R2: liveins: $a0, $a1
85    ; MIPS32R2: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
86    ; MIPS32R2: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
87    ; MIPS32R2: [[BSWAP:%[0-9]+]]:_(s32) = G_BSWAP [[COPY1]]
88    ; MIPS32R2: [[BSWAP1:%[0-9]+]]:_(s32) = G_BSWAP [[COPY]]
89    ; MIPS32R2: $v0 = COPY [[BSWAP]](s32)
90    ; MIPS32R2: $v1 = COPY [[BSWAP1]](s32)
91    ; MIPS32R2: RetRA implicit $v0, implicit $v1
92    %1:_(s32) = COPY $a0
93    %2:_(s32) = COPY $a1
94    %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
95    %3:_(s64) = G_BSWAP %0
96    %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %3(s64)
97    $v0 = COPY %4(s32)
98    $v1 = COPY %5(s32)
99    RetRA implicit $v0, implicit $v1
100
101...
102