1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32 3 4define i32 @load1_s8_to_zextLoad1_s32(i8* %px) { 5; MIPS32-LABEL: load1_s8_to_zextLoad1_s32: 6; MIPS32: # %bb.0: # %entry 7; MIPS32-NEXT: lbu $2, 0($4) 8; MIPS32-NEXT: jr $ra 9; MIPS32-NEXT: nop 10entry: 11 %0 = load i8, i8* %px 12 %conv = zext i8 %0 to i32 13 ret i32 %conv 14} 15 16define i32 @load2_s16_to_zextLoad2_s32(i16* %px) { 17; MIPS32-LABEL: load2_s16_to_zextLoad2_s32: 18; MIPS32: # %bb.0: # %entry 19; MIPS32-NEXT: lhu $2, 0($4) 20; MIPS32-NEXT: jr $ra 21; MIPS32-NEXT: nop 22entry: 23 %0 = load i16, i16* %px 24 %conv = zext i16 %0 to i32 25 ret i32 %conv 26} 27 28define i16 @load1_s8_to_zextLoad1_s16(i8* %px) { 29; MIPS32-LABEL: load1_s8_to_zextLoad1_s16: 30; MIPS32: # %bb.0: # %entry 31; MIPS32-NEXT: lbu $2, 0($4) 32; MIPS32-NEXT: jr $ra 33; MIPS32-NEXT: nop 34entry: 35 %0 = load i8, i8* %px 36 %conv = zext i8 %0 to i16 37 ret i16 %conv 38} 39 40define zeroext i16 @load1_s8_to_zextLoad1_s16_to_zextLoad1_s32(i8* %px) { 41; MIPS32-LABEL: load1_s8_to_zextLoad1_s16_to_zextLoad1_s32: 42; MIPS32: # %bb.0: # %entry 43; MIPS32-NEXT: lbu $2, 0($4) 44; MIPS32-NEXT: jr $ra 45; MIPS32-NEXT: nop 46entry: 47 %0 = load i8, i8* %px 48 %conv = zext i8 %0 to i16 49 ret i16 %conv 50} 51 52define i64 @load4_s32_to_zextLoad4_s64(i32* %px) { 53; MIPS32-LABEL: load4_s32_to_zextLoad4_s64: 54; MIPS32: # %bb.0: # %entry 55; MIPS32-NEXT: lw $2, 0($4) 56; MIPS32-NEXT: ori $3, $zero, 0 57; MIPS32-NEXT: jr $ra 58; MIPS32-NEXT: nop 59entry: 60 %0 = load i32, i32* %px 61 %conv = zext i32 %0 to i64 62 ret i64 %conv 63} 64 65define i32 @load1_s8_to_sextLoad1_s32(i8* %px) { 66; MIPS32-LABEL: load1_s8_to_sextLoad1_s32: 67; MIPS32: # %bb.0: # %entry 68; MIPS32-NEXT: lb $2, 0($4) 69; MIPS32-NEXT: jr $ra 70; MIPS32-NEXT: nop 71entry: 72 %0 = load i8, i8* %px 73 %conv = sext i8 %0 to i32 74 ret i32 %conv 75} 76 77define i32 @load2_s16_to_sextLoad2_s32(i16* %px) { 78; MIPS32-LABEL: load2_s16_to_sextLoad2_s32: 79; MIPS32: # %bb.0: # %entry 80; MIPS32-NEXT: lh $2, 0($4) 81; MIPS32-NEXT: jr $ra 82; MIPS32-NEXT: nop 83entry: 84 %0 = load i16, i16* %px 85 %conv = sext i16 %0 to i32 86 ret i32 %conv 87} 88 89define i16 @load1_s8_to_sextLoad1_s16(i8* %px) { 90; MIPS32-LABEL: load1_s8_to_sextLoad1_s16: 91; MIPS32: # %bb.0: # %entry 92; MIPS32-NEXT: lb $2, 0($4) 93; MIPS32-NEXT: jr $ra 94; MIPS32-NEXT: nop 95entry: 96 %0 = load i8, i8* %px 97 %conv = sext i8 %0 to i16 98 ret i16 %conv 99} 100 101define signext i16 @load1_s8_to_sextLoad1_s16_to_sextLoad1_s32(i8* %px) { 102; MIPS32-LABEL: load1_s8_to_sextLoad1_s16_to_sextLoad1_s32: 103; MIPS32: # %bb.0: # %entry 104; MIPS32-NEXT: lb $2, 0($4) 105; MIPS32-NEXT: jr $ra 106; MIPS32-NEXT: nop 107entry: 108 %0 = load i8, i8* %px 109 %conv = sext i8 %0 to i16 110 ret i16 %conv 111} 112 113define i64 @load4_s32_to_sextLoad4_s64(i32* %px) { 114; MIPS32-LABEL: load4_s32_to_sextLoad4_s64: 115; MIPS32: # %bb.0: # %entry 116; MIPS32-NEXT: lw $2, 0($4) 117; MIPS32-NEXT: sra $3, $2, 31 118; MIPS32-NEXT: jr $ra 119; MIPS32-NEXT: nop 120entry: 121 %0 = load i32, i32* %px 122 %conv = sext i32 %0 to i64 123 ret i64 %conv 124} 125