1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 define void @select_i32(i32, i32) {entry: ret void} 6 define void @select_ptr(i32, i32) {entry: ret void} 7 define void @select_i64() {entry: ret void} 8 define void @select_ambiguous_i64_in_fpr(i64* %i64_ptr_a, i64* %i64_ptr_b, i64* %i64_ptr_c) {entry: ret void} 9 define void @select_float() {entry: ret void} 10 define void @select_ambiguous_float_in_gpr(float* %f32_ptr_a, float* %f32_ptr_b, float* %f32_ptr_c) {entry: ret void} 11 define void @select_double() {entry: ret void} 12 13... 14--- 15name: select_i32 16alignment: 4 17legalized: true 18tracksRegLiveness: true 19body: | 20 bb.1.entry: 21 liveins: $a0, $a1, $a2 22 23 ; MIPS32-LABEL: name: select_i32 24 ; MIPS32: liveins: $a0, $a1, $a2 25 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 26 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 27 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 28 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 29 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 30 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] 31 ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]] 32 ; MIPS32: $v0 = COPY [[SELECT]](s32) 33 ; MIPS32: RetRA implicit $v0 34 %3:_(s32) = COPY $a0 35 %1:_(s32) = COPY $a1 36 %2:_(s32) = COPY $a2 37 %6:_(s32) = G_CONSTANT i32 1 38 %7:_(s32) = COPY %3(s32) 39 %5:_(s32) = G_AND %7, %6 40 %4:_(s32) = G_SELECT %5(s32), %1, %2 41 $v0 = COPY %4(s32) 42 RetRA implicit $v0 43 44... 45--- 46name: select_ptr 47alignment: 4 48legalized: true 49tracksRegLiveness: true 50body: | 51 bb.1.entry: 52 liveins: $a0, $a1, $a2 53 54 ; MIPS32-LABEL: name: select_ptr 55 ; MIPS32: liveins: $a0, $a1, $a2 56 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 57 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 58 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 59 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 60 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 61 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] 62 ; MIPS32: [[SELECT:%[0-9]+]]:gprb(p0) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]] 63 ; MIPS32: $v0 = COPY [[SELECT]](p0) 64 ; MIPS32: RetRA implicit $v0 65 %3:_(s32) = COPY $a0 66 %1:_(p0) = COPY $a1 67 %2:_(p0) = COPY $a2 68 %6:_(s32) = G_CONSTANT i32 1 69 %7:_(s32) = COPY %3(s32) 70 %5:_(s32) = G_AND %7, %6 71 %4:_(p0) = G_SELECT %5(s32), %1, %2 72 $v0 = COPY %4(p0) 73 RetRA implicit $v0 74 75... 76--- 77name: select_i64 78alignment: 4 79legalized: true 80tracksRegLiveness: true 81fixedStack: 82 - { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true } 83 - { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true } 84body: | 85 bb.1.entry: 86 liveins: $a0, $a2, $a3 87 88 ; MIPS32-LABEL: name: select_i64 89 ; MIPS32: liveins: $a0, $a2, $a3 90 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 91 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a2 92 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a3 93 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 94 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8) 95 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 96 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load 4 from %fixed-stack.1) 97 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 98 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 99 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] 100 ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[LOAD]] 101 ; MIPS32: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY2]], [[LOAD1]] 102 ; MIPS32: $v0 = COPY [[SELECT]](s32) 103 ; MIPS32: $v1 = COPY [[SELECT1]](s32) 104 ; MIPS32: RetRA implicit $v0, implicit $v1 105 %3:_(s32) = COPY $a0 106 %4:_(s32) = COPY $a2 107 %5:_(s32) = COPY $a3 108 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) 109 %8:_(p0) = G_FRAME_INDEX %fixed-stack.1 110 %6:_(s32) = G_LOAD %8(p0) :: (load 4 from %fixed-stack.1, align 8) 111 %9:_(p0) = G_FRAME_INDEX %fixed-stack.0 112 %7:_(s32) = G_LOAD %9(p0) :: (load 4 from %fixed-stack.0) 113 %2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32) 114 %14:_(s32) = G_CONSTANT i32 1 115 %15:_(s32) = COPY %3(s32) 116 %13:_(s32) = G_AND %15, %14 117 %10:_(s64) = G_SELECT %13(s32), %1, %2 118 %11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %10(s64) 119 $v0 = COPY %11(s32) 120 $v1 = COPY %12(s32) 121 RetRA implicit $v0, implicit $v1 122 123... 124--- 125name: select_ambiguous_i64_in_fpr 126alignment: 4 127legalized: true 128tracksRegLiveness: true 129body: | 130 bb.1.entry: 131 liveins: $a0, $a1, $a2, $a3 132 133 ; MIPS32-LABEL: name: select_ambiguous_i64_in_fpr 134 ; MIPS32: liveins: $a0, $a1, $a2, $a3 135 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 136 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 137 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 138 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 139 ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY1]](p0) :: (load 8 from %ir.i64_ptr_a) 140 ; MIPS32: [[LOAD1:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY2]](p0) :: (load 8 from %ir.i64_ptr_b) 141 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 142 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 143 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] 144 ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s32), [[LOAD]], [[LOAD1]] 145 ; MIPS32: G_STORE [[SELECT]](s64), [[COPY3]](p0) :: (store 8 into %ir.i64_ptr_c) 146 ; MIPS32: RetRA 147 %4:_(s32) = COPY $a0 148 %1:_(p0) = COPY $a1 149 %2:_(p0) = COPY $a2 150 %3:_(p0) = COPY $a3 151 %5:_(s64) = G_LOAD %1(p0) :: (load 8 from %ir.i64_ptr_a) 152 %6:_(s64) = G_LOAD %2(p0) :: (load 8 from %ir.i64_ptr_b) 153 %9:_(s32) = G_CONSTANT i32 1 154 %10:_(s32) = COPY %4(s32) 155 %8:_(s32) = G_AND %10, %9 156 %7:_(s64) = G_SELECT %8(s32), %5, %6 157 G_STORE %7(s64), %3(p0) :: (store 8 into %ir.i64_ptr_c) 158 RetRA 159 160... 161--- 162name: select_float 163alignment: 4 164legalized: true 165tracksRegLiveness: true 166body: | 167 bb.1.entry: 168 liveins: $a0, $a1, $a2 169 170 ; MIPS32-LABEL: name: select_float 171 ; MIPS32: liveins: $a0, $a1, $a2 172 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 173 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 174 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 175 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 176 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 177 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] 178 ; MIPS32: [[COPY4:%[0-9]+]]:fprb(s32) = COPY [[COPY1]](s32) 179 ; MIPS32: [[COPY5:%[0-9]+]]:fprb(s32) = COPY [[COPY2]](s32) 180 ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]] 181 ; MIPS32: $f0 = COPY [[SELECT]](s32) 182 ; MIPS32: RetRA implicit $f0 183 %3:_(s32) = COPY $a0 184 %1:_(s32) = COPY $a1 185 %2:_(s32) = COPY $a2 186 %6:_(s32) = G_CONSTANT i32 1 187 %7:_(s32) = COPY %3(s32) 188 %5:_(s32) = G_AND %7, %6 189 %4:_(s32) = G_SELECT %5(s32), %1, %2 190 $f0 = COPY %4(s32) 191 RetRA implicit $f0 192 193... 194--- 195name: select_ambiguous_float_in_gpr 196alignment: 4 197legalized: true 198tracksRegLiveness: true 199body: | 200 bb.1.entry: 201 liveins: $a0, $a1, $a2, $a3 202 203 ; MIPS32-LABEL: name: select_ambiguous_float_in_gpr 204 ; MIPS32: liveins: $a0, $a1, $a2, $a3 205 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 206 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 207 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 208 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 209 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY1]](p0) :: (load 4 from %ir.f32_ptr_a) 210 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY2]](p0) :: (load 4 from %ir.f32_ptr_b) 211 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 212 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) 213 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] 214 ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[LOAD]], [[LOAD1]] 215 ; MIPS32: G_STORE [[SELECT]](s32), [[COPY3]](p0) :: (store 4 into %ir.f32_ptr_c) 216 ; MIPS32: RetRA 217 %4:_(s32) = COPY $a0 218 %1:_(p0) = COPY $a1 219 %2:_(p0) = COPY $a2 220 %3:_(p0) = COPY $a3 221 %5:_(s32) = G_LOAD %1(p0) :: (load 4 from %ir.f32_ptr_a) 222 %6:_(s32) = G_LOAD %2(p0) :: (load 4 from %ir.f32_ptr_b) 223 %9:_(s32) = G_CONSTANT i32 1 224 %10:_(s32) = COPY %4(s32) 225 %8:_(s32) = G_AND %10, %9 226 %7:_(s32) = G_SELECT %8(s32), %5, %6 227 G_STORE %7(s32), %3(p0) :: (store 4 into %ir.f32_ptr_c) 228 RetRA 229 230... 231--- 232name: select_double 233alignment: 4 234legalized: true 235tracksRegLiveness: true 236fixedStack: 237 - { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true } 238body: | 239 bb.1.entry: 240 liveins: $d6, $d7 241 242 ; MIPS32-LABEL: name: select_double 243 ; MIPS32: liveins: $d6, $d7 244 ; MIPS32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 245 ; MIPS32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7 246 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 247 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8) 248 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 249 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[LOAD]](s32) 250 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]] 251 ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s32), [[COPY]], [[COPY1]] 252 ; MIPS32: $d0 = COPY [[SELECT]](s64) 253 ; MIPS32: RetRA implicit $d0 254 %0:_(s64) = COPY $d6 255 %1:_(s64) = COPY $d7 256 %4:_(p0) = G_FRAME_INDEX %fixed-stack.0 257 %3:_(s32) = G_LOAD %4(p0) :: (load 4 from %fixed-stack.0, align 8) 258 %7:_(s32) = G_CONSTANT i32 1 259 %8:_(s32) = COPY %3(s32) 260 %6:_(s32) = G_AND %8, %7 261 %5:_(s64) = G_SELECT %6(s32), %0, %1 262 $d0 = COPY %5(s64) 263 RetRA implicit $d0 264 265... 266