1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600 3--- | 4 5 define void @sub_v16i8(<16 x i8>* %a, <16 x i8>* %b, <16 x i8>* %c) { entry: ret void } 6 define void @sub_v8i16(<8 x i16>* %a, <8 x i16>* %b, <8 x i16>* %c) { entry: ret void } 7 define void @sub_v4i32(<4 x i32>* %a, <4 x i32>* %b, <4 x i32>* %c) { entry: ret void } 8 define void @sub_v2i64(<2 x i64>* %a, <2 x i64>* %b, <2 x i64>* %c) { entry: ret void } 9 10... 11--- 12name: sub_v16i8 13alignment: 4 14legalized: true 15tracksRegLiveness: true 16body: | 17 bb.1.entry: 18 liveins: $a0, $a1, $a2 19 20 ; P5600-LABEL: name: sub_v16i8 21 ; P5600: liveins: $a0, $a1, $a2 22 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 23 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 24 ; P5600: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 25 ; P5600: [[LOAD:%[0-9]+]]:fprb(<16 x s8>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a) 26 ; P5600: [[LOAD1:%[0-9]+]]:fprb(<16 x s8>) = G_LOAD [[COPY1]](p0) :: (load 16 from %ir.b) 27 ; P5600: [[SUB:%[0-9]+]]:fprb(<16 x s8>) = G_SUB [[LOAD1]], [[LOAD]] 28 ; P5600: G_STORE [[SUB]](<16 x s8>), [[COPY2]](p0) :: (store 16 into %ir.c) 29 ; P5600: RetRA 30 %0:_(p0) = COPY $a0 31 %1:_(p0) = COPY $a1 32 %2:_(p0) = COPY $a2 33 %3:_(<16 x s8>) = G_LOAD %0(p0) :: (load 16 from %ir.a) 34 %4:_(<16 x s8>) = G_LOAD %1(p0) :: (load 16 from %ir.b) 35 %5:_(<16 x s8>) = G_SUB %4, %3 36 G_STORE %5(<16 x s8>), %2(p0) :: (store 16 into %ir.c) 37 RetRA 38 39... 40--- 41name: sub_v8i16 42alignment: 4 43legalized: true 44tracksRegLiveness: true 45body: | 46 bb.1.entry: 47 liveins: $a0, $a1, $a2 48 49 ; P5600-LABEL: name: sub_v8i16 50 ; P5600: liveins: $a0, $a1, $a2 51 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 52 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 53 ; P5600: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 54 ; P5600: [[LOAD:%[0-9]+]]:fprb(<8 x s16>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a) 55 ; P5600: [[LOAD1:%[0-9]+]]:fprb(<8 x s16>) = G_LOAD [[COPY1]](p0) :: (load 16 from %ir.b) 56 ; P5600: [[SUB:%[0-9]+]]:fprb(<8 x s16>) = G_SUB [[LOAD1]], [[LOAD]] 57 ; P5600: G_STORE [[SUB]](<8 x s16>), [[COPY2]](p0) :: (store 16 into %ir.c) 58 ; P5600: RetRA 59 %0:_(p0) = COPY $a0 60 %1:_(p0) = COPY $a1 61 %2:_(p0) = COPY $a2 62 %3:_(<8 x s16>) = G_LOAD %0(p0) :: (load 16 from %ir.a) 63 %4:_(<8 x s16>) = G_LOAD %1(p0) :: (load 16 from %ir.b) 64 %5:_(<8 x s16>) = G_SUB %4, %3 65 G_STORE %5(<8 x s16>), %2(p0) :: (store 16 into %ir.c) 66 RetRA 67 68... 69--- 70name: sub_v4i32 71alignment: 4 72legalized: true 73tracksRegLiveness: true 74body: | 75 bb.1.entry: 76 liveins: $a0, $a1, $a2 77 78 ; P5600-LABEL: name: sub_v4i32 79 ; P5600: liveins: $a0, $a1, $a2 80 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 81 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 82 ; P5600: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 83 ; P5600: [[LOAD:%[0-9]+]]:fprb(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a) 84 ; P5600: [[LOAD1:%[0-9]+]]:fprb(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load 16 from %ir.b) 85 ; P5600: [[SUB:%[0-9]+]]:fprb(<4 x s32>) = G_SUB [[LOAD1]], [[LOAD]] 86 ; P5600: G_STORE [[SUB]](<4 x s32>), [[COPY2]](p0) :: (store 16 into %ir.c) 87 ; P5600: RetRA 88 %0:_(p0) = COPY $a0 89 %1:_(p0) = COPY $a1 90 %2:_(p0) = COPY $a2 91 %3:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.a) 92 %4:_(<4 x s32>) = G_LOAD %1(p0) :: (load 16 from %ir.b) 93 %5:_(<4 x s32>) = G_SUB %4, %3 94 G_STORE %5(<4 x s32>), %2(p0) :: (store 16 into %ir.c) 95 RetRA 96 97... 98--- 99name: sub_v2i64 100alignment: 4 101legalized: true 102tracksRegLiveness: true 103body: | 104 bb.1.entry: 105 liveins: $a0, $a1, $a2 106 107 ; P5600-LABEL: name: sub_v2i64 108 ; P5600: liveins: $a0, $a1, $a2 109 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 110 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 111 ; P5600: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 112 ; P5600: [[LOAD:%[0-9]+]]:fprb(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a) 113 ; P5600: [[LOAD1:%[0-9]+]]:fprb(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load 16 from %ir.b) 114 ; P5600: [[SUB:%[0-9]+]]:fprb(<2 x s64>) = G_SUB [[LOAD1]], [[LOAD]] 115 ; P5600: G_STORE [[SUB]](<2 x s64>), [[COPY2]](p0) :: (store 16 into %ir.c) 116 ; P5600: RetRA 117 %0:_(p0) = COPY $a0 118 %1:_(p0) = COPY $a1 119 %2:_(p0) = COPY $a2 120 %3:_(<2 x s64>) = G_LOAD %0(p0) :: (load 16 from %ir.a) 121 %4:_(<2 x s64>) = G_LOAD %1(p0) :: (load 16 from %ir.b) 122 %5:_(<2 x s64>) = G_SUB %4, %3 123 G_STORE %5(<2 x s64>), %2(p0) :: (store 16 into %ir.c) 124 RetRA 125 126... 127