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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=mips64 -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
3; RUN: llc -march=mips64el -O0 -mcpu=mips64r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS
4; RUN: llc -march=mips64 -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
5; RUN: llc -march=mips64el -O0 -mcpu=mips64r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
6
7define i64 @test_max(i64* nocapture %ptr, i64 signext %val) {
8; MIPS-LABEL: test_max:
9; MIPS:       # %bb.0: # %entry
10; MIPS-NEXT:    sync
11; MIPS-NEXT:  .LBB0_1: # %entry
12; MIPS-NEXT:    # =>This Inner Loop Header: Depth=1
13; MIPS-NEXT:    lld $2, 0($4)
14; MIPS-NEXT:    slt $3, $2, $5
15; MIPS-NEXT:    move $1, $2
16; MIPS-NEXT:    movn $1, $5, $3
17; MIPS-NEXT:    scd $1, 0($4)
18; MIPS-NEXT:    beqz $1, .LBB0_1
19; MIPS-NEXT:    nop
20; MIPS-NEXT:  # %bb.2: # %entry
21; MIPS-NEXT:    sync
22; MIPS-NEXT:    jr $ra
23; MIPS-NEXT:    nop
24;
25; MIPSR6-LABEL: test_max:
26; MIPSR6:       # %bb.0: # %entry
27; MIPSR6-NEXT:    sync
28; MIPSR6-NEXT:  .LBB0_1: # %entry
29; MIPSR6-NEXT:    # =>This Inner Loop Header: Depth=1
30; MIPSR6-NEXT:    lld $2, 0($4)
31; MIPSR6-NEXT:    slt $3, $2, $5
32; MIPSR6-NEXT:    seleqz $1, $2, $3
33; MIPSR6-NEXT:    selnez $3, $5, $3
34; MIPSR6-NEXT:    or $1, $1, $3
35; MIPSR6-NEXT:    scd $1, 0($4)
36; MIPSR6-NEXT:    beqzc $1, .LBB0_1
37; MIPSR6-NEXT:  # %bb.2: # %entry
38; MIPSR6-NEXT:    sync
39; MIPSR6-NEXT:    jrc $ra
40entry:
41  %0 = atomicrmw max i64* %ptr, i64 %val seq_cst
42  ret i64 %0
43}
44
45define i64 @test_min(i64* nocapture %ptr, i64 signext %val) {
46; MIPS-LABEL: test_min:
47; MIPS:       # %bb.0: # %entry
48; MIPS-NEXT:    sync
49; MIPS-NEXT:  .LBB1_1: # %entry
50; MIPS-NEXT:    # =>This Inner Loop Header: Depth=1
51; MIPS-NEXT:    lld $2, 0($4)
52; MIPS-NEXT:    slt $3, $2, $5
53; MIPS-NEXT:    move $1, $2
54; MIPS-NEXT:    movz $1, $5, $3
55; MIPS-NEXT:    scd $1, 0($4)
56; MIPS-NEXT:    beqz $1, .LBB1_1
57; MIPS-NEXT:    nop
58; MIPS-NEXT:  # %bb.2: # %entry
59; MIPS-NEXT:    sync
60; MIPS-NEXT:    jr $ra
61; MIPS-NEXT:    nop
62;
63; MIPSR6-LABEL: test_min:
64; MIPSR6:       # %bb.0: # %entry
65; MIPSR6-NEXT:    sync
66; MIPSR6-NEXT:  .LBB1_1: # %entry
67; MIPSR6-NEXT:    # =>This Inner Loop Header: Depth=1
68; MIPSR6-NEXT:    lld $2, 0($4)
69; MIPSR6-NEXT:    slt $3, $2, $5
70; MIPSR6-NEXT:    selnez $1, $2, $3
71; MIPSR6-NEXT:    seleqz $3, $5, $3
72; MIPSR6-NEXT:    or $1, $1, $3
73; MIPSR6-NEXT:    scd $1, 0($4)
74; MIPSR6-NEXT:    beqzc $1, .LBB1_1
75; MIPSR6-NEXT:  # %bb.2: # %entry
76; MIPSR6-NEXT:    sync
77; MIPSR6-NEXT:    jrc $ra
78entry:
79  %0 = atomicrmw min i64* %ptr, i64 %val seq_cst
80  ret i64 %0
81}
82
83define i64 @test_umax(i64* nocapture %ptr, i64 zeroext %val) {
84; MIPS-LABEL: test_umax:
85; MIPS:       # %bb.0: # %entry
86; MIPS-NEXT:    sync
87; MIPS-NEXT:  .LBB2_1: # %entry
88; MIPS-NEXT:    # =>This Inner Loop Header: Depth=1
89; MIPS-NEXT:    lld $2, 0($4)
90; MIPS-NEXT:    sltu $3, $2, $5
91; MIPS-NEXT:    move $1, $2
92; MIPS-NEXT:    movn $1, $5, $3
93; MIPS-NEXT:    scd $1, 0($4)
94; MIPS-NEXT:    beqz $1, .LBB2_1
95; MIPS-NEXT:    nop
96; MIPS-NEXT:  # %bb.2: # %entry
97; MIPS-NEXT:    sync
98; MIPS-NEXT:    jr $ra
99; MIPS-NEXT:    nop
100;
101; MIPSR6-LABEL: test_umax:
102; MIPSR6:       # %bb.0: # %entry
103; MIPSR6-NEXT:    sync
104; MIPSR6-NEXT:  .LBB2_1: # %entry
105; MIPSR6-NEXT:    # =>This Inner Loop Header: Depth=1
106; MIPSR6-NEXT:    lld $2, 0($4)
107; MIPSR6-NEXT:    sltu $3, $2, $5
108; MIPSR6-NEXT:    seleqz $1, $2, $3
109; MIPSR6-NEXT:    selnez $3, $5, $3
110; MIPSR6-NEXT:    or $1, $1, $3
111; MIPSR6-NEXT:    scd $1, 0($4)
112; MIPSR6-NEXT:    beqzc $1, .LBB2_1
113; MIPSR6-NEXT:  # %bb.2: # %entry
114; MIPSR6-NEXT:    sync
115; MIPSR6-NEXT:    jrc $ra
116entry:
117  %0 = atomicrmw umax i64* %ptr, i64 %val seq_cst
118  ret i64 %0
119}
120
121define i64 @test_umin(i64* nocapture %ptr, i64 zeroext %val) {
122; MIPS-LABEL: test_umin:
123; MIPS:       # %bb.0: # %entry
124; MIPS-NEXT:    sync
125; MIPS-NEXT:  .LBB3_1: # %entry
126; MIPS-NEXT:    # =>This Inner Loop Header: Depth=1
127; MIPS-NEXT:    lld $2, 0($4)
128; MIPS-NEXT:    sltu $3, $2, $5
129; MIPS-NEXT:    move $1, $2
130; MIPS-NEXT:    movz $1, $5, $3
131; MIPS-NEXT:    scd $1, 0($4)
132; MIPS-NEXT:    beqz $1, .LBB3_1
133; MIPS-NEXT:    nop
134; MIPS-NEXT:  # %bb.2: # %entry
135; MIPS-NEXT:    sync
136; MIPS-NEXT:    jr $ra
137; MIPS-NEXT:    nop
138;
139; MIPSR6-LABEL: test_umin:
140; MIPSR6:       # %bb.0: # %entry
141; MIPSR6-NEXT:    sync
142; MIPSR6-NEXT:  .LBB3_1: # %entry
143; MIPSR6-NEXT:    # =>This Inner Loop Header: Depth=1
144; MIPSR6-NEXT:    lld $2, 0($4)
145; MIPSR6-NEXT:    sltu $3, $2, $5
146; MIPSR6-NEXT:    selnez $1, $2, $3
147; MIPSR6-NEXT:    seleqz $3, $5, $3
148; MIPSR6-NEXT:    or $1, $1, $3
149; MIPSR6-NEXT:    scd $1, 0($4)
150; MIPSR6-NEXT:    beqzc $1, .LBB3_1
151; MIPSR6-NEXT:  # %bb.2: # %entry
152; MIPSR6-NEXT:    sync
153; MIPSR6-NEXT:    jrc $ra
154entry:
155  %0 = atomicrmw umin i64* %ptr, i64 %val seq_cst
156  ret i64 %0
157}
158
159