1; Check that the CPU names work. 2 3; RUN: llc -mtriple=mips -mcpu=generic -filetype=obj < %s \ 4; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=GENERIC 5; GENERIC: ISA: MIPS32 6 7; RUN: llc -mtriple=mips -mcpu=mips2 -filetype=obj < %s \ 8; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS2 9; MIPS2: ISA: MIPS2 10; RUN: llc -mtriple=mips64 -mcpu=mips3 -filetype=obj < %s \ 11; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS3 12; MIPS3: ISA: MIPS3 13; RUN: llc -mtriple=mips64 -mcpu=mips4 -filetype=obj < %s \ 14; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS4 15; MIPS4: ISA: MIPS4 16 17; RUN: llc -mtriple=mips -mcpu=mips32 -filetype=obj < %s \ 18; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS32 19; MIPS32: ISA: MIPS32 20; RUN: llc -mtriple=mips -mcpu=mips32r2 -filetype=obj < %s \ 21; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS32R2 22; MIPS32R2: ISA: MIPS32r2 23; RUN: llc -mtriple=mips -mcpu=mips32r3 -filetype=obj < %s \ 24; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS32R3 25; MIPS32R3: ISA: MIPS32r3 26; RUN: llc -mtriple=mips -mcpu=mips32r5 -filetype=obj < %s \ 27; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS32R5 28; MIPS32R5: ISA: MIPS32r5 29; RUN: llc -mtriple=mips -mcpu=mips32r6 -filetype=obj < %s \ 30; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS32R6 31; MIPS32R6: ISA: MIPS32r6 32 33; RUN: llc -mtriple=mips64 -mcpu=mips64 -filetype=obj < %s \ 34; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS64 35; MIPS64: ISA: MIPS64 36; RUN: llc -mtriple=mips64 -mcpu=mips64r2 -filetype=obj < %s \ 37; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS64R2 38; MIPS64R2: ISA: MIPS64r2 39; RUN: llc -mtriple=mips64 -mcpu=mips64r3 -filetype=obj < %s \ 40; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS64R3 41; MIPS64R3: ISA: MIPS64r3 42; RUN: llc -mtriple=mips64 -mcpu=mips64r5 -filetype=obj < %s \ 43; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS64R5 44; MIPS64R5: ISA: MIPS64r5 45; RUN: llc -mtriple=mips64 -mcpu=mips64r6 -filetype=obj < %s \ 46; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=MIPS64R6 47; MIPS64R6: ISA: MIPS64r6 48 49; RUN: llc -mtriple=mips64 -mcpu=octeon -filetype=obj < %s \ 50; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=OCTEON 51; OCTEON: ISA: MIPS64r2 52; OCTEON: ISA Extension: Cavium Networks Octeon 53; RUN: llc -mtriple=mips64 -mcpu=octeon+ -filetype=obj < %s \ 54; RUN: | llvm-readelf -A - | FileCheck %s --check-prefix=OCTEONP 55; OCTEONP: ISA: MIPS64r2 56; OCTEONP: ISA Extension: Cavium Networks OcteonP 57 58; Check that we reject CPUs that are not implemented. 59 60; RUN: not --crash llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \ 61; RUN: | FileCheck %s --check-prefix=ERROR 62; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \ 63; RUN: | FileCheck %s --check-prefix=ERROR 64 65; ERROR: LLVM ERROR: Code generation for MIPS-{{.}} is not implemented 66 67define void @foo() { 68 ret void 69} 70