1; RUN: llc < %s -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \ 2; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs \ 3; RUN: | FileCheck %s --check-prefix=CHECK-P8 4; RUN: llc < %s -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \ 5; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs \ 6; RUN: | FileCheck %s --check-prefix=CHECK-P9 7 8@a = external local_unnamed_addr global <4 x i32>, align 16 9@pb = external local_unnamed_addr global float*, align 8 10 11define void @testExpandPostRAPseudo(i32* nocapture readonly %ptr) { 12; CHECK-P8-LABEL: testExpandPostRAPseudo: 13; CHECK-P8: # %bb.0: # %entry 14; CHECK-P8: lfiwzx f0, 0, r3 15; CHECK-P8: ld r4, .LC0@toc@l(r4) 16; CHECK-P8: xxspltw v2, vs0, 1 17; CHECK-P8: stvx v2, 0, r4 18; CHECK-P8: lis r4, 1024 19; CHECK-P8: lfiwax f0, 0, r3 20; CHECK-P8: addis r3, r2, .LC1@toc@ha 21; CHECK-P8: ld r3, .LC1@toc@l(r3) 22; CHECK-P8: xscvsxdsp f0, f0 23; CHECK-P8: ld r3, 0(r3) 24; CHECK-P8: stfsx f0, r3, r4 25; CHECK-P8: blr 26; 27; CHECK-P9-LABEL: testExpandPostRAPseudo: 28; CHECK-P9: # %bb.0: # %entry 29; CHECK-P9: addis r4, r2, .LC0@toc@ha 30; CHECK-P9: lxvwsx vs0, 0, r3 31; CHECK-P9: ld r4, .LC0@toc@l(r4) 32; CHECK-P9: stxvx vs0, 0, r4 33; CHECK-P9: lis r4, 1024 34; CHECK-P9: lfiwax f0, 0, r3 35; CHECK-P9: addis r3, r2, .LC1@toc@ha 36; CHECK-P9: ld r3, .LC1@toc@l(r3) 37; CHECK-P9: xscvsxdsp f0, f0 38; CHECK-P9: ld r3, 0(r3) 39; CHECK-P9: stfsx f0, r3, r4 40; CHECK-P9: blr 41entry: 42 %0 = load i32, i32* %ptr, align 4 43 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0 44 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 45 store <4 x i32> %splat.splat, <4 x i32>* @a, align 16 46 tail call void asm sideeffect "#Clobber Rigisters", "~{f0},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() 47 %1 = load i32, i32* %ptr, align 4 48 %conv = sitofp i32 %1 to float 49 %2 = load float*, float** @pb, align 8 50 %add.ptr = getelementptr inbounds float, float* %2, i64 16777216 51 store float %conv, float* %add.ptr, align 4 52 ret void 53} 54