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1# RUN: llc -o - %s -start-after=if-converter | FileCheck %s
2
3--- |
4  target datalayout = "E-m:e-i64:64-n32:64"
5  target triple = "powerpc64-unknown-linux-gnu"
6
7  %struct.rwlock_t.0.22.58.68.242.244 = type {}
8
9  @tasklist_lock = external global %struct.rwlock_t.0.22.58.68.242.244, align 1
10
11  ; Function Attrs: nounwind
12  define void @mm_update_next_owner(i8** %p1, i32* %p2) #0 {
13  entry:
14    %0 = load i8*, i8** %p1, align 8
15    br i1 undef, label %do.body.92, label %for.body.21
16
17  for.body.21:                                      ; preds = %entry
18    unreachable
19
20  do.body.92:                                       ; preds = %entry
21    %usage = getelementptr inbounds i8, i8* %0, i64 -48
22    %counter.i = bitcast i8* %usage to i32*
23    %call95 = tail call signext i32 bitcast (i32 (...)* @__raw_read_unlock to i32 (%struct.rwlock_t.0.22.58.68.242.244*)*)(%struct.rwlock_t.0.22.58.68.242.244* nonnull @tasklist_lock) #1
24    store volatile i32 0, i32* %p2, align 4
25    tail call void asm sideeffect "#compiler barrier", "~{memory}"() #1
26    %1 = tail call i32 asm sideeffect "\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", "=&r,r,~{cc},~{xer},~{memory}"(i32* %counter.i) #1
27    %cmp.i = icmp eq i32 %1, 0
28    br i1 %cmp.i, label %if.then.i, label %put_task_struct.exit
29
30  if.then.i:                                        ; preds = %do.body.92
31    unreachable
32
33  put_task_struct.exit:                             ; preds = %do.body.92
34    ret void
35  }
36
37  declare signext i32 @__raw_read_unlock(...)
38
39  attributes #0 = { nounwind "target-cpu"="pwr7" }
40  attributes #1 = { nounwind }
41
42...
43---
44name:            mm_update_next_owner
45alignment:       16
46exposesReturnsTwice: false
47tracksRegLiveness: true
48liveins:
49  - { reg: '$x3' }
50  - { reg: '$x4' }
51frameInfo:
52  isFrameAddressTaken: false
53  isReturnAddressTaken: false
54  hasStackMap:     false
55  hasPatchPoint:   false
56  stackSize:       144
57  offsetAdjustment: 0
58  maxAlignment:    0
59  adjustsStack:    true
60  hasCalls:        true
61  maxCallFrameSize: 112
62  hasOpaqueSPAdjustment: false
63  hasVAStart:      false
64  hasMustTailInVarArgFunc: false
65fixedStack:
66  - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '$x30' }
67  - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$x29' }
68body:             |
69  bb.0.entry:
70    liveins: $x3, $x4, $x29, $x30, $x29, $x30
71
72    $x0 = MFLR8 implicit $lr8
73    STD $x0, 16, $x1
74    $x1 = STDU $x1, -144, $x1
75    STD killed $x29, 120, $x1 :: (store 8 into %fixed-stack.1)
76    STD killed $x30, 128, $x1 :: (store 8 into %fixed-stack.0, align 16)
77    $x30 = OR8 $x4, $x4
78    $x3 = LD 0, killed $x3 :: (load 8 from %ir.p1)
79    $x29 = ADDI8 killed $x3, -48
80    $x3 = ADDIStocHA8 $x2, @tasklist_lock
81    $x3 = LDtocL @tasklist_lock, killed $x3, implicit $x2 :: (load 8 from got)
82    BL8_NOP @__raw_read_unlock, csr_ppc64_altivec, implicit-def $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def dead $x3
83    $r3 = LI 0
84    STW killed $r3, 0, killed $x30 :: (volatile store 4 into %ir.p2)
85    INLINEASM &"#compiler barrier", 25
86    INLINEASM &"\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", 25, 131083, def early-clobber $r3, 851977, killed $x29, 12, implicit-def dead early-clobber $cr0
87    ; CHECK-LABEL: @mm_update_next_owner
88    ; CHECK-NOT: lwarx 29, 0, 29
89    ; CHECK-NOT: stwcx. 29, 0, 29
90    $cr0 = CMPLWI killed $r3, 0
91    $x30 = LD 128, $x1 :: (load 8 from %fixed-stack.0, align 16)
92    $x29 = LD 120, $x1 :: (load 8 from %fixed-stack.1)
93    $x1 = ADDI8 $x1, 144
94    $x0 = LD 16, $x1
95    MTLR8 $x0, implicit-def $lr8
96    BLR8 implicit $lr8, implicit $rm
97
98...
99