1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 < %s | FileCheck %s 3target datalayout = "e-m:e-i64:64-n32:64" 4target triple = "powerpc64le-unknown-linux-gnu" 5 6define void @bn_mul_comba8(i64* nocapture %r, i64* nocapture readonly %a, i64* nocapture readonly %b) { 7; CHECK-LABEL: bn_mul_comba8: 8; CHECK: # %bb.0: 9; CHECK-NEXT: std 4, -8(1) # 8-byte Folded Spill 10; CHECK-NEXT: mr 4, 3 11; CHECK-NEXT: ld 3, -8(1) # 8-byte Folded Reload 12; CHECK-NEXT: ld 9, 0(3) 13; CHECK-NEXT: ld 8, 0(5) 14; CHECK-NEXT: mulhdu 7, 8, 9 15; CHECK-NEXT: ld 3, 8(3) 16; CHECK-NEXT: mulld 6, 3, 9 17; CHECK-NEXT: mulhdu 3, 3, 9 18; CHECK-NEXT: addc 6, 6, 7 19; CHECK-NEXT: addze 3, 3 20; CHECK-NEXT: ld 5, 8(5) 21; CHECK-NEXT: mulld 7, 5, 8 22; CHECK-NEXT: mulhdu 5, 5, 8 23; CHECK-NEXT: addc 6, 6, 7 24; CHECK-NEXT: addze 5, 5 25; CHECK-NEXT: add 3, 5, 3 26; CHECK-NEXT: cmpld 7, 3, 5 27; CHECK-NEXT: mfocrf 3, 1 28; CHECK-NEXT: rlwinm 5, 3, 29, 31, 31 29; CHECK-NEXT: # implicit-def: $x3 30; CHECK-NEXT: mr 3, 5 31; CHECK-NEXT: clrldi 3, 3, 32 32; CHECK-NEXT: std 3, 0(4) 33; CHECK-NEXT: blr 34 %1 = load i64, i64* %a, align 8 35 %conv = zext i64 %1 to i128 36 %2 = load i64, i64* %b, align 8 37 %conv2 = zext i64 %2 to i128 38 %mul = mul nuw i128 %conv2, %conv 39 %shr = lshr i128 %mul, 64 40 %agep = getelementptr inbounds i64, i64* %a, i64 1 41 %3 = load i64, i64* %agep, align 8 42 %conv14 = zext i64 %3 to i128 43 %mul15 = mul nuw i128 %conv14, %conv 44 %add17 = add i128 %mul15, %shr 45 %shr19 = lshr i128 %add17, 64 46 %conv20 = trunc i128 %shr19 to i64 47 %bgep = getelementptr inbounds i64, i64* %b, i64 1 48 %4 = load i64, i64* %bgep, align 8 49 %conv28 = zext i64 %4 to i128 50 %mul31 = mul nuw i128 %conv28, %conv2 51 %conv32 = and i128 %add17, 18446744073709551615 52 %add33 = add i128 %conv32, %mul31 53 %shr35 = lshr i128 %add33, 64 54 %conv36 = trunc i128 %shr35 to i64 55 %add37 = add i64 %conv36, %conv20 56 %cmp38 = icmp ult i64 %add37, %conv36 57 %conv148 = zext i1 %cmp38 to i64 58 store i64 %conv148, i64* %r, align 8 59 ret void 60} 61 62