1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s 3 4define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) { 5; CHECK-LABEL: sub_zext_cmp_mask_same_size_result: 6; CHECK: # %bb.0: 7; CHECK-NEXT: clrldi 3, 3, 63 8; CHECK-NEXT: ori 3, 3, 65508 9; CHECK-NEXT: oris 3, 3, 65535 10; CHECK-NEXT: blr 11 %a = and i32 %x, 1 12 %c = icmp eq i32 %a, 0 13 %z = zext i1 %c to i32 14 %r = sub i32 -27, %z 15 ret i32 %r 16} 17 18define i32 @sub_zext_cmp_mask_wider_result(i8 %x) { 19; CHECK-LABEL: sub_zext_cmp_mask_wider_result: 20; CHECK: # %bb.0: 21; CHECK-NEXT: clrldi 3, 3, 63 22; CHECK-NEXT: ori 3, 3, 26 23; CHECK-NEXT: blr 24 %a = and i8 %x, 1 25 %c = icmp eq i8 %a, 0 26 %z = zext i1 %c to i32 27 %r = sub i32 27, %z 28 ret i32 %r 29} 30 31define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) { 32; CHECK-LABEL: sub_zext_cmp_mask_narrower_result: 33; CHECK: # %bb.0: 34; CHECK-NEXT: clrldi 3, 3, 63 35; CHECK-NEXT: ori 3, 3, 46 36; CHECK-NEXT: blr 37 %a = and i32 %x, 1 38 %c = icmp eq i32 %a, 0 39 %z = zext i1 %c to i8 40 %r = sub i8 47, %z 41 ret i8 %r 42} 43 44define i8 @add_zext_cmp_mask_same_size_result(i8 %x) { 45; CHECK-LABEL: add_zext_cmp_mask_same_size_result: 46; CHECK: # %bb.0: 47; CHECK-NEXT: clrlwi 3, 3, 31 48; CHECK-NEXT: subfic 3, 3, 27 49; CHECK-NEXT: blr 50 %a = and i8 %x, 1 51 %c = icmp eq i8 %a, 0 52 %z = zext i1 %c to i8 53 %r = add i8 %z, 26 54 ret i8 %r 55} 56 57define i32 @add_zext_cmp_mask_wider_result(i8 %x) { 58; CHECK-LABEL: add_zext_cmp_mask_wider_result: 59; CHECK: # %bb.0: 60; CHECK-NEXT: clrlwi 3, 3, 31 61; CHECK-NEXT: subfic 3, 3, 27 62; CHECK-NEXT: blr 63 %a = and i8 %x, 1 64 %c = icmp eq i8 %a, 0 65 %z = zext i1 %c to i32 66 %r = add i32 %z, 26 67 ret i32 %r 68} 69 70define i8 @add_zext_cmp_mask_narrower_result(i32 %x) { 71; CHECK-LABEL: add_zext_cmp_mask_narrower_result: 72; CHECK: # %bb.0: 73; CHECK-NEXT: clrlwi 3, 3, 31 74; CHECK-NEXT: subfic 3, 3, 43 75; CHECK-NEXT: blr 76 %a = and i32 %x, 1 77 %c = icmp eq i32 %a, 0 78 %z = zext i1 %c to i8 79 %r = add i8 %z, 42 80 ret i8 %r 81} 82 83define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) { 84; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result: 85; CHECK: # %bb.0: 86; CHECK-NEXT: clrldi 3, 3, 63 87; CHECK-NEXT: ori 3, 3, 42 88; CHECK-NEXT: blr 89 %a = and i32 %x, 1 90 %c = icmp eq i32 %a, 0 91 %r = select i1 %c, i32 42, i32 43 92 ret i32 %r 93} 94 95define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) { 96; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result: 97; CHECK: # %bb.0: 98; CHECK-NEXT: clrldi 3, 3, 63 99; CHECK-NEXT: ori 3, 3, 26 100; CHECK-NEXT: blr 101 %a = and i32 %x, 1 102 %c = icmp eq i32 %a, 0 103 %r = select i1 %c, i64 26, i64 27 104 ret i64 %r 105} 106 107define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) { 108; CHECK-LABEL: low_bit_select_constants_bigger_false_narrower_result: 109; CHECK: # %bb.0: 110; CHECK-NEXT: clrldi 3, 3, 63 111; CHECK-NEXT: ori 3, 3, 36 112; CHECK-NEXT: blr 113 %a = and i32 %x, 1 114 %c = icmp eq i32 %a, 0 115 %r = select i1 %c, i16 36, i16 37 116 ret i16 %r 117} 118 119define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) { 120; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result: 121; CHECK: # %bb.0: 122; CHECK-NEXT: clrldi 3, 3, 63 123; CHECK-NEXT: subfic 3, 3, -29 124; CHECK-NEXT: blr 125 %a = and i8 %x, 1 126 %c = icmp eq i8 %a, 0 127 %r = select i1 %c, i8 227, i8 226 128 ret i8 %r 129} 130 131define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) { 132; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result: 133; CHECK: # %bb.0: 134; CHECK-NEXT: clrldi 3, 3, 63 135; CHECK-NEXT: subfic 3, 3, 227 136; CHECK-NEXT: blr 137 %a = and i8 %x, 1 138 %c = icmp eq i8 %a, 0 139 %r = select i1 %c, i32 227, i32 226 140 ret i32 %r 141} 142 143define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) { 144; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result: 145; CHECK: # %bb.0: 146; CHECK-NEXT: clrldi 3, 3, 63 147; CHECK-NEXT: subfic 3, 3, 41 148; CHECK-NEXT: blr 149 %a = and i16 %x, 1 150 %c = icmp eq i16 %a, 0 151 %r = select i1 %c, i8 41, i8 40 152 ret i8 %r 153} 154 155