1; RUN: llc -verify-machineinstrs < %s | FileCheck %s 2 3target datalayout = "E-p:32:32" 4target triple = "powerpc-unknown-linux-gnu" 5 6;CHECK-LABEL: foo: 7; There are 4 inner loops (%bb, %bb12, %bb25, %bb38) that all exit to %cond_next48 8; The last (whichever it is) should have a fallthrough exit, and the other three 9; need an unconditional branch. No other block should have an unconditional 10; branch to cond_next48 11 12;CHECK: .LBB0_7: # %cond_next48 13;CHECK: b .LBB0_7 14;CHECK: b .LBB0_7 15;CHECK: b .LBB0_7 16 17define void @foo(i32 %W, i32 %X, i32 %Y, i32 %Z) { 18entry: 19 %tmp1 = and i32 %W, 1 ; <i32> [#uses=1] 20 %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] 21 br i1 %tmp1.upgrd.1, label %cond_false, label %bb5 22bb: ; preds = %bb5, %bb 23 %indvar77 = phi i32 [ %indvar.next78, %bb ], [ 0, %bb5 ] ; <i32> [#uses=1] 24 %tmp2 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 25 %indvar.next78 = add i32 %indvar77, 1 ; <i32> [#uses=2] 26 %exitcond79 = icmp eq i32 %indvar.next78, %X ; <i1> [#uses=1] 27 br i1 %exitcond79, label %cond_next48, label %bb 28bb5: ; preds = %entry 29 %tmp = icmp eq i32 %X, 0 ; <i1> [#uses=1] 30 br i1 %tmp, label %cond_next48, label %bb 31cond_false: ; preds = %entry 32 %tmp10 = and i32 %W, 2 ; <i32> [#uses=1] 33 %tmp10.upgrd.2 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1] 34 br i1 %tmp10.upgrd.2, label %cond_false20, label %bb16 35bb12: ; preds = %bb16, %bb12 36 %indvar72 = phi i32 [ %indvar.next73, %bb12 ], [ 0, %bb16 ] ; <i32> [#uses=1] 37 %tmp13 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 38 %indvar.next73 = add i32 %indvar72, 1 ; <i32> [#uses=2] 39 %exitcond74 = icmp eq i32 %indvar.next73, %Y ; <i1> [#uses=1] 40 br i1 %exitcond74, label %cond_next48, label %bb12 41bb16: ; preds = %cond_false 42 %tmp18 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] 43 br i1 %tmp18, label %cond_next48, label %bb12 44cond_false20: ; preds = %cond_false 45 %tmp23 = and i32 %W, 4 ; <i32> [#uses=1] 46 %tmp23.upgrd.3 = icmp eq i32 %tmp23, 0 ; <i1> [#uses=1] 47 br i1 %tmp23.upgrd.3, label %cond_false33, label %bb29 48bb25: ; preds = %bb29, %bb25 49 %indvar67 = phi i32 [ %indvar.next68, %bb25 ], [ 0, %bb29 ] ; <i32> [#uses=1] 50 %tmp26 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 51 %indvar.next68 = add i32 %indvar67, 1 ; <i32> [#uses=2] 52 %exitcond69 = icmp eq i32 %indvar.next68, %Z ; <i1> [#uses=1] 53 br i1 %exitcond69, label %cond_next48, label %bb25 54bb29: ; preds = %cond_false20 55 %tmp31 = icmp eq i32 %Z, 0 ; <i1> [#uses=1] 56 br i1 %tmp31, label %cond_next48, label %bb25 57cond_false33: ; preds = %cond_false20 58 %tmp36 = and i32 %W, 8 ; <i32> [#uses=1] 59 %tmp36.upgrd.4 = icmp eq i32 %tmp36, 0 ; <i1> [#uses=1] 60 br i1 %tmp36.upgrd.4, label %cond_next48, label %bb42 61bb38: ; preds = %bb42 62 %tmp39 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 63 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] 64 br label %bb42 65bb42: ; preds = %bb38, %cond_false33 66 %indvar = phi i32 [ %indvar.next, %bb38 ], [ 0, %cond_false33 ] ; <i32> [#uses=4] 67 %W_addr.0 = sub i32 %W, %indvar ; <i32> [#uses=1] 68 %exitcond = icmp eq i32 %indvar, %W ; <i1> [#uses=1] 69 br i1 %exitcond, label %cond_next48, label %bb38 70cond_next48: ; preds = %bb42, %cond_false33, %bb29, %bb25, %bb16, %bb12, %bb5, %bb 71 %W_addr.1 = phi i32 [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ] ; <i32> [#uses=1] 72 %tmp50 = icmp eq i32 %W_addr.1, 0 ; <i1> [#uses=1] 73 br i1 %tmp50, label %UnifiedReturnBlock, label %cond_true51 74cond_true51: ; preds = %cond_next48 75 %tmp52 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 76 ret void 77UnifiedReturnBlock: ; preds = %cond_next48 78 ret void 79} 80 81declare i32 @bar(...) 82