1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s --check-prefix=CHECK-P8 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-P9 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 9; RUN: -mcpu=pwr8 -mattr=-vsx -ppc-asm-full-reg-names \ 10; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-NOVSX 11 12define dso_local <16 x i8> @testmrghb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 13; CHECK-P8-LABEL: testmrghb: 14; CHECK-P8: # %bb.0: # %entry 15; CHECK-P8-NEXT: vmrghb v2, v3, v2 16; CHECK-P8-NEXT: blr 17; 18; CHECK-P9-LABEL: testmrghb: 19; CHECK-P9: # %bb.0: # %entry 20; CHECK-P9-NEXT: vmrghb v2, v3, v2 21; CHECK-P9-NEXT: blr 22; 23; CHECK-NOVSX-LABEL: testmrghb: 24; CHECK-NOVSX: # %bb.0: # %entry 25; CHECK-NOVSX-NEXT: vmrghb v2, v3, v2 26; CHECK-NOVSX-NEXT: blr 27entry: 28 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 29 ret <16 x i8> %shuffle 30} 31define dso_local <16 x i8> @testmrghb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 32; CHECK-P8-LABEL: testmrghb2: 33; CHECK-P8: # %bb.0: # %entry 34; CHECK-P8-NEXT: vmrghb v2, v2, v3 35; CHECK-P8-NEXT: blr 36; 37; CHECK-P9-LABEL: testmrghb2: 38; CHECK-P9: # %bb.0: # %entry 39; CHECK-P9-NEXT: vmrghb v2, v2, v3 40; CHECK-P9-NEXT: blr 41; 42; CHECK-NOVSX-LABEL: testmrghb2: 43; CHECK-NOVSX: # %bb.0: # %entry 44; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha 45; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l 46; CHECK-NOVSX-NEXT: lvx v4, 0, r3 47; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 48; CHECK-NOVSX-NEXT: blr 49entry: 50 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 8, i32 25, i32 9, i32 26, i32 10, i32 27, i32 11, i32 28, i32 12, i32 29, i32 13, i32 30, i32 14, i32 31, i32 15> 51 ret <16 x i8> %shuffle 52} 53define dso_local <16 x i8> @testmrghh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 54; CHECK-P8-LABEL: testmrghh: 55; CHECK-P8: # %bb.0: # %entry 56; CHECK-P8-NEXT: vmrghh v2, v3, v2 57; CHECK-P8-NEXT: blr 58; 59; CHECK-P9-LABEL: testmrghh: 60; CHECK-P9: # %bb.0: # %entry 61; CHECK-P9-NEXT: vmrghh v2, v3, v2 62; CHECK-P9-NEXT: blr 63; 64; CHECK-NOVSX-LABEL: testmrghh: 65; CHECK-NOVSX: # %bb.0: # %entry 66; CHECK-NOVSX-NEXT: vmrghh v2, v3, v2 67; CHECK-NOVSX-NEXT: blr 68entry: 69 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 24, i32 25, i32 10, i32 11, i32 26, i32 27, i32 12, i32 13, i32 28, i32 29, i32 14, i32 15, i32 30, i32 31> 70 ret <16 x i8> %shuffle 71} 72define dso_local <16 x i8> @testmrghh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 73; CHECK-P8-LABEL: testmrghh2: 74; CHECK-P8: # %bb.0: # %entry 75; CHECK-P8-NEXT: vmrghh v2, v2, v3 76; CHECK-P8-NEXT: blr 77; 78; CHECK-P9-LABEL: testmrghh2: 79; CHECK-P9: # %bb.0: # %entry 80; CHECK-P9-NEXT: vmrghh v2, v2, v3 81; CHECK-P9-NEXT: blr 82; 83; CHECK-NOVSX-LABEL: testmrghh2: 84; CHECK-NOVSX: # %bb.0: # %entry 85; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha 86; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l 87; CHECK-NOVSX-NEXT: lvx v4, 0, r3 88; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 89; CHECK-NOVSX-NEXT: blr 90entry: 91 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 8, i32 9, i32 26, i32 27, i32 10, i32 11, i32 28, i32 29, i32 12, i32 13, i32 30, i32 31, i32 14, i32 15> 92 ret <16 x i8> %shuffle 93} 94define dso_local <16 x i8> @testmrglb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 95; CHECK-P8-LABEL: testmrglb: 96; CHECK-P8: # %bb.0: # %entry 97; CHECK-P8-NEXT: vmrglb v2, v3, v2 98; CHECK-P8-NEXT: blr 99; 100; CHECK-P9-LABEL: testmrglb: 101; CHECK-P9: # %bb.0: # %entry 102; CHECK-P9-NEXT: vmrglb v2, v3, v2 103; CHECK-P9-NEXT: blr 104; 105; CHECK-NOVSX-LABEL: testmrglb: 106; CHECK-NOVSX: # %bb.0: # %entry 107; CHECK-NOVSX-NEXT: vmrglb v2, v3, v2 108; CHECK-NOVSX-NEXT: blr 109entry: 110 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 111 ret <16 x i8> %shuffle 112} 113define dso_local <16 x i8> @testmrglb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 114; CHECK-P8-LABEL: testmrglb2: 115; CHECK-P8: # %bb.0: # %entry 116; CHECK-P8-NEXT: vmrglb v2, v2, v3 117; CHECK-P8-NEXT: blr 118; 119; CHECK-P9-LABEL: testmrglb2: 120; CHECK-P9: # %bb.0: # %entry 121; CHECK-P9-NEXT: vmrglb v2, v2, v3 122; CHECK-P9-NEXT: blr 123; 124; CHECK-NOVSX-LABEL: testmrglb2: 125; CHECK-NOVSX: # %bb.0: # %entry 126; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha 127; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l 128; CHECK-NOVSX-NEXT: lvx v4, 0, r3 129; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 130; CHECK-NOVSX-NEXT: blr 131entry: 132 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 0, i32 17, i32 1, i32 18, i32 2, i32 19, i32 3, i32 20, i32 4, i32 21, i32 5, i32 22, i32 6, i32 23, i32 7> 133 ret <16 x i8> %shuffle 134} 135define dso_local <16 x i8> @testmrglh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 136; CHECK-P8-LABEL: testmrglh: 137; CHECK-P8: # %bb.0: # %entry 138; CHECK-P8-NEXT: vmrglh v2, v3, v2 139; CHECK-P8-NEXT: blr 140; 141; CHECK-P9-LABEL: testmrglh: 142; CHECK-P9: # %bb.0: # %entry 143; CHECK-P9-NEXT: vmrglh v2, v3, v2 144; CHECK-P9-NEXT: blr 145; 146; CHECK-NOVSX-LABEL: testmrglh: 147; CHECK-NOVSX: # %bb.0: # %entry 148; CHECK-NOVSX-NEXT: vmrglh v2, v3, v2 149; CHECK-NOVSX-NEXT: blr 150entry: 151 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 4, i32 5, i32 20, i32 21, i32 6, i32 7, i32 22, i32 23> 152 ret <16 x i8> %shuffle 153} 154define dso_local <16 x i8> @testmrglh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 155; CHECK-P8-LABEL: testmrglh2: 156; CHECK-P8: # %bb.0: # %entry 157; CHECK-P8-NEXT: vmrglh v2, v2, v3 158; CHECK-P8-NEXT: blr 159; 160; CHECK-P9-LABEL: testmrglh2: 161; CHECK-P9: # %bb.0: # %entry 162; CHECK-P9-NEXT: vmrglh v2, v2, v3 163; CHECK-P9-NEXT: blr 164; 165; CHECK-NOVSX-LABEL: testmrglh2: 166; CHECK-NOVSX: # %bb.0: # %entry 167; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha 168; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l 169; CHECK-NOVSX-NEXT: lvx v4, 0, r3 170; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 171; CHECK-NOVSX-NEXT: blr 172entry: 173 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 0, i32 1, i32 18, i32 19, i32 2, i32 3, i32 20, i32 21, i32 4, i32 5, i32 22, i32 23, i32 6, i32 7> 174 ret <16 x i8> %shuffle 175} 176define dso_local <16 x i8> @testmrghw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 177; CHECK-P8-LABEL: testmrghw: 178; CHECK-P8: # %bb.0: # %entry 179; CHECK-P8-NEXT: vmrghw v2, v3, v2 180; CHECK-P8-NEXT: blr 181; 182; CHECK-P9-LABEL: testmrghw: 183; CHECK-P9: # %bb.0: # %entry 184; CHECK-P9-NEXT: vmrghw v2, v3, v2 185; CHECK-P9-NEXT: blr 186; 187; CHECK-NOVSX-LABEL: testmrghw: 188; CHECK-NOVSX: # %bb.0: # %entry 189; CHECK-NOVSX-NEXT: vmrghw v2, v3, v2 190; CHECK-NOVSX-NEXT: blr 191entry: 192 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31> 193 ret <16 x i8> %shuffle 194} 195define dso_local <16 x i8> @testmrghw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 196; CHECK-P8-LABEL: testmrghw2: 197; CHECK-P8: # %bb.0: # %entry 198; CHECK-P8-NEXT: vmrghw v2, v2, v3 199; CHECK-P8-NEXT: blr 200; 201; CHECK-P9-LABEL: testmrghw2: 202; CHECK-P9: # %bb.0: # %entry 203; CHECK-P9-NEXT: vmrghw v2, v2, v3 204; CHECK-P9-NEXT: blr 205; 206; CHECK-NOVSX-LABEL: testmrghw2: 207; CHECK-NOVSX: # %bb.0: # %entry 208; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI9_0@toc@ha 209; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI9_0@toc@l 210; CHECK-NOVSX-NEXT: lvx v4, 0, r3 211; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 212; CHECK-NOVSX-NEXT: blr 213entry: 214 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 26, i32 27, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31, i32 12, i32 13, i32 14, i32 15> 215 ret <16 x i8> %shuffle 216} 217define dso_local <16 x i8> @testmrglw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 218; CHECK-P8-LABEL: testmrglw: 219; CHECK-P8: # %bb.0: # %entry 220; CHECK-P8-NEXT: vmrglw v2, v3, v2 221; CHECK-P8-NEXT: blr 222; 223; CHECK-P9-LABEL: testmrglw: 224; CHECK-P9: # %bb.0: # %entry 225; CHECK-P9-NEXT: vmrglw v2, v3, v2 226; CHECK-P9-NEXT: blr 227; 228; CHECK-NOVSX-LABEL: testmrglw: 229; CHECK-NOVSX: # %bb.0: # %entry 230; CHECK-NOVSX-NEXT: vmrglw v2, v3, v2 231; CHECK-NOVSX-NEXT: blr 232entry: 233 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23> 234 ret <16 x i8> %shuffle 235} 236define dso_local <16 x i8> @testmrglw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 237; CHECK-P8-LABEL: testmrglw2: 238; CHECK-P8: # %bb.0: # %entry 239; CHECK-P8-NEXT: vmrglw v2, v2, v3 240; CHECK-P8-NEXT: blr 241; 242; CHECK-P9-LABEL: testmrglw2: 243; CHECK-P9: # %bb.0: # %entry 244; CHECK-P9-NEXT: vmrglw v2, v2, v3 245; CHECK-P9-NEXT: blr 246; 247; CHECK-NOVSX-LABEL: testmrglw2: 248; CHECK-NOVSX: # %bb.0: # %entry 249; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI11_0@toc@ha 250; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI11_0@toc@l 251; CHECK-NOVSX-NEXT: lvx v4, 0, r3 252; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 253; CHECK-NOVSX-NEXT: blr 254entry: 255 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 4, i32 5, i32 6, i32 7> 256 ret <16 x i8> %shuffle 257} 258 259define dso_local <8 x i16> @testmrglb3(<8 x i8>* nocapture readonly %a) local_unnamed_addr #0 { 260; CHECK-P8-LABEL: testmrglb3: 261; CHECK-P8: # %bb.0: # %entry 262; CHECK-P8-NEXT: ld r3, 0(r3) 263; CHECK-P8-NEXT: xxlxor v2, v2, v2 264; CHECK-P8-NEXT: mtvsrd v3, r3 265; CHECK-P8-NEXT: vmrghb v2, v2, v3 266; CHECK-P8-NEXT: blr 267; 268; CHECK-P9-LABEL: testmrglb3: 269; CHECK-P9: # %bb.0: # %entry 270; CHECK-P9-NEXT: lxsd v2, 0(r3) 271; CHECK-P9-NEXT: xxlxor v3, v3, v3 272; CHECK-P9-NEXT: vmrghb v2, v3, v2 273; CHECK-P9-NEXT: blr 274; 275; CHECK-NOVSX-LABEL: testmrglb3: 276; CHECK-NOVSX: # %bb.0: # %entry 277; CHECK-NOVSX-NEXT: vxor v2, v2, v2 278; CHECK-NOVSX-NEXT: ld r3, 0(r3) 279; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI12_0@toc@ha 280; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI12_0@toc@l 281; CHECK-NOVSX-NEXT: lvx v3, 0, r4 282; CHECK-NOVSX-NEXT: std r3, -16(r1) 283; CHECK-NOVSX-NEXT: addi r3, r1, -16 284; CHECK-NOVSX-NEXT: lvx v4, 0, r3 285; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3 286; CHECK-NOVSX-NEXT: blr 287entry: 288 %0 = load <8 x i8>, <8 x i8>* %a, align 8 289 %1 = zext <8 x i8> %0 to <8 x i16> 290 ret <8 x i16> %1 291} 292 293define dso_local void @no_crash_elt0_from_RHS(<2 x double>* noalias nocapture dereferenceable(16) %.vtx6) #0 { 294; CHECK-P8-LABEL: no_crash_elt0_from_RHS: 295; CHECK-P8: # %bb.0: # %test_entry 296; CHECK-P8-NEXT: mflr r0 297; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill 298; CHECK-P8-NEXT: std r0, 16(r1) 299; CHECK-P8-NEXT: stdu r1, -48(r1) 300; CHECK-P8-NEXT: mr r30, r3 301; CHECK-P8-NEXT: bl dummy 302; CHECK-P8-NEXT: nop 303; CHECK-P8-NEXT: xxlxor f0, f0, f0 304; CHECK-P8-NEXT: # kill: def $f1 killed $f1 def $vsl1 305; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 306; CHECK-P8-NEXT: xxswapd vs0, vs0 307; CHECK-P8-NEXT: stxvd2x vs0, 0, r30 308; 309; CHECK-P9-LABEL: no_crash_elt0_from_RHS: 310; CHECK-P9: # %bb.0: # %test_entry 311; CHECK-P9-NEXT: mflr r0 312; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill 313; CHECK-P9-NEXT: std r0, 16(r1) 314; CHECK-P9-NEXT: stdu r1, -48(r1) 315; CHECK-P9-NEXT: mr r30, r3 316; CHECK-P9-NEXT: bl dummy 317; CHECK-P9-NEXT: nop 318; CHECK-P9-NEXT: xxlxor f0, f0, f0 319; CHECK-P9-NEXT: # kill: def $f1 killed $f1 def $vsl1 320; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 321; CHECK-P9-NEXT: stxv vs0, 0(r30) 322; 323; CHECK-NOVSX-LABEL: no_crash_elt0_from_RHS: 324; CHECK-NOVSX: # %bb.0: # %test_entry 325; CHECK-NOVSX-NEXT: mflr r0 326; CHECK-NOVSX-NEXT: std r30, -16(r1) # 8-byte Folded Spill 327; CHECK-NOVSX-NEXT: std r0, 16(r1) 328; CHECK-NOVSX-NEXT: stdu r1, -48(r1) 329; CHECK-NOVSX-NEXT: mr r30, r3 330; CHECK-NOVSX-NEXT: bl dummy 331; CHECK-NOVSX-NEXT: nop 332; CHECK-NOVSX-NEXT: li r3, 0 333; CHECK-NOVSX-NEXT: stfd f1, 8(r30) 334; CHECK-NOVSX-NEXT: std r3, 0(r30) 335test_entry: 336 %_div_result = tail call double @dummy() 337 %oldret = insertvalue { double, double } undef, double %_div_result, 0 338 %0 = extractvalue { double, double } %oldret, 0 339 %.splatinsert = insertelement <2 x double> undef, double %0, i32 0 340 %.splat = shufflevector <2 x double> %.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 341 %1 = shufflevector <2 x double> zeroinitializer, <2 x double> %.splat, <2 x i32> <i32 0, i32 3> 342 store <2 x double> %1, <2 x double>* %.vtx6, align 16 343 unreachable 344} 345 346define dso_local <16 x i8> @no_crash_bitcast(i32 %a) { 347; CHECK-P8-LABEL: no_crash_bitcast: 348; CHECK-P8: # %bb.0: # %entry 349; CHECK-P8-NEXT: mtvsrwz v2, r3 350; CHECK-P8-NEXT: blr 351; 352; CHECK-P9-LABEL: no_crash_bitcast: 353; CHECK-P9: # %bb.0: # %entry 354; CHECK-P9-NEXT: mtvsrws v2, r3 355; CHECK-P9-NEXT: blr 356; 357; CHECK-NOVSX-LABEL: no_crash_bitcast: 358; CHECK-NOVSX: # %bb.0: # %entry 359; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI14_0@toc@ha 360; CHECK-NOVSX-NEXT: stw r3, -16(r1) 361; CHECK-NOVSX-NEXT: addi r3, r1, -16 362; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI14_0@toc@l 363; CHECK-NOVSX-NEXT: lvx v3, 0, r3 364; CHECK-NOVSX-NEXT: lvx v2, 0, r4 365; CHECK-NOVSX-NEXT: vperm v2, v3, v3, v2 366; CHECK-NOVSX-NEXT: blr 367entry: 368 %cast = bitcast i32 %a to <4 x i8> 369 %ret = shufflevector <4 x i8> %cast, <4 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> 370 ret <16 x i8> %ret 371} 372 373define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_addr #0 { 374; CHECK-P8-LABEL: replace_undefs_in_splat: 375; CHECK-P8: # %bb.0: # %entry 376; CHECK-P8-NEXT: addis r3, r2, .LCPI15_0@toc@ha 377; CHECK-P8-NEXT: addi r3, r3, .LCPI15_0@toc@l 378; CHECK-P8-NEXT: lvx v3, 0, r3 379; CHECK-P8-NEXT: vmrgow v2, v3, v2 380; CHECK-P8-NEXT: blr 381; 382; CHECK-P9-LABEL: replace_undefs_in_splat: 383; CHECK-P9: # %bb.0: # %entry 384; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0@toc@ha 385; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0@toc@l 386; CHECK-P9-NEXT: lxvx v3, 0, r3 387; CHECK-P9-NEXT: vmrgow v2, v3, v2 388; CHECK-P9-NEXT: blr 389; 390; CHECK-NOVSX-LABEL: replace_undefs_in_splat: 391; CHECK-NOVSX: # %bb.0: # %entry 392; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI15_0@toc@ha 393; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI15_1@toc@ha 394; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI15_0@toc@l 395; CHECK-NOVSX-NEXT: lvx v3, 0, r3 396; CHECK-NOVSX-NEXT: addi r3, r4, .LCPI15_1@toc@l 397; CHECK-NOVSX-NEXT: lvx v4, 0, r3 398; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3 399; CHECK-NOVSX-NEXT: blr 400entry: 401 %vecins1 = shufflevector <4 x i32> %a, <4 x i32> <i32 undef, i32 566, i32 undef, i32 566>, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 402 ret <4 x i32> %vecins1 403} 404 405define dso_local <16 x i8> @no_RAUW_in_combine_during_legalize(i32* nocapture readonly %ptr, i32 signext %offset) local_unnamed_addr #0 { 406; CHECK-P8-LABEL: no_RAUW_in_combine_during_legalize: 407; CHECK-P8: # %bb.0: # %entry 408; CHECK-P8-NEXT: addis r5, r2, .LCPI16_0@toc@ha 409; CHECK-P8-NEXT: sldi r4, r4, 2 410; CHECK-P8-NEXT: xxlxor v4, v4, v4 411; CHECK-P8-NEXT: addi r5, r5, .LCPI16_0@toc@l 412; CHECK-P8-NEXT: lxsiwzx v2, r3, r4 413; CHECK-P8-NEXT: lvx v3, 0, r5 414; CHECK-P8-NEXT: vperm v2, v4, v2, v3 415; CHECK-P8-NEXT: blr 416; 417; CHECK-P9-LABEL: no_RAUW_in_combine_during_legalize: 418; CHECK-P9: # %bb.0: # %entry 419; CHECK-P9-NEXT: sldi r4, r4, 2 420; CHECK-P9-NEXT: xxlxor v4, v4, v4 421; CHECK-P9-NEXT: lxsiwzx v2, r3, r4 422; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0@toc@ha 423; CHECK-P9-NEXT: addi r3, r3, .LCPI16_0@toc@l 424; CHECK-P9-NEXT: lxvx v3, 0, r3 425; CHECK-P9-NEXT: vperm v2, v4, v2, v3 426; CHECK-P9-NEXT: blr 427; 428; CHECK-NOVSX-LABEL: no_RAUW_in_combine_during_legalize: 429; CHECK-NOVSX: # %bb.0: # %entry 430; CHECK-NOVSX-NEXT: sldi r4, r4, 2 431; CHECK-NOVSX-NEXT: vxor v2, v2, v2 432; CHECK-NOVSX-NEXT: lwzx r3, r3, r4 433; CHECK-NOVSX-NEXT: std r3, -16(r1) 434; CHECK-NOVSX-NEXT: addi r3, r1, -16 435; CHECK-NOVSX-NEXT: lvx v3, 0, r3 436; CHECK-NOVSX-NEXT: vmrglb v2, v2, v3 437; CHECK-NOVSX-NEXT: blr 438entry: 439 %idx.ext = sext i32 %offset to i64 440 %add.ptr = getelementptr inbounds i32, i32* %ptr, i64 %idx.ext 441 %0 = load i32, i32* %add.ptr, align 4 442 %conv = zext i32 %0 to i64 443 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 444 %1 = bitcast <2 x i64> %splat.splatinsert to <16 x i8> 445 %shuffle = shufflevector <16 x i8> %1, <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 446 ret <16 x i8> %shuffle 447} 448 449define dso_local <4 x i32> @testSplat4Low(<8 x i8>* nocapture readonly %ptr) local_unnamed_addr #0 { 450; CHECK-P8-LABEL: testSplat4Low: 451; CHECK-P8: # %bb.0: # %entry 452; CHECK-P8-NEXT: ld r3, 0(r3) 453; CHECK-P8-NEXT: mtfprd f0, r3 454; CHECK-P8-NEXT: xxspltw v2, vs0, 0 455; CHECK-P8-NEXT: blr 456; 457; CHECK-P9-LABEL: testSplat4Low: 458; CHECK-P9: # %bb.0: # %entry 459; CHECK-P9-NEXT: addi r3, r3, 4 460; CHECK-P9-NEXT: lxvwsx v2, 0, r3 461; CHECK-P9-NEXT: blr 462; 463; CHECK-NOVSX-LABEL: testSplat4Low: 464; CHECK-NOVSX: # %bb.0: # %entry 465; CHECK-NOVSX-NEXT: ld r3, 0(r3) 466; CHECK-NOVSX-NEXT: addi r4, r1, -16 467; CHECK-NOVSX-NEXT: std r3, -16(r1) 468; CHECK-NOVSX-NEXT: lvx v2, 0, r4 469; CHECK-NOVSX-NEXT: vspltw v2, v2, 2 470; CHECK-NOVSX-NEXT: blr 471entry: 472 %0 = load <8 x i8>, <8 x i8>* %ptr, align 8 473 %vecinit18 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 474 %1 = bitcast <16 x i8> %vecinit18 to <4 x i32> 475 ret <4 x i32> %1 476} 477 478; Function Attrs: norecurse nounwind readonly 479define dso_local <4 x i32> @testSplat4hi(<8 x i8>* nocapture readonly %ptr) local_unnamed_addr #0 { 480; CHECK-P8-LABEL: testSplat4hi: 481; CHECK-P8: # %bb.0: # %entry 482; CHECK-P8-NEXT: ld r3, 0(r3) 483; CHECK-P8-NEXT: mtfprd f0, r3 484; CHECK-P8-NEXT: xxspltw v2, vs0, 1 485; CHECK-P8-NEXT: blr 486; 487; CHECK-P9-LABEL: testSplat4hi: 488; CHECK-P9: # %bb.0: # %entry 489; CHECK-P9-NEXT: lxvwsx v2, 0, r3 490; CHECK-P9-NEXT: blr 491; 492; CHECK-NOVSX-LABEL: testSplat4hi: 493; CHECK-NOVSX: # %bb.0: # %entry 494; CHECK-NOVSX-NEXT: ld r3, 0(r3) 495; CHECK-NOVSX-NEXT: addi r4, r1, -16 496; CHECK-NOVSX-NEXT: std r3, -16(r1) 497; CHECK-NOVSX-NEXT: lvx v2, 0, r4 498; CHECK-NOVSX-NEXT: vspltw v2, v2, 3 499; CHECK-NOVSX-NEXT: blr 500entry: 501 %0 = load <8 x i8>, <8 x i8>* %ptr, align 8 502 %vecinit22 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 503 %1 = bitcast <16 x i8> %vecinit22 to <4 x i32> 504 ret <4 x i32> %1 505} 506 507; Function Attrs: norecurse nounwind readonly 508define dso_local <2 x i64> @testSplat8(<8 x i8>* nocapture readonly %ptr) local_unnamed_addr #0 { 509; CHECK-P8-LABEL: testSplat8: 510; CHECK-P8: # %bb.0: # %entry 511; CHECK-P8-NEXT: lxvdsx v2, 0, r3 512; CHECK-P8-NEXT: blr 513; 514; CHECK-P9-LABEL: testSplat8: 515; CHECK-P9: # %bb.0: # %entry 516; CHECK-P9-NEXT: lxvdsx v2, 0, r3 517; CHECK-P9-NEXT: blr 518; 519; CHECK-NOVSX-LABEL: testSplat8: 520; CHECK-NOVSX: # %bb.0: # %entry 521; CHECK-NOVSX-NEXT: ld r3, 0(r3) 522; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI19_0@toc@ha 523; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI19_0@toc@l 524; CHECK-NOVSX-NEXT: lvx v2, 0, r4 525; CHECK-NOVSX-NEXT: std r3, -16(r1) 526; CHECK-NOVSX-NEXT: addi r3, r1, -16 527; CHECK-NOVSX-NEXT: lvx v3, 0, r3 528; CHECK-NOVSX-NEXT: vperm v2, v3, v3, v2 529; CHECK-NOVSX-NEXT: blr 530entry: 531 %0 = load <8 x i8>, <8 x i8>* %ptr, align 8 532 %vecinit30 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 533 %1 = bitcast <16 x i8> %vecinit30 to <2 x i64> 534 ret <2 x i64> %1 535} 536 537declare double @dummy() local_unnamed_addr 538attributes #0 = { nounwind } 539