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1target datalayout = "e-m:e-i64:64-n32:64"
2target triple = "powerpc64le-unknown-linux-gnu"
3; This file mainly tests that one of the ISEL instruction in the group uses the same register for operand RT, RA, RB
4; This redudant ISEL is introduced during simple register coalescing stage.
5
6; Simple register coalescing first create the foldable ISEL instruction as we have seen in expand-foldable-isel.ll:
7; %vreg85<def> = ISEL8 %vreg83, %vreg83, %vreg33:sub_eq
8
9; Later the register coalescer figures out it could further coalesce %vreg85 with %vreg83:
10; merge %vreg85:1@2288r into %vreg83:5@400B --> @400B
11; erased:	2288r	%vreg85<def> = COPY %vreg83
12
13; After that we have:
14; updated: 1504B	%vreg83<def> = ISEL8 %vreg83, %vreg83, %vreg33:sub_eq
15
16; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -ppc-gen-isel=true < %s | FileCheck %s --check-prefix=CHECK-GEN-ISEL-TRUE
17; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck %s --implicit-check-not isel
18
19@.str = private unnamed_addr constant [3 x i8] c"]]\00", align 1
20@.str.1 = private unnamed_addr constant [35 x i8] c"Index < Length && \22Invalid index!\22\00", align 1
21@.str.2 = private unnamed_addr constant [50 x i8] c"/home/jtony/src/llvm/include/llvm/ADT/StringRef.h\00", align 1
22@__PRETTY_FUNCTION__._ZNK4llvm9StringRefixEm = private unnamed_addr constant [47 x i8] c"char llvm::StringRef::operator[](size_t) const\00", align 1
23@.str.3 = private unnamed_addr constant [95 x i8] c"(data || length == 0) && \22StringRef cannot be built from a NULL argument with non-null length\22\00", align 1
24@__PRETTY_FUNCTION__._ZN4llvm9StringRefC2EPKcm = private unnamed_addr constant [49 x i8] c"llvm::StringRef::StringRef(const char *, size_t)\00", align 1
25define i64 @_Z3fn1N4llvm9StringRefE([2 x i64] %Str.coerce) {
26entry:
27  %Str.coerce.fca.0.extract = extractvalue [2 x i64] %Str.coerce, 0
28  %Str.coerce.fca.1.extract = extractvalue [2 x i64] %Str.coerce, 1
29  br label %while.cond.outer
30while.cond.outer:
31  %Str.sroa.0.0.ph = phi i64 [ %8, %_ZNK4llvm9StringRef6substrEmm.exit ], [ %Str.coerce.fca.0.extract, %entry ]
32  %.sink.ph = phi i64 [ %sub.i, %_ZNK4llvm9StringRef6substrEmm.exit ], [ %Str.coerce.fca.1.extract, %entry ]
33  %BracketDepth.0.ph = phi i64 [ %BracketDepth.1, %_ZNK4llvm9StringRef6substrEmm.exit ], [ undef, %entry ]
34  %cmp65 = icmp eq i64 %BracketDepth.0.ph, 0
35  br i1 %cmp65, label %while.cond.us.preheader, label %while.cond.preheader
36while.cond.us.preheader:
37  br label %while.cond.us
38while.cond.preheader:
39  %cmp.i34129 = icmp eq i64 %.sink.ph, 0
40  br i1 %cmp.i34129, label %cond.false.i.loopexit135, label %_ZNK4llvm9StringRefixEm.exit.preheader
41_ZNK4llvm9StringRefixEm.exit.preheader:
42  br label %_ZNK4llvm9StringRefixEm.exit
43while.cond.us:
44  %Str.sroa.0.0.us = phi i64 [ %3, %_ZNK4llvm9StringRef6substrEmm.exit50.us ], [ %Str.sroa.0.0.ph, %while.cond.us.preheader ]
45  %.sink.us = phi i64 [ %sub.i41.us, %_ZNK4llvm9StringRef6substrEmm.exit50.us ], [ %.sink.ph, %while.cond.us.preheader ]
46  %cmp.i30.us = icmp ult i64 %.sink.us, 2
47  br i1 %cmp.i30.us, label %if.end.us, label %if.end.i.i.us
48if.end.i.i.us:
49  %0 = inttoptr i64 %Str.sroa.0.0.us to i8*
50  %call.i.i.us = tail call signext i32 @memcmp(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i64 2)
51  %phitmp.i.us = icmp eq i32 %call.i.i.us, 0
52  br i1 %phitmp.i.us, label %if.then, label %_ZNK4llvm9StringRefixEm.exit.us
53if.end.us:
54  %cmp.i34.us = icmp eq i64 %.sink.us, 0
55  br i1 %cmp.i34.us, label %cond.false.i.loopexit, label %_ZNK4llvm9StringRefixEm.exit.us
56_ZNK4llvm9StringRefixEm.exit.us:
57  %1 = inttoptr i64 %Str.sroa.0.0.us to i8*
58  %2 = load i8, i8* %1, align 1
59  switch i8 %2, label %_ZNK4llvm9StringRef6substrEmm.exit.loopexit [
60    i8 92, label %if.then4.us
61    i8 93, label %if.then9
62  ]
63if.then4.us:
64  %.sroa.speculated12.i38.us = select i1 %cmp.i30.us, i64 %.sink.us, i64 2
65  %add.ptr.i40.us = getelementptr inbounds i8, i8* %1, i64 %.sroa.speculated12.i38.us
66  %sub.i41.us = sub i64 %.sink.us, %.sroa.speculated12.i38.us
67  %tobool.i.i44.us = icmp ne i8* %add.ptr.i40.us, null
68  %cmp.i4.i45.us = icmp eq i64 %sub.i41.us, 0
69  %or.cond.i.i46.us = or i1 %tobool.i.i44.us, %cmp.i4.i45.us
70  br i1 %or.cond.i.i46.us, label %_ZNK4llvm9StringRef6substrEmm.exit50.us, label %cond.false.i.i47.loopexit
71_ZNK4llvm9StringRef6substrEmm.exit50.us:
72  %3 = ptrtoint i8* %add.ptr.i40.us to i64
73  br label %while.cond.us
74if.then:
75  ret i64 undef
76cond.false.i.loopexit:
77  br label %cond.false.i
78cond.false.i.loopexit134:
79  br label %cond.false.i
80cond.false.i.loopexit135:
81  br label %cond.false.i
82cond.false.i:
83  tail call void @__assert_fail(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0), i32 zeroext 225, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @__PRETTY_FUNCTION__._ZNK4llvm9StringRefixEm, i64 0, i64 0))
84  unreachable
85_ZNK4llvm9StringRefixEm.exit:
86  %.sink131 = phi i64 [ %sub.i41, %_ZNK4llvm9StringRef6substrEmm.exit50 ], [ %.sink.ph, %_ZNK4llvm9StringRefixEm.exit.preheader ]
87  %Str.sroa.0.0130 = phi i64 [ %6, %_ZNK4llvm9StringRef6substrEmm.exit50 ], [ %Str.sroa.0.0.ph, %_ZNK4llvm9StringRefixEm.exit.preheader ]
88  %4 = inttoptr i64 %Str.sroa.0.0130 to i8*
89  %5 = load i8, i8* %4, align 1
90  switch i8 %5, label %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 [
91    i8 92, label %if.then4
92    i8 93, label %if.end10
93  ]
94if.then4:
95  %cmp.i.i37 = icmp ult i64 %.sink131, 2
96  %.sroa.speculated12.i38 = select i1 %cmp.i.i37, i64 %.sink131, i64 2
97  %add.ptr.i40 = getelementptr inbounds i8, i8* %4, i64 %.sroa.speculated12.i38
98  %sub.i41 = sub i64 %.sink131, %.sroa.speculated12.i38
99  %tobool.i.i44 = icmp ne i8* %add.ptr.i40, null
100  %cmp.i4.i45 = icmp eq i64 %sub.i41, 0
101  %or.cond.i.i46 = or i1 %tobool.i.i44, %cmp.i4.i45
102  br i1 %or.cond.i.i46, label %_ZNK4llvm9StringRef6substrEmm.exit50, label %cond.false.i.i47.loopexit133
103cond.false.i.i47.loopexit:
104  br label %cond.false.i.i47
105cond.false.i.i47.loopexit133:
106  br label %cond.false.i.i47
107cond.false.i.i47:
108  tail call void @__assert_fail(i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0), i32 zeroext 90, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @__PRETTY_FUNCTION__._ZN4llvm9StringRefC2EPKcm, i64 0, i64 0))
109  unreachable
110_ZNK4llvm9StringRef6substrEmm.exit50:
111  %6 = ptrtoint i8* %add.ptr.i40 to i64
112  %cmp.i34 = icmp eq i64 %sub.i41, 0
113  br i1 %cmp.i34, label %cond.false.i.loopexit134, label %_ZNK4llvm9StringRefixEm.exit
114if.then9:
115  tail call void @exit(i32 signext 1)
116  unreachable
117if.end10:
118  %dec = add i64 %BracketDepth.0.ph, -1
119  br label %_ZNK4llvm9StringRef6substrEmm.exit
120_ZNK4llvm9StringRef6substrEmm.exit.loopexit:
121  br label %_ZNK4llvm9StringRef6substrEmm.exit
122_ZNK4llvm9StringRef6substrEmm.exit.loopexit132:
123  br label %_ZNK4llvm9StringRef6substrEmm.exit
124_ZNK4llvm9StringRef6substrEmm.exit:
125  %.sink76 = phi i64 [ %.sink131, %if.end10 ], [ %.sink.us, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %.sink131, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
126  %7 = phi i8* [ %4, %if.end10 ], [ %1, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %4, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
127  %BracketDepth.1 = phi i64 [ %dec, %if.end10 ], [ 0, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %BracketDepth.0.ph, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
128  %sub.i = add i64 %.sink76, -1
129  %add.ptr.i = getelementptr inbounds i8, i8* %7, i64 1
130  %8 = ptrtoint i8* %add.ptr.i to i64
131  br label %while.cond.outer
132
133; CHECK-LABEL: @_Z3fn1N4llvm9StringRefE
134; Unecessary ISEL (all the registers are the same) is always removed
135; CHECK-GEN-ISEL-TRUE-NOT: iseleq [[SAME:r[0-9]+]], [[SAME]], [[SAME]]
136; CHECK-GEN-ISEL-TRUE: iseleq [[SAME:r[0-9]+]], {{r[0-9]+}}, [[SAME]]
137; CHECK: bc 12, eq, [[TRUE:.LBB[0-9]+]]
138; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
139; CHECK-NEXT: [[TRUE]]
140; CHECK-NEXT: # in Loop: Header
141; CHECK-NEXT: addi {{r[0-9]+}}, {{r[0-9]+}}, 0
142; CHECK-NEXT: [[SUCCESSOR]]
143}
144
145
146
147declare void @exit(i32 signext)
148declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64)
149declare void @__assert_fail(i8*, i8*, i32 zeroext, i8*)
150