1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \ 3; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s 4; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown -verify-machineinstrs \ 5; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 6; RUN: FileCheck %s --check-prefix=CHECK-BE 7; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \ 8; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s \ 9; RUN: -check-prefix=CHECK-P8 10 11; Function Attrs: norecurse nounwind readnone 12define i64 @getPart1(fp128 %in) local_unnamed_addr { 13; CHECK-LABEL: getPart1: 14; CHECK: # %bb.0: # %entry 15; CHECK-NEXT: mfvsrld r3, v2 16; CHECK-NEXT: blr 17; 18; CHECK-BE-LABEL: getPart1: 19; CHECK-BE: # %bb.0: # %entry 20; CHECK-BE-NEXT: mfvsrld r3, v2 21; CHECK-BE-NEXT: blr 22; 23; CHECK-P8-LABEL: getPart1: 24; CHECK-P8: # %bb.0: # %entry 25; CHECK-P8-NEXT: blr 26entry: 27 %0 = bitcast fp128 %in to i128 28 %a.sroa.0.0.extract.trunc = trunc i128 %0 to i64 29 ret i64 %a.sroa.0.0.extract.trunc 30} 31 32; Function Attrs: norecurse nounwind readnone 33define i64 @getPart2(fp128 %in) local_unnamed_addr { 34; CHECK-LABEL: getPart2: 35; CHECK: # %bb.0: # %entry 36; CHECK-NEXT: mfvsrd r3, v2 37; CHECK-NEXT: blr 38; 39; CHECK-BE-LABEL: getPart2: 40; CHECK-BE: # %bb.0: # %entry 41; CHECK-BE-NEXT: mfvsrd r3, v2 42; CHECK-BE-NEXT: blr 43; 44; CHECK-P8-LABEL: getPart2: 45; CHECK-P8: # %bb.0: # %entry 46; CHECK-P8-NEXT: mr r3, r4 47; CHECK-P8-NEXT: blr 48entry: 49 %0 = bitcast fp128 %in to i128 50 %a.sroa.0.8.extract.shift = lshr i128 %0, 64 51 %a.sroa.0.8.extract.trunc = trunc i128 %a.sroa.0.8.extract.shift to i64 52 ret i64 %a.sroa.0.8.extract.trunc 53} 54 55; Function Attrs: norecurse nounwind readnone 56define i64 @checkBitcast(fp128 %in, <2 x i64> %in2, <2 x i64> *%out) local_unnamed_addr { 57; CHECK-LABEL: checkBitcast: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: mfvsrld r3, v2 60; CHECK-NEXT: vaddudm v2, v2, v3 61; CHECK-NEXT: stxv v2, 0(r7) 62; CHECK-NEXT: blr 63; 64; CHECK-BE-LABEL: checkBitcast: 65; CHECK-BE: # %bb.0: # %entry 66; CHECK-BE-NEXT: mfvsrd r3, v2 67; CHECK-BE-NEXT: vaddudm v2, v2, v3 68; CHECK-BE-NEXT: stxv v2, 0(r7) 69; CHECK-BE-NEXT: blr 70; 71; CHECK-P8-LABEL: checkBitcast: 72; CHECK-P8: # %bb.0: # %entry 73; CHECK-P8-NEXT: mtfprd f0, r3 74; CHECK-P8-NEXT: mtfprd f1, r4 75; CHECK-P8-NEXT: xxmrghd v3, vs1, vs0 76; CHECK-P8-NEXT: xxswapd vs0, v3 77; CHECK-P8-NEXT: vaddudm v2, v3, v2 78; CHECK-P8-NEXT: mffprd r3, f0 79; CHECK-P8-NEXT: xxswapd vs0, v2 80; CHECK-P8-NEXT: stxvd2x vs0, 0, r7 81; CHECK-P8-NEXT: blr 82entry: 83 %0 = bitcast fp128 %in to <2 x i64> 84 %1 = extractelement <2 x i64> %0, i64 0 85 %2 = add <2 x i64> %0, %in2 86 store <2 x i64> %2, <2 x i64> *%out, align 16 87 ret i64 %1 88} 89 90