1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \ 4; RUN: | FileCheck %s 5; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \ 6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \ 7; RUN: | FileCheck %s 8 9 @_ZL13StaticBoolVar = internal unnamed_addr global i8 0, align 1 10@_ZL19StaticSignedCharVar = internal unnamed_addr global i8 0, align 1 11@_ZL21StaticUnsignedCharVar = internal unnamed_addr global i8 0, align 1 12@_ZL20StaticSignedShortVar = internal unnamed_addr global i16 0, align 2 13@_ZL22StaticUnsignedShortVar = internal unnamed_addr global i16 0, align 2 14@_ZL18StaticSignedIntVar = internal unnamed_addr global i32 0, align 4 15@_ZL20StaticUnsignedIntVar = internal unnamed_addr global i32 0, align 4 16@_ZL19StaticSignedLongVar = internal unnamed_addr global i64 0, align 8 17@_ZL14StaticFloatVar = internal unnamed_addr global float 0.000000e+00, align 4 18@_ZL15StaticDoubleVar = internal unnamed_addr global double 0.000000e+00, align 8 19@_ZL19StaticLongDoubleVar = internal unnamed_addr global ppc_fp128 0xM00000000000000000000000000000000, align 16 20@_ZL23StaticSigned__Int128Var = internal unnamed_addr global i128 0, align 16 21@_ZL19Static__Float128Var = internal unnamed_addr global fp128 0xL00000000000000000000000000000000, align 16 22@_ZL25StaticVectorSignedCharVar = internal unnamed_addr global <16 x i8> zeroinitializer, align 16 23@_ZL26StaticVectorSignedShortVar = internal unnamed_addr global <8 x i16> zeroinitializer, align 16 24@_ZL24StaticVectorSignedIntVar = internal unnamed_addr global <4 x i32> zeroinitializer, align 16 25@_ZL29StaticVectorSignedLongLongVar = internal unnamed_addr global <2 x i64> zeroinitializer, align 16 26@_ZL29StaticVectorSigned__Int128Var = internal unnamed_addr global <1 x i128> zeroinitializer, align 16 27@_ZL20StaticVectorFloatVar = internal unnamed_addr global <4 x float> zeroinitializer, align 16 28@_ZL21StaticVectorDoubleVar = internal unnamed_addr global <2 x double> zeroinitializer, align 16 29 30 define zeroext i1 @_Z17ReadStaticBoolVarv() { 31; CHECK-LABEL: _Z17ReadStaticBoolVarv: 32; CHECK: # %bb.0: # %entry 33; CHECK-NEXT: plbz r3, _ZL13StaticBoolVar@PCREL(0), 1 34; CHECK-NEXT: blr 35entry: 36 %0 = load i8, i8* @_ZL13StaticBoolVar, align 1, !range !0 37 %tobool = icmp ne i8 %0, 0 38 ret i1 %tobool 39} 40 41 define signext i8 @_Z23ReadStaticSignedCharVarv() { 42; CHECK-LABEL: _Z23ReadStaticSignedCharVarv: 43; CHECK: # %bb.0: # %entry 44; CHECK-NEXT: plbz r3, _ZL19StaticSignedCharVar@PCREL(0), 1 45; CHECK-NEXT: extsb r3, r3 46; CHECK-NEXT: blr 47entry: 48 %0 = load i8, i8* @_ZL19StaticSignedCharVar, align 1 49 ret i8 %0 50} 51 52 define zeroext i8 @_Z25ReadStaticUnsignedCharVarv() { 53; CHECK-LABEL: _Z25ReadStaticUnsignedCharVarv: 54; CHECK: # %bb.0: # %entry 55; CHECK-NEXT: plbz r3, _ZL21StaticUnsignedCharVar@PCREL(0), 1 56; CHECK-NEXT: blr 57entry: 58 %0 = load i8, i8* @_ZL21StaticUnsignedCharVar, align 1 59 ret i8 %0 60} 61 62 define signext i16 @_Z24ReadStaticSignedShortVarv() { 63; CHECK-LABEL: _Z24ReadStaticSignedShortVarv: 64; CHECK: # %bb.0: # %entry 65; CHECK-NEXT: plha r3, _ZL20StaticSignedShortVar@PCREL(0), 1 66; CHECK-NEXT: blr 67entry: 68 %0 = load i16, i16* @_ZL20StaticSignedShortVar, align 2 69 ret i16 %0 70} 71 72 define zeroext i16 @_Z26ReadStaticUnsignedShortVarv() { 73; CHECK-LABEL: _Z26ReadStaticUnsignedShortVarv: 74; CHECK: # %bb.0: # %entry 75; CHECK-NEXT: plhz r3, _ZL22StaticUnsignedShortVar@PCREL(0), 1 76; CHECK-NEXT: blr 77entry: 78 %0 = load i16, i16* @_ZL22StaticUnsignedShortVar, align 2 79 ret i16 %0 80} 81 82 define signext i32 @_Z22ReadStaticSignedIntVarv() { 83; CHECK-LABEL: _Z22ReadStaticSignedIntVarv: 84; CHECK: # %bb.0: # %entry 85; CHECK-NEXT: plwa r3, _ZL18StaticSignedIntVar@PCREL(0), 1 86; CHECK-NEXT: blr 87entry: 88 %0 = load i32, i32* @_ZL18StaticSignedIntVar, align 4 89 ret i32 %0 90} 91 92 define zeroext i32 @_Z24ReadStaticUnsignedIntVarv() { 93; CHECK-LABEL: _Z24ReadStaticUnsignedIntVarv: 94; CHECK: # %bb.0: # %entry 95; CHECK-NEXT: plwz r3, _ZL20StaticUnsignedIntVar@PCREL(0), 1 96; CHECK-NEXT: blr 97entry: 98 %0 = load i32, i32* @_ZL20StaticUnsignedIntVar, align 4 99 ret i32 %0 100} 101 102 ; It is the same as unsigned long version 103define i64 @_Z23ReadStaticSignedLongVarv() { 104; CHECK-LABEL: _Z23ReadStaticSignedLongVarv: 105; CHECK: # %bb.0: # %entry 106; CHECK-NEXT: pld r3, _ZL19StaticSignedLongVar@PCREL(0), 1 107; CHECK-NEXT: blr 108entry: 109 %0 = load i64, i64* @_ZL19StaticSignedLongVar, align 8 110 ret i64 %0 111} 112 113 define float @_Z18ReadStaticFloatVarv() { 114; CHECK-LABEL: _Z18ReadStaticFloatVarv: 115; CHECK: # %bb.0: # %entry 116; CHECK-NEXT: plfs f1, _ZL14StaticFloatVar@PCREL(0), 1 117; CHECK-NEXT: blr 118entry: 119 %0 = load float, float* @_ZL14StaticFloatVar, align 4 120 ret float %0 121} 122 123 define double @_Z19ReadStaticDoubleVarv() { 124; CHECK-LABEL: _Z19ReadStaticDoubleVarv: 125; CHECK: # %bb.0: # %entry 126; CHECK-NEXT: plfd f1, _ZL15StaticDoubleVar@PCREL(0), 1 127; CHECK-NEXT: blr 128entry: 129 %0 = load double, double* @_ZL15StaticDoubleVar, align 8 130 ret double %0 131} 132 133 ; FIXME: 134define ppc_fp128 @_Z23ReadStaticLongDoubleVarv() { 135; CHECK-LABEL: _Z23ReadStaticLongDoubleVarv: 136; CHECK: # %bb.0: # %entry 137; CHECK-NEXT: plfd f1, _ZL19StaticLongDoubleVar@PCREL(0), 1 138; CHECK-NEXT: plfd f2, _ZL19StaticLongDoubleVar@PCREL+8(0), 1 139; CHECK-NEXT: blr 140entry: 141 %0 = load ppc_fp128, ppc_fp128* @_ZL19StaticLongDoubleVar, align 16 142 ret ppc_fp128 %0 143} 144 145 ; FIXME: 146define i128 @_Z27ReadStaticSigned__Int128Varv() { 147; CHECK-LABEL: _Z27ReadStaticSigned__Int128Varv: 148; CHECK: # %bb.0: # %entry 149; CHECK-NEXT: pld r3, _ZL23StaticSigned__Int128Var@PCREL(0), 1 150; CHECK-NEXT: pld r4, _ZL23StaticSigned__Int128Var@PCREL+8(0), 1 151; CHECK-NEXT: blr 152entry: 153 %0 = load i128, i128* @_ZL23StaticSigned__Int128Var, align 16 154 ret i128 %0 155} 156 157 define fp128 @_Z23ReadStatic__Float128Varv() { 158; CHECK-LABEL: _Z23ReadStatic__Float128Varv: 159; CHECK: # %bb.0: # %entry 160; CHECK-NEXT: plxv v2, _ZL19Static__Float128Var@PCREL(0), 1 161; CHECK-NEXT: blr 162entry: 163 %0 = load fp128, fp128* @_ZL19Static__Float128Var, align 16 164 ret fp128 %0 165} 166 167 define <16 x i8> @_Z29ReadStaticVectorSignedCharVarv() { 168; CHECK-LABEL: _Z29ReadStaticVectorSignedCharVarv: 169; CHECK: # %bb.0: # %entry 170; CHECK-NEXT: plxv v2, _ZL25StaticVectorSignedCharVar@PCREL(0), 1 171; CHECK-NEXT: blr 172entry: 173 %0 = load <16 x i8>, <16 x i8>* @_ZL25StaticVectorSignedCharVar, align 16 174 ret <16 x i8> %0 175} 176 177 define <8 x i16> @_Z30ReadStaticVectorSignedShortVarv() { 178; CHECK-LABEL: _Z30ReadStaticVectorSignedShortVarv: 179; CHECK: # %bb.0: # %entry 180; CHECK-NEXT: plxv v2, _ZL26StaticVectorSignedShortVar@PCREL(0), 1 181; CHECK-NEXT: blr 182entry: 183 %0 = load <8 x i16>, <8 x i16>* @_ZL26StaticVectorSignedShortVar, align 16 184 ret <8 x i16> %0 185} 186 187 define <4 x i32> @_Z28ReadStaticVectorSignedIntVarv() { 188; CHECK-LABEL: _Z28ReadStaticVectorSignedIntVarv: 189; CHECK: # %bb.0: # %entry 190; CHECK-NEXT: plxv v2, _ZL24StaticVectorSignedIntVar@PCREL(0), 1 191; CHECK-NEXT: blr 192entry: 193 %0 = load <4 x i32>, <4 x i32>* @_ZL24StaticVectorSignedIntVar, align 16 194 ret <4 x i32> %0 195} 196 197 define <2 x i64> @_Z33ReadStaticVectorSignedLongLongVarv() { 198; CHECK-LABEL: _Z33ReadStaticVectorSignedLongLongVarv: 199; CHECK: # %bb.0: # %entry 200; CHECK-NEXT: plxv v2, _ZL29StaticVectorSignedLongLongVar@PCREL(0), 1 201; CHECK-NEXT: blr 202entry: 203 %0 = load <2 x i64>, <2 x i64>* @_ZL29StaticVectorSignedLongLongVar, align 16 204 ret <2 x i64> %0 205} 206 207 define <1 x i128> @_Z33ReadStaticVectorSigned__Int128Varv() { 208; CHECK-LABEL: _Z33ReadStaticVectorSigned__Int128Varv: 209; CHECK: # %bb.0: # %entry 210; CHECK-NEXT: plxv v2, _ZL29StaticVectorSigned__Int128Var@PCREL(0), 1 211; CHECK-NEXT: blr 212entry: 213 %0 = load <1 x i128>, <1 x i128>* @_ZL29StaticVectorSigned__Int128Var, align 16 214 ret <1 x i128> %0 215} 216 217 define <4 x float> @_Z24ReadStaticVectorFloatVarv() { 218; CHECK-LABEL: _Z24ReadStaticVectorFloatVarv: 219; CHECK: # %bb.0: # %entry 220; CHECK-NEXT: plxv v2, _ZL20StaticVectorFloatVar@PCREL(0), 1 221; CHECK-NEXT: blr 222entry: 223 %0 = load <4 x float>, <4 x float>* @_ZL20StaticVectorFloatVar, align 16 224 ret <4 x float> %0 225} 226 227 define <2 x double> @_Z25ReadStaticVectorDoubleVarv() { 228; CHECK-LABEL: _Z25ReadStaticVectorDoubleVarv: 229; CHECK: # %bb.0: # %entry 230; CHECK-NEXT: plxv v2, _ZL21StaticVectorDoubleVar@PCREL(0), 1 231; CHECK-NEXT: blr 232entry: 233 %0 = load <2 x double>, <2 x double>* @_ZL21StaticVectorDoubleVar, align 16 234 ret <2 x double> %0 235} 236 237 !0 = !{i8 0, i8 2} 238 239 define void @_Z18WriteStaticBoolVarb(i1 zeroext %val) { 240; CHECK-LABEL: _Z18WriteStaticBoolVarb: 241; CHECK: # %bb.0: # %entry 242; CHECK-NEXT: pstb r3, _ZL13StaticBoolVar@PCREL(0), 1 243; CHECK-NEXT: blr 244entry: 245 %frombool = zext i1 %val to i8 246 store i8 %frombool, i8* @_ZL13StaticBoolVar, align 1 247 ret void 248} 249 250 define void @_Z24WriteStaticSignedCharVara(i8 signext %val) { 251; CHECK-LABEL: _Z24WriteStaticSignedCharVara: 252; CHECK: # %bb.0: # %entry 253; CHECK-NEXT: pstb r3, _ZL19StaticSignedCharVar@PCREL(0), 1 254; CHECK-NEXT: blr 255entry: 256 store i8 %val, i8* @_ZL19StaticSignedCharVar, align 1 257 ret void 258} 259 260 define void @_Z26WriteStaticUnsignedCharVarh(i8 zeroext %val){ 261; CHECK-LABEL: _Z26WriteStaticUnsignedCharVarh: 262; CHECK: # %bb.0: # %entry 263; CHECK-NEXT: pstb r3, _ZL21StaticUnsignedCharVar@PCREL(0), 1 264; CHECK-NEXT: blr 265entry: 266 store i8 %val, i8* @_ZL21StaticUnsignedCharVar, align 1 267 ret void 268} 269 270 define void @_Z25WriteStaticSignedShortVars(i16 signext %val) { 271; CHECK-LABEL: _Z25WriteStaticSignedShortVars: 272; CHECK: # %bb.0: # %entry 273; CHECK-NEXT: psth r3, _ZL20StaticSignedShortVar@PCREL(0), 1 274; CHECK-NEXT: blr 275entry: 276 store i16 %val, i16* @_ZL20StaticSignedShortVar, align 2 277 ret void 278} 279 280 define void @_Z27WriteStaticUnsignedShortVart(i16 zeroext %val) { 281; CHECK-LABEL: _Z27WriteStaticUnsignedShortVart: 282; CHECK: # %bb.0: # %entry 283; CHECK-NEXT: psth r3, _ZL22StaticUnsignedShortVar@PCREL(0), 1 284; CHECK-NEXT: blr 285entry: 286 store i16 %val, i16* @_ZL22StaticUnsignedShortVar, align 2 287 ret void 288} 289 290 define void @_Z23WriteStaticSignedIntVari(i32 signext %val) { 291; CHECK-LABEL: _Z23WriteStaticSignedIntVari: 292; CHECK: # %bb.0: # %entry 293; CHECK-NEXT: pstw r3, _ZL18StaticSignedIntVar@PCREL(0), 1 294; CHECK-NEXT: blr 295entry: 296 store i32 %val, i32* @_ZL18StaticSignedIntVar, align 4 297 ret void 298} 299 300 define void @_Z25WriteStaticUnsignedIntVarj(i32 zeroext %val) { 301; CHECK-LABEL: _Z25WriteStaticUnsignedIntVarj: 302; CHECK: # %bb.0: # %entry 303; CHECK-NEXT: pstw r3, _ZL20StaticUnsignedIntVar@PCREL(0), 1 304; CHECK-NEXT: blr 305entry: 306 store i32 %val, i32* @_ZL20StaticUnsignedIntVar, align 4 307 ret void 308} 309 310 define void @_Z24WriteStaticSignedLongVarl(i64 %val) { 311; CHECK-LABEL: _Z24WriteStaticSignedLongVarl: 312; CHECK: # %bb.0: # %entry 313; CHECK-NEXT: pstd r3, _ZL19StaticSignedLongVar@PCREL(0), 1 314; CHECK-NEXT: blr 315entry: 316 store i64 %val, i64* @_ZL19StaticSignedLongVar, align 8 317 ret void 318} 319 320 define void @_Z19WriteStaticFloatVarf(float %val) { 321; CHECK-LABEL: _Z19WriteStaticFloatVarf: 322; CHECK: # %bb.0: # %entry 323; CHECK-NEXT: pstfs f1, _ZL14StaticFloatVar@PCREL(0), 1 324; CHECK-NEXT: blr 325entry: 326 store float %val, float* @_ZL14StaticFloatVar, align 4 327 ret void 328} 329 330 define void @_Z20WriteStaticDoubleVard(double %val) { 331; CHECK-LABEL: _Z20WriteStaticDoubleVard: 332; CHECK: # %bb.0: # %entry 333; CHECK-NEXT: pstfd f1, _ZL15StaticDoubleVar@PCREL(0), 1 334; CHECK-NEXT: blr 335entry: 336 store double %val, double* @_ZL15StaticDoubleVar, align 8 337 ret void 338} 339 340 ; FIXME: 341define void @_Z24WriteStaticLongDoubleVarg(ppc_fp128 %val) { 342; CHECK-LABEL: _Z24WriteStaticLongDoubleVarg: 343; CHECK: # %bb.0: # %entry 344; CHECK-NEXT: pstfd f2, _ZL19StaticLongDoubleVar@PCREL+8(0), 1 345; CHECK-NEXT: pstfd f1, _ZL19StaticLongDoubleVar@PCREL(0), 1 346; CHECK-NEXT: blr 347entry: 348 store ppc_fp128 %val, ppc_fp128* @_ZL19StaticLongDoubleVar, align 16 349 ret void 350} 351 352 ; FIXME: 353define void @_Z28WriteStaticSigned__Int128Varn(i128 %val) { 354; CHECK-LABEL: _Z28WriteStaticSigned__Int128Varn: 355; CHECK: # %bb.0: # %entry 356; CHECK-NEXT: pstd r4, _ZL23StaticSigned__Int128Var@PCREL+8(0), 1 357; CHECK-NEXT: pstd r3, _ZL23StaticSigned__Int128Var@PCREL(0), 1 358; CHECK-NEXT: blr 359entry: 360 store i128 %val, i128* @_ZL23StaticSigned__Int128Var, align 16 361 ret void 362} 363 364 define void @_Z24WriteStatic__Float128Varu9__ieee128(fp128 %val) { 365; CHECK-LABEL: _Z24WriteStatic__Float128Varu9__ieee128: 366; CHECK: # %bb.0: # %entry 367; CHECK-NEXT: pstxv v2, _ZL19Static__Float128Var@PCREL(0), 1 368; CHECK-NEXT: blr 369entry: 370 store fp128 %val, fp128* @_ZL19Static__Float128Var, align 16 371 ret void 372} 373 374 define void @_Z30WriteStaticVectorSignedCharVarDv16_a(<16 x i8> %val) { 375; CHECK-LABEL: _Z30WriteStaticVectorSignedCharVarDv16_a: 376; CHECK: # %bb.0: # %entry 377; CHECK-NEXT: pstxv v2, _ZL25StaticVectorSignedCharVar@PCREL(0), 1 378; CHECK-NEXT: blr 379entry: 380 store <16 x i8> %val, <16 x i8>* @_ZL25StaticVectorSignedCharVar, align 16 381 ret void 382} 383 384 define void @_Z31WriteStaticVectorSignedShortVarDv8_s(<8 x i16> %val) { 385; CHECK-LABEL: _Z31WriteStaticVectorSignedShortVarDv8_s: 386; CHECK: # %bb.0: # %entry 387; CHECK-NEXT: pstxv v2, _ZL26StaticVectorSignedShortVar@PCREL(0), 1 388; CHECK-NEXT: blr 389entry: 390 store <8 x i16> %val, <8 x i16>* @_ZL26StaticVectorSignedShortVar, align 16 391 ret void 392} 393 394 define void @_Z29WriteStaticVectorSignedIntVarDv4_i(<4 x i32> %val) { 395; CHECK-LABEL: _Z29WriteStaticVectorSignedIntVarDv4_i: 396; CHECK: # %bb.0: # %entry 397; CHECK-NEXT: pstxv v2, _ZL24StaticVectorSignedIntVar@PCREL(0), 1 398; CHECK-NEXT: blr 399entry: 400 store <4 x i32> %val, <4 x i32>* @_ZL24StaticVectorSignedIntVar, align 16 401 ret void 402} 403 404 define void @_Z34WriteStaticVectorSignedLongLongVarDv2_x(<2 x i64> %val) { 405; CHECK-LABEL: _Z34WriteStaticVectorSignedLongLongVarDv2_x: 406; CHECK: # %bb.0: # %entry 407; CHECK-NEXT: pstxv v2, _ZL29StaticVectorSignedLongLongVar@PCREL(0), 1 408; CHECK-NEXT: blr 409entry: 410 store <2 x i64> %val, <2 x i64>* @_ZL29StaticVectorSignedLongLongVar, align 16 411 ret void 412} 413 414 define void @_Z34WriteStaticVectorSigned__Int128VarDv1_n(<1 x i128> %val) { 415; CHECK-LABEL: _Z34WriteStaticVectorSigned__Int128VarDv1_n: 416; CHECK: # %bb.0: # %entry 417; CHECK-NEXT: pstxv v2, _ZL29StaticVectorSigned__Int128Var@PCREL(0), 1 418; CHECK-NEXT: blr 419entry: 420 store <1 x i128> %val, <1 x i128>* @_ZL29StaticVectorSigned__Int128Var, align 16 421 ret void 422} 423 424 define void @_Z25WriteStaticVectorFloatVarDv4_f(<4 x float> %val) { 425; CHECK-LABEL: _Z25WriteStaticVectorFloatVarDv4_f: 426; CHECK: # %bb.0: # %entry 427; CHECK-NEXT: pstxv v2, _ZL20StaticVectorFloatVar@PCREL(0), 1 428; CHECK-NEXT: blr 429entry: 430 store <4 x float> %val, <4 x float>* @_ZL20StaticVectorFloatVar, align 16 431 ret void 432} 433 434 define void @_Z26WriteStaticVectorDoubleVarDv2_d(<2 x double> %val) { 435; CHECK-LABEL: _Z26WriteStaticVectorDoubleVarDv2_d: 436; CHECK: # %bb.0: # %entry 437; CHECK-NEXT: pstxv v2, _ZL21StaticVectorDoubleVar@PCREL(0), 1 438; CHECK-NEXT: blr 439entry: 440 store <2 x double> %val, <2 x double>* @_ZL21StaticVectorDoubleVar, align 16 441 ret void 442} 443 444 @_ZL3ptr = internal unnamed_addr global i32* null, align 8 445define void @_Z14WriteStaticPtrv() { 446; CHECK-LABEL: _Z14WriteStaticPtrv: 447; CHECK: # %bb.0: # %entry 448; CHECK-NEXT: pld r3, _ZL3ptr@PCREL(0), 1 449; CHECK-NEXT: li r4, 3 450; CHECK-NEXT: stw r4, 0(r3) 451; CHECK-NEXT: blr 452entry: 453 %0 = load i32*, i32** @_ZL3ptr, align 8 454 store i32 3, i32* %0, align 4 455 ret void 456} 457 458 @.str = private unnamed_addr constant [13 x i8] c"Hello World\0A\00", align 1 459@str = dso_local local_unnamed_addr global i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), align 8 460 461 define zeroext i8 @_Z17Char0InStrLiteralv() { 462; CHECK-LABEL: _Z17Char0InStrLiteralv: 463; CHECK: # %bb.0: # %entry 464; CHECK-NEXT: pld r3, str@PCREL(0), 1 465; CHECK-NEXT: lbz r3, 0(r3) 466; CHECK-NEXT: blr 467entry: 468 %0 = load i8*, i8** @str, align 8 469 %1 = load i8, i8* %0, align 1 470 ret i8 %1 471} 472 473 define zeroext i8 @_Z17Char3InStrLiteralv() { 474; CHECK-LABEL: _Z17Char3InStrLiteralv: 475; CHECK: # %bb.0: # %entry 476; CHECK-NEXT: pld r3, str@PCREL(0), 1 477; CHECK-NEXT: lbz r3, 3(r3) 478; CHECK-NEXT: blr 479entry: 480 %0 = load i8*, i8** @str, align 8 481 %arrayidx = getelementptr inbounds i8, i8* %0, i64 3 482 %1 = load i8, i8* %arrayidx, align 1 483 ret i8 %1 484} 485 486 @_ZL5array = internal global [10 x i32] zeroinitializer, align 4 487 488 ; FIXME: 489define signext i32 @_Z15ReadStaticArrayv() { 490; CHECK-LABEL: _Z15ReadStaticArrayv: 491; CHECK: # %bb.0: # %entry 492; CHECK-NEXT: plwa r3, _ZL5array@PCREL+12(0), 1 493; CHECK-NEXT: blr 494entry: 495 %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @_ZL5array, i64 0, i64 3), align 4 496 ret i32 %0 497} 498 499 ; FIXME: 500define void @_Z16WriteStaticArrayv() { 501; CHECK-LABEL: _Z16WriteStaticArrayv: 502; CHECK: # %bb.0: # %entry 503; CHECK-NEXT: li r3, 5 504; CHECK-NEXT: pstw r3, _ZL5array@PCREL+12(0), 1 505; CHECK-NEXT: blr 506entry: 507 store i32 5, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @_ZL5array, i64 0, i64 3), align 4 508 ret void 509} 510 511 %struct.Struct = type { i8, i16, i32 } 512 513 ; FIXME: 514@_ZL9structure = internal global %struct.Struct zeroinitializer, align 4 515define signext i32 @_Z16ReadStaticStructv() { 516; CHECK-LABEL: _Z16ReadStaticStructv: 517; CHECK: # %bb.0: # %entry 518; CHECK-NEXT: plwa r3, _ZL9structure@PCREL+4(0), 1 519; CHECK-NEXT: blr 520entry: 521 %0 = load i32, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @_ZL9structure, i64 0, i32 2), align 4 522 ret i32 %0 523} 524 525 ; FIXME 526define void @_Z17WriteStaticStructv() { 527; CHECK-LABEL: _Z17WriteStaticStructv: 528; CHECK: # %bb.0: # %entry 529; CHECK-NEXT: li r3, 3 530; CHECK-NEXT: pstw r3, _ZL9structure@PCREL+4(0), 1 531; CHECK-NEXT: blr 532entry: 533 store i32 3, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @_ZL9structure, i64 0, i32 2), align 4 534 ret void 535} 536 537