1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -o - \ 3; RUN: -ppc-asm-full-reg-names -verify-machineinstrs %s | FileCheck %s 4 5; Function Attrs: nounwind 6define dso_local zeroext i32 @test(i32 signext %l) nounwind { 7; CHECK-LABEL: test: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: mflr r0 10; CHECK-NEXT: std r0, 16(r1) 11; CHECK-NEXT: stdu r1, -32(r1) 12; CHECK-NEXT: addi r3, r3, -1 13; CHECK-NEXT: cmplwi r3, 5 14; CHECK-NEXT: bgt cr0, .LBB0_3 15; CHECK-NEXT: # %bb.1: # %entry 16; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 17; CHECK-NEXT: rldic r3, r3, 2, 30 18; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 19; CHECK-NEXT: lwax r3, r3, r4 20; CHECK-NEXT: add r3, r3, r4 21; CHECK-NEXT: mtctr r3 22; CHECK-NEXT: bctr 23; CHECK-NEXT: .LBB0_2: # %sw.bb 24; CHECK-NEXT: li r3, 2 25; CHECK-NEXT: bl test1 26; CHECK-NEXT: nop 27; CHECK-NEXT: b .LBB0_10 28; CHECK-NEXT: .LBB0_3: # %sw.default 29; CHECK-NEXT: li r3, 1 30; CHECK-NEXT: bl test1 31; CHECK-NEXT: nop 32; CHECK-NEXT: bl test3 33; CHECK-NEXT: nop 34; CHECK-NEXT: b .LBB0_10 35; CHECK-NEXT: .LBB0_4: # %sw.bb3 36; CHECK-NEXT: li r3, 3 37; CHECK-NEXT: b .LBB0_9 38; CHECK-NEXT: .LBB0_5: # %sw.bb5 39; CHECK-NEXT: li r3, 4 40; CHECK-NEXT: bl test2 41; CHECK-NEXT: nop 42; CHECK-NEXT: bl test3 43; CHECK-NEXT: nop 44; CHECK-NEXT: b .LBB0_10 45; CHECK-NEXT: .LBB0_6: # %sw.bb8 46; CHECK-NEXT: li r3, 5 47; CHECK-NEXT: bl test4 48; CHECK-NEXT: nop 49; CHECK-NEXT: b .LBB0_10 50; CHECK-NEXT: .LBB0_7: # %sw.bb10 51; CHECK-NEXT: li r3, 66 52; CHECK-NEXT: bl test4 53; CHECK-NEXT: nop 54; CHECK-NEXT: bl test1 55; CHECK-NEXT: nop 56; CHECK-NEXT: b .LBB0_10 57; CHECK-NEXT: .LBB0_8: # %sw.bb13 58; CHECK-NEXT: li r3, 66 59; CHECK-NEXT: .LBB0_9: # %return 60; CHECK-NEXT: bl test2 61; CHECK-NEXT: nop 62; CHECK-NEXT: .LBB0_10: # %return 63; CHECK-NEXT: clrldi r3, r3, 32 64; CHECK-NEXT: addi r1, r1, 32 65; CHECK-NEXT: ld r0, 16(r1) 66; CHECK-NEXT: mtlr r0 67; CHECK-NEXT: blr 68entry: 69 switch i32 %l, label %sw.default [ 70 i32 1, label %sw.bb 71 i32 2, label %sw.bb3 72 i32 3, label %sw.bb5 73 i32 4, label %sw.bb8 74 i32 5, label %sw.bb10 75 i32 6, label %sw.bb13 76 ] 77 78sw.default: ; preds = %entry 79 %call = tail call signext i32 @test1(i32 signext 1) 80 %call1 = tail call signext i32 @test3(i32 signext %call) 81 br label %return 82 83sw.bb: ; preds = %entry 84 %call2 = tail call signext i32 @test1(i32 signext 2) 85 br label %return 86 87sw.bb3: ; preds = %entry 88 %call4 = tail call signext i32 @test2(i32 signext 3) 89 br label %return 90 91sw.bb5: ; preds = %entry 92 %call6 = tail call signext i32 @test2(i32 signext 4) 93 %call7 = tail call signext i32 @test3(i32 signext %call6) 94 br label %return 95 96sw.bb8: ; preds = %entry 97 %call9 = tail call signext i32 @test4(i32 signext 5) 98 br label %return 99 100sw.bb10: ; preds = %entry 101 %call11 = tail call signext i32 @test4(i32 signext 66) 102 %call12 = tail call signext i32 @test1(i32 signext %call11) 103 br label %return 104 105sw.bb13: ; preds = %entry 106 %call14 = tail call signext i32 @test2(i32 signext 66) 107 br label %return 108 109return: ; preds = %sw.bb13, %sw.bb10, %sw.bb8, %sw.bb5, %sw.bb3, %sw.bb, %sw.default 110 %retval.0 = phi i32 [ %call1, %sw.default ], [ %call14, %sw.bb13 ], [ %call12, %sw.bb10 ], [ %call9, %sw.bb8 ], [ %call7, %sw.bb5 ], [ %call4, %sw.bb3 ], [ %call2, %sw.bb ] 111 ret i32 %retval.0 112} 113 114declare signext i32 @test3(i32 signext) 115 116declare signext i32 @test1(i32 signext) 117 118declare signext i32 @test2(i32 signext) 119 120declare signext i32 @test4(i32 signext) 121