• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1# RUN: llc -mtriple powerpc64le-unknown-linux-gnu %s -o - 2>&1 \
2# RUN:   -run-pass=livevars,phi-node-elimination -verify-machineinstrs | \
3# RUN:   FileCheck %s
4
5--- |
6  define float @testfloatslt(float %c1, float %c2, float %c3, float %c4, float %a1, float %a2) {
7  entry:
8    %cmp1 = fcmp oeq float %c3, %c4
9    %cmp3tmp = fcmp oeq float %c1, %c2
10    %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
11    %cond = select i1 %cmp3, float %a1, float %a2
12    ret float %cond
13  }
14
15  define signext i32 @select-i1-vs-i1(i8** nocapture dereferenceable(8) %p) #0 {
16  entry:
17    %.pre = load i8*, i8** %p, align 8
18    br label %loop
19
20  loop:                                             ; preds = %loop, %if.then3, %entry
21    %0 = phi i8* [ %.pre, %entry ], [ %incdec.ptr4, %if.then3 ], [ %incdec.ptr, %loop ]
22    %1 = load i8, i8* %0, align 1
23    %tobool = icmp eq i8 %1, 0
24    %incdec.ptr = getelementptr inbounds i8, i8* %0, i64 1
25    store i8* %incdec.ptr, i8** %p, align 8
26    %2 = load i8, i8* %incdec.ptr, align 1
27    %tobool2 = icmp ne i8 %2, 0
28    %or.cond = and i1 %tobool, %tobool2
29    br i1 %or.cond, label %if.then3, label %loop
30
31  if.then3:                                         ; preds = %loop
32    %incdec.ptr4 = getelementptr inbounds i8, i8* %0, i64 2
33    store i8* %incdec.ptr4, i8** %p, align 8
34    br label %loop
35  }
36
37...
38---
39name:            testfloatslt
40tracksRegLiveness: true
41registers:
42  - { id: 0, class: f4rc, preferred-register: '' }
43  - { id: 1, class: f4rc, preferred-register: '' }
44  - { id: 2, class: f4rc, preferred-register: '' }
45  - { id: 3, class: f4rc, preferred-register: '' }
46  - { id: 4, class: f4rc, preferred-register: '' }
47  - { id: 5, class: f4rc, preferred-register: '' }
48  - { id: 6, class: crrc, preferred-register: '' }
49  - { id: 7, class: crbitrc, preferred-register: '' }
50  - { id: 8, class: crrc, preferred-register: '' }
51  - { id: 9, class: crbitrc, preferred-register: '' }
52  - { id: 10, class: crbitrc, preferred-register: '' }
53  - { id: 11, class: f4rc, preferred-register: '' }
54liveins:
55  - { reg: '$f1', virtual-reg: '%0' }
56  - { reg: '$f2', virtual-reg: '%1' }
57  - { reg: '$f3', virtual-reg: '%2' }
58  - { reg: '$f4', virtual-reg: '%3' }
59  - { reg: '$f5', virtual-reg: '%4' }
60  - { reg: '$f6', virtual-reg: '%5' }
61body:             |
62  bb.0.entry:
63    successors: %bb.2(0x20000000), %bb.1(0x60000000)
64    liveins: $f1, $f2, $f3, $f4, $f5, $f6
65
66    %5:f4rc = COPY killed $f6
67    %4:f4rc = COPY killed $f5
68    %3:f4rc = COPY killed $f4
69    %2:f4rc = COPY killed $f3
70    %1:f4rc = COPY killed $f2
71    %0:f4rc = COPY killed $f1
72    %6:crrc = FCMPUS killed %2, killed %3
73    %7:crbitrc = COPY killed %6.sub_eq
74    BC killed %7, %bb.2
75    B %bb.1
76
77  bb.1.entry:
78    successors: %bb.2(0x2aaaaaab), %bb.3(0x55555555)
79
80    %8:crrc = FCMPUS killed %0, killed %1
81    %9:crbitrc = COPY killed %8.sub_eq
82    BC killed %9, %bb.3
83
84  bb.2.entry:
85    successors: %bb.3(0x80000000)
86
87
88  bb.3.entry:
89    %11:f4rc = PHI %5, %bb.2, %4, %bb.1
90    $f1 = COPY killed %11
91    BLR8 implicit $lr8, implicit $rm, implicit killed $f1
92
93...
94---
95name:            select-i1-vs-i1
96alignment:       16
97exposesReturnsTwice: false
98legalized:       false
99regBankSelected: false
100selected:        false
101failedISel:      false
102tracksRegLiveness: true
103hasWinCFI:       false
104registers:
105  - { id: 0, class: g8rc, preferred-register: '' }
106  - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' }
107  - { id: 2, class: g8rc, preferred-register: '' }
108  - { id: 3, class: g8rc, preferred-register: '' }
109  - { id: 4, class: g8rc_and_g8rc_nox0, preferred-register: '' }
110  - { id: 5, class: gprc, preferred-register: '' }
111  - { id: 6, class: crrc, preferred-register: '' }
112  - { id: 7, class: crbitrc, preferred-register: '' }
113  - { id: 8, class: gprc, preferred-register: '' }
114  - { id: 9, class: crrc, preferred-register: '' }
115  - { id: 10, class: crbitrc, preferred-register: '' }
116  - { id: 11, class: crbitrc, preferred-register: '' }
117liveins:
118  - { reg: '$x3', virtual-reg: '%4' }
119frameInfo:
120  isFrameAddressTaken: false
121  isReturnAddressTaken: false
122  hasStackMap:     false
123  hasPatchPoint:   false
124  stackSize:       0
125  offsetAdjustment: 0
126  maxAlignment:    1
127  adjustsStack:    false
128  hasCalls:        false
129  stackProtector:  ''
130  maxCallFrameSize: 4294967295
131  cvBytesOfCalleeSavedRegisters: 0
132  hasOpaqueSPAdjustment: false
133  hasVAStart:      false
134  hasMustTailInVarArgFunc: false
135  localFrameSize:  0
136  savePoint:       ''
137  restorePoint:    ''
138fixedStack:      []
139stack:           []
140callSites:       []
141constants:       []
142machineFunctionInfo: {}
143body:             |
144  bb.0.entry:
145    successors: %bb.1(0x80000000)
146    liveins: $x3
147
148    %4:g8rc_and_g8rc_nox0 = COPY killed $x3
149    %0:g8rc = LD 0, %4 :: (dereferenceable load 8 from %ir.p)
150
151  bb.1.loop:
152    successors: %bb.1(0x20000000), %bb.2(0x60000000)
153
154    %1:g8rc_and_g8rc_nox0 = PHI %0, %bb.0, %2, %bb.1, %3, %bb.3, %2, %bb.2
155    %5:gprc = LBZ 0, %1 :: (load 1 from %ir.0)
156    %6:crrc = CMPWI killed %5, 0
157    %7:crbitrc = COPY killed %6.sub_eq
158    %2:g8rc = nuw ADDI8 %1, 1
159    STD %2, 0, %4 :: (store 8 into %ir.p)
160    %8:gprc = LBZ 1, %1 :: (load 1 from %ir.incdec.ptr)
161    BCn killed %7, %bb.1
162    B %bb.2
163
164  bb.2.loop:
165    successors: %bb.3(0x55555555), %bb.1(0x2aaaaaab)
166
167    %9:crrc = CMPWI killed %8, 0
168    %10:crbitrc = COPY killed %9.sub_eq
169    BC killed %10, %bb.1
170    B %bb.3
171
172  bb.3.if.then3:
173    successors: %bb.1(0x80000000)
174
175    %3:g8rc = nuw ADDI8 killed %1, 2
176    STD %3, 0, %4 :: (store 8 into %ir.p)
177    B %bb.1
178
179  ; CHECK-LABEL: name: testfloatslt
180  ; CHECK: bb.0.entry:
181  ; CHECK:   successors: %bb.1(0x80000000)
182  ; CHECK:   liveins: $x3
183
184  ; CHECK:   %4:g8rc_and_g8rc_nox0 = COPY killed $x3
185  ; CHECK:   %0:g8rc = LD 0, %4 :: (dereferenceable load 8 from %ir.p)
186  ; CHECK:   %12:g8rc_and_g8rc_nox0 = COPY killed %0
187
188  ; CHECK: bb.1.loop:
189  ; CHECK:   successors: %bb.1(0x20000000), %bb.2(0x60000000)
190
191  ; CHECK:   %1:g8rc_and_g8rc_nox0 = COPY killed %12
192  ; CHECK:   %5:gprc = LBZ 0, %1 :: (load 1 from %ir.0)
193  ; CHECK:   %6:crrc = CMPWI killed %5, 0
194  ; CEHCK:   %7:crbitrc = COPY killed %6.sub_eq
195  ; CHECK:   %2:g8rc = nuw ADDI8 %1, 1
196  ; CHECK:   STD %2, 0, %4 :: (store 8 into %ir.p)
197  ; CHECK:   %8:gprc = LBZ 1, %1 :: (load 1 from %ir.incdec.ptr)
198  ; CHECK:   %12:g8rc_and_g8rc_nox0 = COPY %2
199  ; CHECK:   BCn killed %7, %bb.1
200  ; CHECK:   B %bb.2
201
202  ; CHECK: bb.2.loop:
203  ; CHECK:   successors: %bb.3(0x55555555), %bb.1(0x2aaaaaab)
204
205  ; CHECK:   %9:crrc = CMPWI killed %8, 0
206  ; CHECK:   %10:crbitrc = COPY killed %9.sub_eq
207  ; CHECK:   %12:g8rc_and_g8rc_nox0 = COPY killed %2
208  ; CHECK:   BC killed %10, %bb.1
209  ; CHECK:   B %bb.3
210
211  ; CHECK: bb.3.if.then3:
212  ; CHECK:   successors: %bb.1(0x80000000)
213
214  ; CHECK:   %3:g8rc = nuw ADDI8 killed %1, 2
215  ; CHECK:   STD %3, 0, %4 :: (store 8 into %ir.p)
216  ; CHECK:   %12:g8rc_and_g8rc_nox0 = COPY killed %3
217  ; CHECK:   B %bb.1
218
219...
220