1; RUN: llc -verify-machineinstrs -mcpu=pwr9 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 2; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 3; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-DFLT,CHECK-ALL %s 4 5declare <2 x double> @__cbrtd2_massv(<2 x double>) 6declare <4 x float> @__cbrtf4_massv(<4 x float>) 7 8declare <2 x double> @__powd2_massv(<2 x double>, <2 x double>) 9declare <4 x float> @__powf4_massv(<4 x float>, <4 x float>) 10 11declare <2 x double> @__sqrtd2_massv(<2 x double>) 12declare <4 x float> @__sqrtf4_massv(<4 x float>) 13 14declare <2 x double> @__expd2_massv(<2 x double>) 15declare <4 x float> @__expf4_massv(<4 x float>) 16 17declare <2 x double> @__exp2d2_massv(<2 x double>) 18declare <4 x float> @__exp2f4_massv(<4 x float>) 19 20declare <2 x double> @__expm1d2_massv(<2 x double>) 21declare <4 x float> @__expm1f4_massv(<4 x float>) 22 23declare <2 x double> @__logd2_massv(<2 x double>) 24declare <4 x float> @__logf4_massv(<4 x float>) 25 26declare <2 x double> @__log1pd2_massv(<2 x double>) 27declare <4 x float> @__log1pf4_massv(<4 x float>) 28 29declare <2 x double> @__log10d2_massv(<2 x double>) 30declare <4 x float> @__log10f4_massv(<4 x float>) 31 32declare <2 x double> @__log2d2_massv(<2 x double>) 33declare <4 x float> @__log2f4_massv(<4 x float>) 34 35declare <2 x double> @__sind2_massv(<2 x double>) 36declare <4 x float> @__sinf4_massv(<4 x float>) 37 38declare <2 x double> @__cosd2_massv(<2 x double>) 39declare <4 x float> @__cosf4_massv(<4 x float>) 40 41declare <2 x double> @__tand2_massv(<2 x double>) 42declare <4 x float> @__tanf4_massv(<4 x float>) 43 44declare <2 x double> @__asind2_massv(<2 x double>) 45declare <4 x float> @__asinf4_massv(<4 x float>) 46 47declare <2 x double> @__acosd2_massv(<2 x double>) 48declare <4 x float> @__acosf4_massv(<4 x float>) 49 50declare <2 x double> @__atand2_massv(<2 x double>) 51declare <4 x float> @__atanf4_massv(<4 x float>) 52 53declare <2 x double> @__atan2d2_massv(<2 x double>) 54declare <4 x float> @__atan2f4_massv(<4 x float>) 55 56declare <2 x double> @__sinhd2_massv(<2 x double>) 57declare <4 x float> @__sinhf4_massv(<4 x float>) 58 59declare <2 x double> @__coshd2_massv(<2 x double>) 60declare <4 x float> @__coshf4_massv(<4 x float>) 61 62declare <2 x double> @__tanhd2_massv(<2 x double>) 63declare <4 x float> @__tanhf4_massv(<4 x float>) 64 65declare <2 x double> @__asinhd2_massv(<2 x double>) 66declare <4 x float> @__asinhf4_massv(<4 x float>) 67 68declare <2 x double> @__acoshd2_massv(<2 x double>) 69declare <4 x float> @__acoshf4_massv(<4 x float>) 70 71declare <2 x double> @__atanhd2_massv(<2 x double>) 72declare <4 x float> @__atanhf4_massv(<4 x float>) 73 74; following tests check generation of subtarget-specific calls 75; cbrt 76define <2 x double> @cbrt_f64_massv(<2 x double> %opnd) { 77; CHECK-ALL-LABEL: @cbrt_f64_massv 78; CHECK-PWR9: bl __cbrtd2_P9 79; CHECK-PWR8: bl __cbrtd2_P8 80; CHECK-NOT: bl __cbrtd2_massv 81; CHECK-ALL: blr 82; 83 %1 = call <2 x double> @__cbrtd2_massv(<2 x double> %opnd) 84 ret <2 x double> %1 85} 86 87define <4 x float> @cbrt_f32_massv(<4 x float> %opnd) { 88; CHECK-ALL-LABEL: @cbrt_f32_massv 89; CHECK-PWR9: bl __cbrtf4_P9 90; CHECK-PWR8: bl __cbrtf4_P8 91; CHECK-NOT: bl __cbrtf4_massv 92; CHECK-ALL: blr 93; 94 %1 = call <4 x float> @__cbrtf4_massv(<4 x float> %opnd) 95 ret <4 x float> %1 96} 97 98; pow 99define <2 x double> @pow_f64_massv(<2 x double> %opnd1, <2 x double> %opnd2) { 100; CHECK-ALL-LABEL: @pow_f64_massv 101; CHECK-PWR9: bl __powd2_P9 102; CHECK-PWR8: bl __powd2_P8 103; CHECK-NOT: bl __powd2_massv 104; CHECK-ALL: blr 105; 106 %1 = call <2 x double> @__powd2_massv(<2 x double> %opnd1, <2 x double> %opnd2) 107 ret <2 x double> %1 108} 109 110define <4 x float> @pow_f32_massv(<4 x float> %opnd1, <4 x float> %opnd2) { 111; CHECK-ALL-LABEL: @pow_f32_massv 112; CHECK-PWR9: bl __powf4_P9 113; CHECK-PWR8: bl __powf4_P8 114; CHECK-NOT: bl __powf4_massv 115; CHECK-ALL: blr 116; 117 %1 = call <4 x float> @__powf4_massv(<4 x float> %opnd1, <4 x float> %opnd2) 118 ret <4 x float> %1 119} 120 121; sqrt 122define <2 x double> @sqrt_f64_massv(<2 x double> %opnd) { 123; CHECK-ALL-LABEL: @sqrt_f64_massv 124; CHECK-PWR9: bl __sqrtd2_P9 125; CHECK-PWR8: bl __sqrtd2_P8 126; CHECK-NOT: bl __sqrtd2_massv 127; CHECK-ALL: blr 128; 129 %1 = call <2 x double> @__sqrtd2_massv(<2 x double> %opnd) 130 ret <2 x double> %1 131} 132 133define <4 x float> @sqrt_f32_massv(<4 x float> %opnd) { 134; CHECK-ALL-LABEL: @sqrt_f32_massv 135; CHECK-PWR9: bl __sqrtf4_P9 136; CHECK-PWR8: bl __sqrtf4_P8 137; CHECK-NOT: bl __sqrtf4_massv 138; CHECK-ALL: blr 139; 140 %1 = call <4 x float> @__sqrtf4_massv(<4 x float> %opnd) 141 ret <4 x float> %1 142} 143 144; exp 145define <2 x double> @exp_f64_massv(<2 x double> %opnd) { 146; CHECK-ALL-LABEL: @exp_f64_massv 147; CHECK-PWR9: bl __expd2_P9 148; CHECK-PWR8: bl __expd2_P8 149; CHECK-NOT: bl __expd2_massv 150; CHECK-ALL: blr 151; 152 %1 = call <2 x double> @__expd2_massv(<2 x double> %opnd) 153 ret <2 x double> %1 154} 155 156define <4 x float> @exp_f32_massv(<4 x float> %opnd) { 157; CHECK-ALL-LABEL: @exp_f32_massv 158; CHECK-PWR9: bl __expf4_P9 159; CHECK-PWR8: bl __expf4_P8 160; CHECK-NOT: bl __expf4_massv 161; CHECK-ALL: blr 162; 163 %1 = call <4 x float> @__expf4_massv(<4 x float> %opnd) 164 ret <4 x float> %1 165} 166 167; exp2 168define <2 x double> @exp2_f64_massv(<2 x double> %opnd) { 169; CHECK-ALL-LABEL: @exp2_f64_massv 170; CHECK-PWR9: bl __exp2d2_P9 171; CHECK-PWR8: bl __exp2d2_P8 172; CHECK-NOT: bl __exp2d2_massv 173; CHECK-ALL: blr 174; 175 %1 = call <2 x double> @__exp2d2_massv(<2 x double> %opnd) 176 ret <2 x double> %1 177} 178 179define <4 x float> @exp2_f32_massv(<4 x float> %opnd) { 180; CHECK-ALL-LABEL: @exp2_f32_massv 181; CHECK-PWR9: bl __exp2f4_P9 182; CHECK-PWR8: bl __exp2f4_P8 183; CHECK-NOT: bl __exp2f4_massv 184; CHECK-ALL: blr 185; 186 %1 = call <4 x float> @__exp2f4_massv(<4 x float> %opnd) 187 ret <4 x float> %1 188} 189 190; expm1 191define <2 x double> @expm1_f64_massv(<2 x double> %opnd) { 192; CHECK-ALL-LABEL: @expm1_f64_massv 193; CHECK-PWR9: bl __expm1d2_P9 194; CHECK-PWR8: bl __expm1d2_P8 195; CHECK-NOT: bl __expm1d2_massv 196; CHECK-ALL: blr 197; 198 %1 = call <2 x double> @__expm1d2_massv(<2 x double> %opnd) 199 ret <2 x double> %1 200} 201 202define <4 x float> @expm1_f32_massv(<4 x float> %opnd) { 203; CHECK-ALL-LABEL: @expm1_f32_massv 204; CHECK-PWR9: bl __expm1f4_P9 205; CHECK-PWR8: bl __expm1f4_P8 206; CHECK-NOT: bl __expm1f4_massv 207; CHECK-ALL: blr 208; 209 %1 = call <4 x float> @__expm1f4_massv(<4 x float> %opnd) 210 ret <4 x float> %1 211} 212 213; log 214define <2 x double> @log_f64_massv(<2 x double> %opnd) { 215; CHECK-ALL-LABEL: @log_f64_massv 216; CHECK-PWR9: bl __logd2_P9 217; CHECK-PWR8: bl __logd2_P8 218; CHECK-NOT: bl __logd2_massv 219; CHECK-ALL: blr 220; 221 %1 = call <2 x double> @__logd2_massv(<2 x double> %opnd) 222 ret <2 x double> %1 223} 224 225define <4 x float> @log_f32_massv(<4 x float> %opnd) { 226; CHECK-ALL-LABEL: @log_f32_massv 227; CHECK-PWR9: bl __logf4_P9 228; CHECK-PWR8: bl __logf4_P8 229; CHECK-NOT: bl __logf4_massv 230; CHECK-ALL: blr 231; 232 %1 = call <4 x float> @__logf4_massv(<4 x float> %opnd) 233 ret <4 x float> %1 234} 235 236; log1p 237define <2 x double> @log1p_f64_massv(<2 x double> %opnd) { 238; CHECK-ALL-LABEL: @log1p_f64_massv 239; CHECK-PWR9: bl __log1pd2_P9 240; CHECK-PWR8: bl __log1pd2_P8 241; CHECK-NOT: bl __log1pd2_massv 242; CHECK-ALL: blr 243; 244 %1 = call <2 x double> @__log1pd2_massv(<2 x double> %opnd) 245 ret <2 x double> %1 246} 247 248define <4 x float> @log1p_f32_massv(<4 x float> %opnd) { 249; CHECK-ALL-LABEL: @log1p_f32_massv 250; CHECK-PWR9: bl __log1pf4_P9 251; CHECK-PWR8: bl __log1pf4_P8 252; CHECK-NOT: bl __log1pf4_massv 253; CHECK-ALL: blr 254; 255 %1 = call <4 x float> @__log1pf4_massv(<4 x float> %opnd) 256 ret <4 x float> %1 257} 258 259; log10 260define <2 x double> @log10_f64_massv(<2 x double> %opnd) { 261; CHECK-ALL-LABEL: @log10_f64_massv 262; CHECK-PWR9: bl __log10d2_P9 263; CHECK-PWR8: bl __log10d2_P8 264; CHECK-NOT: bl __log10d2_massv 265; CHECK-ALL: blr 266; 267 %1 = call <2 x double> @__log10d2_massv(<2 x double> %opnd) 268 ret <2 x double> %1 269} 270 271define <4 x float> @log10_f32_massv(<4 x float> %opnd) { 272; CHECK-ALL-LABEL: @log10_f32_massv 273; CHECK-PWR9: bl __log10f4_P9 274; CHECK-PWR8: bl __log10f4_P8 275; CHECK-NOT: bl __log10f4_massv 276; CHECK-ALL: blr 277; 278 %1 = call <4 x float> @__log10f4_massv(<4 x float> %opnd) 279 ret <4 x float> %1 280} 281 282; log2 283define <2 x double> @log2_f64_massv(<2 x double> %opnd) { 284; CHECK-ALL-LABEL: @log2_f64_massv 285; CHECK-PWR9: bl __log2d2_P9 286; CHECK-PWR8: bl __log2d2_P8 287; CHECK-NOT: bl __log2d2_massv 288; CHECK-ALL: blr 289; 290 %1 = call <2 x double> @__log2d2_massv(<2 x double> %opnd) 291 ret <2 x double> %1 292} 293 294define <4 x float> @log2_f32_massv(<4 x float> %opnd) { 295; CHECK-ALL-LABEL: @log2_f32_massv 296; CHECK-PWR9: bl __log2f4_P9 297; CHECK-PWR8: bl __log2f4_P8 298; CHECK-NOT: bl __log2f4_massv 299; CHECK-ALL: blr 300; 301 %1 = call <4 x float> @__log2f4_massv(<4 x float> %opnd) 302 ret <4 x float> %1 303} 304 305; sin 306define <2 x double> @sin_f64_massv(<2 x double> %opnd) { 307; CHECK-ALL-LABEL: @sin_f64_massv 308; CHECK-PWR9: bl __sind2_P9 309; CHECK-PWR8: bl __sind2_P8 310; CHECK-NOT: bl __sind2_massv 311; CHECK-ALL: blr 312; 313 %1 = call <2 x double> @__sind2_massv(<2 x double> %opnd) 314 ret <2 x double> %1 315} 316 317define <4 x float> @sin_f32_massv(<4 x float> %opnd) { 318; CHECK-ALL-LABEL: @sin_f32_massv 319; CHECK-PWR9: bl __sinf4_P9 320; CHECK-PWR8: bl __sinf4_P8 321; CHECK-NOT: bl __sinf4_massv 322; CHECK-ALL: blr 323; 324 %1 = call <4 x float> @__sinf4_massv(<4 x float> %opnd) 325 ret <4 x float> %1 326} 327 328; cos 329define <2 x double> @cos_f64_massv(<2 x double> %opnd) { 330; CHECK-ALL-LABEL: @cos_f64_massv 331; CHECK-PWR9: bl __cosd2_P9 332; CHECK-PWR8: bl __cosd2_P8 333; CHECK-NOT: bl __cosd2_massv 334; CHECK-ALL: blr 335; 336 %1 = call <2 x double> @__cosd2_massv(<2 x double> %opnd) 337 ret <2 x double> %1 338} 339 340define <4 x float> @cos_f32_massv(<4 x float> %opnd) { 341; CHECK-ALL-LABEL: @cos_f32_massv 342; CHECK-PWR9: bl __cosf4_P9 343; CHECK-PWR8: bl __cosf4_P8 344; CHECK-NOT: bl __cosf4_massv 345; CHECK-ALL: blr 346; 347 %1 = call <4 x float> @__cosf4_massv(<4 x float> %opnd) 348 ret <4 x float> %1 349} 350 351; tan 352define <2 x double> @tan_f64_massv(<2 x double> %opnd) { 353; CHECK-ALL-LABEL: @tan_f64_massv 354; CHECK-PWR9: bl __tand2_P9 355; CHECK-PWR8: bl __tand2_P8 356; CHECK-NOT: bl __tand2_massv 357; CHECK-ALL: blr 358; 359 %1 = call <2 x double> @__tand2_massv(<2 x double> %opnd) 360 ret <2 x double> %1 361} 362 363define <4 x float> @tan_f32_massv(<4 x float> %opnd) { 364; CHECK-ALL-LABEL: @tan_f32_massv 365; CHECK-PWR9: bl __tanf4_P9 366; CHECK-PWR8: bl __tanf4_P8 367; CHECK-NOT: bl __tanf4_massv 368; CHECK-ALL: blr 369; 370 %1 = call <4 x float> @__tanf4_massv(<4 x float> %opnd) 371 ret <4 x float> %1 372} 373 374; asin 375define <2 x double> @asin_f64_massv(<2 x double> %opnd) { 376; CHECK-ALL-LABEL: @asin_f64_massv 377; CHECK-PWR9: bl __asind2_P9 378; CHECK-PWR8: bl __asind2_P8 379; CHECK-NOT: bl __asind2_massv 380; CHECK-ALL: blr 381; 382 %1 = call <2 x double> @__asind2_massv(<2 x double> %opnd) 383 ret <2 x double> %1 384} 385 386define <4 x float> @asin_f32_massv(<4 x float> %opnd) { 387; CHECK-ALL-LABEL: @asin_f32_massv 388; CHECK-PWR9: bl __asinf4_P9 389; CHECK-PWR8: bl __asinf4_P8 390; CHECK-NOT: bl __asinf4_massv 391; CHECK-ALL: blr 392; 393 %1 = call <4 x float> @__asinf4_massv(<4 x float> %opnd) 394 ret <4 x float> %1 395} 396 397; acos 398define <2 x double> @acos_f64_massv(<2 x double> %opnd) { 399; CHECK-ALL-LABEL: @acos_f64_massv 400; CHECK-PWR9: bl __acosd2_P9 401; CHECK-PWR8: bl __acosd2_P8 402; CHECK-NOT: bl __acosd2_massv 403; CHECK-ALL: blr 404; 405 %1 = call <2 x double> @__acosd2_massv(<2 x double> %opnd) 406 ret <2 x double> %1 407} 408 409define <4 x float> @acos_f32_massv(<4 x float> %opnd) { 410; CHECK-ALL-LABEL: @acos_f32_massv 411; CHECK-PWR9: bl __acosf4_P9 412; CHECK-PWR8: bl __acosf4_P8 413; CHECK-NOT: bl __acosf4_massv 414; CHECK-ALL: blr 415; 416 %1 = call <4 x float> @__acosf4_massv(<4 x float> %opnd) 417 ret <4 x float> %1 418} 419 420; atan 421define <2 x double> @atan_f64_massv(<2 x double> %opnd) { 422; CHECK-ALL-LABEL: @atan_f64_massv 423; CHECK-PWR9: bl __atand2_P9 424; CHECK-PWR8: bl __atand2_P8 425; CHECK-NOT: bl __atand2_massv 426; CHECK-ALL: blr 427; 428 %1 = call <2 x double> @__atand2_massv(<2 x double> %opnd) 429 ret <2 x double> %1 430} 431 432define <4 x float> @atan_f32_massv(<4 x float> %opnd) { 433; CHECK-ALL-LABEL: @atan_f32_massv 434; CHECK-PWR9: bl __atanf4_P9 435; CHECK-PWR8: bl __atanf4_P8 436; CHECK-NOT: bl __atanf4_massv 437; CHECK-ALL: blr 438; 439 %1 = call <4 x float> @__atanf4_massv(<4 x float> %opnd) 440 ret <4 x float> %1 441} 442 443; atan2 444define <2 x double> @atan2_f64_massv(<2 x double> %opnd) { 445; CHECK-ALL-LABEL: @atan2_f64_massv 446; CHECK-PWR9: bl __atan2d2_P9 447; CHECK-PWR8: bl __atan2d2_P8 448; CHECK-NOT: bl __atan2d2_massv 449; CHECK-ALL: blr 450; 451 %1 = call <2 x double> @__atan2d2_massv(<2 x double> %opnd) 452 ret <2 x double> %1 453} 454 455define <4 x float> @atan2_f32_massv(<4 x float> %opnd) { 456; CHECK-ALL-LABEL: @atan2_f32_massv 457; CHECK-PWR9: bl __atan2f4_P9 458; CHECK-PWR8: bl __atan2f4_P8 459; CHECK-NOT: bl __atan2f4_massv 460; CHECK-ALL: blr 461; 462 %1 = call <4 x float> @__atan2f4_massv(<4 x float> %opnd) 463 ret <4 x float> %1 464} 465 466; sinh 467define <2 x double> @sinh_f64_massv(<2 x double> %opnd) { 468; CHECK-ALL-LABEL: @sinh_f64_massv 469; CHECK-PWR9: bl __sinhd2_P9 470; CHECK-PWR8: bl __sinhd2_P8 471; CHECK-NOT: bl __sinhd2_massv 472; CHECK-ALL: blr 473; 474 %1 = call <2 x double> @__sinhd2_massv(<2 x double> %opnd) 475 ret <2 x double> %1 476} 477 478define <4 x float> @sinh_f32_massv(<4 x float> %opnd) { 479; CHECK-ALL-LABEL: @sinh_f32_massv 480; CHECK-PWR9: bl __sinhf4_P9 481; CHECK-PWR8: bl __sinhf4_P8 482; CHECK-NOT: bl __sinhf4_massv 483; CHECK-ALL: blr 484; 485 %1 = call <4 x float> @__sinhf4_massv(<4 x float> %opnd) 486 ret <4 x float> %1 487} 488 489; cosh 490define <2 x double> @cosh_f64_massv(<2 x double> %opnd) { 491; CHECK-ALL-LABEL: @cosh_f64_massv 492; CHECK-PWR9: bl __coshd2_P9 493; CHECK-PWR8: bl __coshd2_P8 494; CHECK-NOT: bl __coshd2_massv 495; CHECK-ALL: blr 496; 497 %1 = call <2 x double> @__coshd2_massv(<2 x double> %opnd) 498 ret <2 x double> %1 499} 500 501define <4 x float> @cosh_f32_massv(<4 x float> %opnd) { 502; CHECK-ALL-LABEL: @cosh_f32_massv 503; CHECK-PWR9: bl __coshf4_P9 504; CHECK-PWR8: bl __coshf4_P8 505; CHECK-NOT: bl __coshf4_massv 506; CHECK-ALL: blr 507; 508 %1 = call <4 x float> @__coshf4_massv(<4 x float> %opnd) 509 ret <4 x float> %1 510} 511 512; tanh 513define <2 x double> @tanh_f64_massv(<2 x double> %opnd) { 514; CHECK-ALL-LABEL: @tanh_f64_massv 515; CHECK-PWR9: bl __tanhd2_P9 516; CHECK-PWR8: bl __tanhd2_P8 517; CHECK-NOT: bl __tanhd2_massv 518; CHECK-ALL: blr 519; 520 %1 = call <2 x double> @__tanhd2_massv(<2 x double> %opnd) 521 ret <2 x double> %1 522} 523 524define <4 x float> @tanh_f32_massv(<4 x float> %opnd) { 525; CHECK-ALL-LABEL: @tanh_f32_massv 526; CHECK-PWR9: bl __tanhf4_P9 527; CHECK-PWR8: bl __tanhf4_P8 528; CHECK-NOT: bl __tanhf4_massv 529; CHECK-ALL: blr 530; 531 %1 = call <4 x float> @__tanhf4_massv(<4 x float> %opnd) 532 ret <4 x float> %1 533} 534 535; asinh 536define <2 x double> @asinh_f64_massv(<2 x double> %opnd) { 537; CHECK-ALL-LABEL: @asinh_f64_massv 538; CHECK-PWR9: bl __asinhd2_P9 539; CHECK-PWR8: bl __asinhd2_P8 540; CHECK-NOT: bl __asinhd2_massv 541; CHECK-ALL: blr 542; 543 %1 = call <2 x double> @__asinhd2_massv(<2 x double> %opnd) 544 ret <2 x double> %1 545} 546 547define <4 x float> @asinh_f32_massv(<4 x float> %opnd) { 548; CHECK-ALL-LABEL: @asinh_f32_massv 549; CHECK-PWR9: bl __asinhf4_P9 550; CHECK-PWR8: bl __asinhf4_P8 551; CHECK-NOT: bl __asinhf4_massv 552; CHECK-ALL: blr 553; 554 %1 = call <4 x float> @__asinhf4_massv(<4 x float> %opnd) 555 ret <4 x float> %1 556} 557 558; acosh 559define <2 x double> @acosh_f64_massv(<2 x double> %opnd) { 560; CHECK-ALL-LABEL: @acosh_f64_massv 561; CHECK-PWR9: bl __acoshd2_P9 562; CHECK-PWR8: bl __acoshd2_P8 563; CHECK-NOT: bl __acoshd2_massv 564; CHECK-ALL: blr 565; 566 %1 = call <2 x double> @__acoshd2_massv(<2 x double> %opnd) 567 ret <2 x double> %1 568} 569 570define <4 x float> @acosh_f32_massv(<4 x float> %opnd) { 571; CHECK-ALL-LABEL: @acosh_f32_massv 572; CHECK-PWR9: bl __acoshf4_P9 573; CHECK-PWR8: bl __acoshf4_P8 574; CHECK-NOT: bl __acoshf4_massv 575; CHECK-ALL: blr 576; 577 %1 = call <4 x float> @__acoshf4_massv(<4 x float> %opnd) 578 ret <4 x float> %1 579} 580 581; atanh 582define <2 x double> @atanh_f64_massv(<2 x double> %opnd) { 583; CHECK-ALL-LABEL: @atanh_f64_massv 584; CHECK-PWR9: bl __atanhd2_P9 585; CHECK-PWR8: bl __atanhd2_P8 586; CHECK-NOT: bl __atanhd2_massv 587; CHECK-ALL: blr 588; 589 %1 = call <2 x double> @__atanhd2_massv(<2 x double> %opnd) 590 ret <2 x double> %1 591} 592 593define <4 x float> @atanh_f32_massv(<4 x float> %opnd) { 594; CHECK-ALL-LABEL: @atanh_f32_massv 595; CHECK-PWR9: bl __atanhf4_P9 596; CHECK-PWR8: bl __atanhf4_P8 597; CHECK-NOT: bl __atanhf4_massv 598; CHECK-ALL: blr 599; 600 %1 = call <4 x float> @__atanhf4_massv(<4 x float> %opnd) 601 ret <4 x float> %1 602} 603 604