1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s 3 4define i64 @test1(i64 %x) { 5; CHECK-LABEL: test1: 6; CHECK: # %bb.0: 7; CHECK-NEXT: mulli 3, 3, 625 8; CHECK-NEXT: sldi 3, 3, 36 9; CHECK-NEXT: blr 10 %y = mul i64 %x, 42949672960000 11 ret i64 %y 12} 13 14define i64 @test2(i64 %x) { 15; CHECK-LABEL: test2: 16; CHECK: # %bb.0: 17; CHECK-NEXT: mulli 3, 3, -625 18; CHECK-NEXT: sldi 3, 3, 36 19; CHECK-NEXT: blr 20 %y = mul i64 %x, -42949672960000 21 ret i64 %y 22} 23 24define i64 @test3(i64 %x) { 25; CHECK-LABEL: test3: 26; CHECK: # %bb.0: 27; CHECK-NEXT: mulli 3, 3, 297 28; CHECK-NEXT: sldi 3, 3, 14 29; CHECK-NEXT: blr 30 %y = mul i64 %x, 4866048 31 ret i64 %y 32} 33 34define i64 @test4(i64 %x) { 35; CHECK-LABEL: test4: 36; CHECK: # %bb.0: 37; CHECK-NEXT: mulli 3, 3, -297 38; CHECK-NEXT: sldi 3, 3, 14 39; CHECK-NEXT: blr 40 %y = mul i64 %x, -4866048 41 ret i64 %y 42} 43 44define i64 @test5(i64 %x) { 45; CHECK-LABEL: test5: 46; CHECK: # %bb.0: 47; CHECK-NEXT: sldi 4, 3, 12 48; CHECK-NEXT: sldi 3, 3, 32 49; CHECK-NEXT: add 3, 3, 4 50; CHECK-NEXT: blr 51 %y = mul i64 %x, 4294971392 52 ret i64 %y 53} 54 55define i64 @test6(i64 %x) { 56; CHECK-LABEL: test6: 57; CHECK: # %bb.0: 58; CHECK-NEXT: sldi 4, 3, 12 59; CHECK-NEXT: sldi 3, 3, 32 60; CHECK-NEXT: add 3, 3, 4 61; CHECK-NEXT: neg 3, 3 62; CHECK-NEXT: blr 63 %y = mul i64 %x, -4294971392 64 ret i64 %y 65} 66 67define i64 @test7(i64 %x) { 68; CHECK-LABEL: test7: 69; CHECK: # %bb.0: 70; CHECK-NEXT: sldi 4, 3, 34 71; CHECK-NEXT: sldi 3, 3, 13 72; CHECK-NEXT: sub 3, 4, 3 73; CHECK-NEXT: blr 74 %y = mul i64 %x, 17179860992 75 ret i64 %y 76} 77 78define i64 @test8(i64 %x) { 79; CHECK-LABEL: test8: 80; CHECK: # %bb.0: 81; CHECK-NEXT: sldi 4, 3, 13 82; CHECK-NEXT: sldi 3, 3, 34 83; CHECK-NEXT: sub 3, 4, 3 84; CHECK-NEXT: blr 85 %y = mul i64 %x, -17179860992 86 ret i64 %y 87} 88 89define i64 @test9(i64 %x) { 90; CHECK-LABEL: test9: 91; CHECK: # %bb.0: 92; CHECK-NEXT: sldi 4, 3, 12 93; CHECK-NEXT: sldi 5, 3, 32 94; CHECK-NEXT: add 4, 5, 4 95; CHECK-NEXT: mulli 3, 3, 8193 96; CHECK-NEXT: sldi 3, 3, 19 97; CHECK-NEXT: sub 3, 4, 3 98; CHECK-NEXT: blr 99 %y = mul i64 %x, 4294971392 100 %z = mul i64 %x, 4295491584 101 %res = sub i64 %y, %z 102 ret i64 %res 103} 104 105define i64 @test10(i64 %x) { 106; CHECK-LABEL: test10: 107; CHECK: # %bb.0: 108; CHECK-NEXT: sldi 4, 3, 34 109; CHECK-NEXT: sldi 3, 3, 30 110; CHECK-NEXT: sub 3, 4, 3 111; CHECK-NEXT: blr 112 %y = mul i64 %x, 17179860992 113 %z = mul i64 %x, 1073733632 114 %res = sub i64 %y, %z 115 ret i64 %res 116} 117 118