1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 4; RUN: --check-prefixes=CHECK,CHECK-LE 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 7; RUN: --check-prefixes=CHECK,CHECK-BE 8 9; This file does not contain many test cases involving comparisons and logical 10; comparisons (cmplwi, cmpldi). This is because alternative code is generated 11; when there is a compare (logical or not), followed by a sign or zero extend. 12; This codegen will be re-evaluated at a later time on whether or not it should 13; be emitted on P10. 14 15@globalVal = common local_unnamed_addr global i8 0, align 1 16@globalVal2 = common local_unnamed_addr global i32 0, align 4 17@globalVal3 = common local_unnamed_addr global i64 0, align 8 18@globalVal4 = common local_unnamed_addr global i16 0, align 2 19 20define signext i32 @setnbcr1(i32 signext %a, i32 signext %b) { 21; CHECK-LABEL: setnbcr1: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: cmpw r3, r4 24; CHECK-NEXT: setnbcr r3, lt 25; CHECK-NEXT: blr 26entry: 27 %cmp = icmp sge i32 %a, %b 28 %lnot.ext = sext i1 %cmp to i32 29 ret i32 %lnot.ext 30} 31 32define signext i32 @setnbcr2(i32 signext %a, i32 signext %b) { 33; CHECK-LABEL: setnbcr2: 34; CHECK: # %bb.0: # %entry 35; CHECK-NEXT: cmpw r3, r4 36; CHECK-NEXT: setnbcr r3, gt 37; CHECK-NEXT: blr 38entry: 39 %cmp = icmp sle i32 %a, %b 40 %lnot.ext = sext i1 %cmp to i32 41 ret i32 %lnot.ext 42} 43 44define signext i32 @setnbcr3(i32 signext %a, i32 signext %b) { 45; CHECK-LABEL: setnbcr3: 46; CHECK: # %bb.0: # %entry 47; CHECK-NEXT: cmpw r3, r4 48; CHECK-NEXT: setnbcr r3, eq 49; CHECK-NEXT: blr 50entry: 51 %cmp = icmp ne i32 %a, %b 52 %lnot.ext = sext i1 %cmp to i32 53 ret i32 %lnot.ext 54} 55 56define signext i32 @setnbcr4(i8 signext %a, i8 signext %b) { 57; CHECK-LABEL: setnbcr4: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: cmpw r3, r4 60; CHECK-NEXT: setnbcr r3, lt 61; CHECK-NEXT: blr 62entry: 63 %cmp = icmp sge i8 %a, %b 64 %conv = sext i1 %cmp to i32 65 ret i32 %conv 66} 67 68define void @setnbcr5(i8 signext %a, i8 signext %b) { 69; CHECK-LE-LABEL: setnbcr5: 70; CHECK-LE: # %bb.0: # %entry 71; CHECK-LE-NEXT: cmpw r3, r4 72; CHECK-LE-NEXT: setnbcr r3, lt 73; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 74; CHECK-LE-NEXT: blr 75; 76; CHECK-BE-LABEL: setnbcr5: 77; CHECK-BE: # %bb.0: # %entry 78; CHECK-BE-NEXT: cmpw r3, r4 79; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 80; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 81; CHECK-BE-NEXT: setnbcr r3, lt 82; CHECK-BE-NEXT: stb r3, 0(r4) 83; CHECK-BE-NEXT: blr 84entry: 85 %cmp = icmp sge i8 %a, %b 86 %conv3 = sext i1 %cmp to i8 87 store i8 %conv3, i8* @globalVal, align 1 88 ret void 89} 90 91define void @setnbcr6(i32 signext %a, i32 signext %b) { 92; CHECK-LE-LABEL: setnbcr6: 93; CHECK-LE: # %bb.0: # %entry 94; CHECK-LE-NEXT: cmpw r3, r4 95; CHECK-LE-NEXT: setnbcr r3, lt 96; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 97; CHECK-LE-NEXT: blr 98; 99; CHECK-BE-LABEL: setnbcr6: 100; CHECK-BE: # %bb.0: # %entry 101; CHECK-BE-NEXT: cmpw r3, r4 102; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 103; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 104; CHECK-BE-NEXT: setnbcr r3, lt 105; CHECK-BE-NEXT: stw r3, 0(r4) 106; CHECK-BE-NEXT: blr 107entry: 108 %cmp = icmp sge i32 %a, %b 109 %sub = sext i1 %cmp to i32 110 store i32 %sub, i32* @globalVal2, align 4 111 ret void 112} 113 114define signext i32 @setnbcr7(i64 %a, i64 %b) { 115; CHECK-LABEL: setnbcr7: 116; CHECK: # %bb.0: # %entry 117; CHECK-NEXT: cmpd r3, r4 118; CHECK-NEXT: setnbcr r3, lt 119; CHECK-NEXT: blr 120entry: 121 %cmp = icmp sge i64 %a, %b 122 %conv = sext i1 %cmp to i32 123 ret i32 %conv 124} 125 126define signext i64 @setnbcr8(i64 %a, i64 %b) { 127; CHECK-LABEL: setnbcr8: 128; CHECK: # %bb.0: # %entry 129; CHECK-NEXT: cmpd r3, r4 130; CHECK-NEXT: setnbcr r3, lt 131; CHECK-NEXT: blr 132entry: 133 %cmp = icmp sge i64 %a, %b 134 %conv = sext i1 %cmp to i64 135 ret i64 %conv 136} 137 138define void @setnbcr9(i64 %a, i64 %b) { 139; CHECK-LE-LABEL: setnbcr9: 140; CHECK-LE: # %bb.0: # %entry 141; CHECK-LE-NEXT: cmpd r3, r4 142; CHECK-LE-NEXT: setnbcr r3, lt 143; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 144; CHECK-LE-NEXT: blr 145; 146; CHECK-BE-LABEL: setnbcr9: 147; CHECK-BE: # %bb.0: # %entry 148; CHECK-BE-NEXT: cmpd r3, r4 149; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 150; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 151; CHECK-BE-NEXT: setnbcr r3, lt 152; CHECK-BE-NEXT: std r3, 0(r4) 153; CHECK-BE-NEXT: blr 154entry: 155 %cmp = icmp sge i64 %a, %b 156 %conv1 = sext i1 %cmp to i64 157 store i64 %conv1, i64* @globalVal3, align 8 158 ret void 159} 160 161define signext i32 @setnbcr10(i16 signext %a, i16 signext %b) { 162; CHECK-LABEL: setnbcr10: 163; CHECK: # %bb.0: # %entry 164; CHECK-NEXT: cmpw r3, r4 165; CHECK-NEXT: setnbcr r3, lt 166; CHECK-NEXT: blr 167entry: 168 %cmp = icmp sge i16 %a, %b 169 %sub = sext i1 %cmp to i32 170 ret i32 %sub 171} 172 173define void @setnbcr11(i16 signext %a, i16 signext %b) { 174; CHECK-LE-LABEL: setnbcr11: 175; CHECK-LE: # %bb.0: # %entry 176; CHECK-LE-NEXT: cmpw r3, r4 177; CHECK-LE-NEXT: setnbcr r3, lt 178; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 179; CHECK-LE-NEXT: blr 180; 181; CHECK-BE-LABEL: setnbcr11: 182; CHECK-BE: # %bb.0: # %entry 183; CHECK-BE-NEXT: cmpw r3, r4 184; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 185; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 186; CHECK-BE-NEXT: setnbcr r3, lt 187; CHECK-BE-NEXT: sth r3, 0(r4) 188; CHECK-BE-NEXT: blr 189entry: 190 %cmp = icmp sge i16 %a, %b 191 %conv3 = sext i1 %cmp to i16 192 store i16 %conv3, i16* @globalVal4, align 2 193 ret void 194} 195 196define signext i32 @setnbcr12(i8 zeroext %a, i8 zeroext %b) { 197; CHECK-LABEL: setnbcr12: 198; CHECK: # %bb.0: # %entry 199; CHECK-NEXT: cmplw r3, r4 200; CHECK-NEXT: setnbcr r3, lt 201; CHECK-NEXT: blr 202entry: 203 %cmp = icmp uge i8 %a, %b 204 %sub = sext i1 %cmp to i32 205 ret i32 %sub 206} 207 208define void @setnbcr13(i8 zeroext %a, i8 zeroext %b) { 209; CHECK-LE-LABEL: setnbcr13: 210; CHECK-LE: # %bb.0: # %entry 211; CHECK-LE-NEXT: cmplw r3, r4 212; CHECK-LE-NEXT: setnbcr r3, lt 213; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 214; CHECK-LE-NEXT: blr 215; 216; CHECK-BE-LABEL: setnbcr13: 217; CHECK-BE: # %bb.0: # %entry 218; CHECK-BE-NEXT: cmplw r3, r4 219; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 220; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 221; CHECK-BE-NEXT: setnbcr r3, lt 222; CHECK-BE-NEXT: stb r3, 0(r4) 223; CHECK-BE-NEXT: blr 224entry: 225 %cmp = icmp uge i8 %a, %b 226 %conv3 = sext i1 %cmp to i8 227 store i8 %conv3, i8* @globalVal 228 ret void 229} 230 231define signext i32 @setnbcr14(i32 zeroext %a, i32 zeroext %b) { 232; CHECK-LABEL: setnbcr14: 233; CHECK: # %bb.0: # %entry 234; CHECK-NEXT: cmplw r3, r4 235; CHECK-NEXT: setnbcr r3, lt 236; CHECK-NEXT: blr 237entry: 238 %cmp = icmp uge i32 %a, %b 239 %sub = sext i1 %cmp to i32 240 ret i32 %sub 241} 242 243define void @setnbcr15(i32 zeroext %a, i32 zeroext %b) { 244; CHECK-LE-LABEL: setnbcr15: 245; CHECK-LE: # %bb.0: # %entry 246; CHECK-LE-NEXT: cmplw r3, r4 247; CHECK-LE-NEXT: setnbcr r3, lt 248; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 249; CHECK-LE-NEXT: blr 250; 251; CHECK-BE-LABEL: setnbcr15: 252; CHECK-BE: # %bb.0: # %entry 253; CHECK-BE-NEXT: cmplw r3, r4 254; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 255; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 256; CHECK-BE-NEXT: setnbcr r3, lt 257; CHECK-BE-NEXT: stw r3, 0(r4) 258; CHECK-BE-NEXT: blr 259entry: 260 %cmp = icmp uge i32 %a, %b 261 %sub = sext i1 %cmp to i32 262 store i32 %sub, i32* @globalVal2 263 ret void 264} 265 266define signext i32 @setnbcr16(i64 %a, i64 %b) { 267; CHECK-LABEL: setnbcr16: 268; CHECK: # %bb.0: # %entry 269; CHECK-NEXT: cmpld r3, r4 270; CHECK-NEXT: setnbcr r3, lt 271; CHECK-NEXT: blr 272entry: 273 %cmp = icmp uge i64 %a, %b 274 %sub = sext i1 %cmp to i32 275 ret i32 %sub 276} 277 278define void @setnbcr17(i64 %a, i64 %b) { 279; CHECK-LE-LABEL: setnbcr17: 280; CHECK-LE: # %bb.0: # %entry 281; CHECK-LE-NEXT: cmpld r3, r4 282; CHECK-LE-NEXT: setnbcr r3, lt 283; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 284; CHECK-LE-NEXT: blr 285; 286; CHECK-BE-LABEL: setnbcr17: 287; CHECK-BE: # %bb.0: # %entry 288; CHECK-BE-NEXT: cmpld r3, r4 289; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 290; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 291; CHECK-BE-NEXT: setnbcr r3, lt 292; CHECK-BE-NEXT: std r3, 0(r4) 293; CHECK-BE-NEXT: blr 294entry: 295 %cmp = icmp uge i64 %a, %b 296 %conv1 = sext i1 %cmp to i64 297 store i64 %conv1, i64* @globalVal3 298 ret void 299} 300 301define signext i32 @setnbcr18(i16 zeroext %a, i16 zeroext %b) { 302; CHECK-LABEL: setnbcr18: 303; CHECK: # %bb.0: # %entry 304; CHECK-NEXT: cmplw r3, r4 305; CHECK-NEXT: setnbcr r3, lt 306; CHECK-NEXT: blr 307entry: 308 %cmp = icmp uge i16 %a, %b 309 %sub = sext i1 %cmp to i32 310 ret i32 %sub 311} 312 313define void @setnbcr19(i16 zeroext %a, i16 zeroext %b) { 314; CHECK-LE-LABEL: setnbcr19: 315; CHECK-LE: # %bb.0: # %entry 316; CHECK-LE-NEXT: cmplw r3, r4 317; CHECK-LE-NEXT: setnbcr r3, lt 318; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 319; CHECK-LE-NEXT: blr 320; 321; CHECK-BE-LABEL: setnbcr19: 322; CHECK-BE: # %bb.0: # %entry 323; CHECK-BE-NEXT: cmplw r3, r4 324; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 325; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 326; CHECK-BE-NEXT: setnbcr r3, lt 327; CHECK-BE-NEXT: sth r3, 0(r4) 328; CHECK-BE-NEXT: blr 329entry: 330 %cmp = icmp uge i16 %a, %b 331 %conv3 = sext i1 %cmp to i16 332 store i16 %conv3, i16* @globalVal4 333 ret void 334} 335 336define signext i32 @setnbcr20(i8 signext %a, i8 signext %b) { 337; CHECK-LABEL: setnbcr20: 338; CHECK: # %bb.0: # %entry 339; CHECK-NEXT: cmpw r3, r4 340; CHECK-NEXT: setnbcr r3, gt 341; CHECK-NEXT: blr 342entry: 343 %cmp = icmp sle i8 %a, %b 344 %sub = sext i1 %cmp to i32 345 ret i32 %sub 346} 347 348define void @setnbcr21(i8 signext %a, i8 signext %b) { 349; CHECK-LE-LABEL: setnbcr21: 350; CHECK-LE: # %bb.0: # %entry 351; CHECK-LE-NEXT: cmpw r3, r4 352; CHECK-LE-NEXT: setnbcr r3, gt 353; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 354; CHECK-LE-NEXT: blr 355; 356; CHECK-BE-LABEL: setnbcr21: 357; CHECK-BE: # %bb.0: # %entry 358; CHECK-BE-NEXT: cmpw r3, r4 359; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 360; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 361; CHECK-BE-NEXT: setnbcr r3, gt 362; CHECK-BE-NEXT: stb r3, 0(r4) 363; CHECK-BE-NEXT: blr 364entry: 365 %cmp = icmp sle i8 %a, %b 366 %conv3 = sext i1 %cmp to i8 367 store i8 %conv3, i8* @globalVal, align 1 368 ret void 369} 370 371define signext i32 @setnbcr22(i32 signext %a, i32 signext %b) { 372; CHECK-LABEL: setnbcr22: 373; CHECK: # %bb.0: # %entry 374; CHECK-NEXT: cmpw r3, r4 375; CHECK-NEXT: setnbcr r3, gt 376; CHECK-NEXT: blr 377entry: 378 %cmp = icmp sle i32 %a, %b 379 %sub = sext i1 %cmp to i32 380 ret i32 %sub 381} 382 383define void @setnbcr23(i32 signext %a, i32 signext %b) { 384; CHECK-LE-LABEL: setnbcr23: 385; CHECK-LE: # %bb.0: # %entry 386; CHECK-LE-NEXT: cmpw r3, r4 387; CHECK-LE-NEXT: setnbcr r3, gt 388; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 389; CHECK-LE-NEXT: blr 390; 391; CHECK-BE-LABEL: setnbcr23: 392; CHECK-BE: # %bb.0: # %entry 393; CHECK-BE-NEXT: cmpw r3, r4 394; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 395; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 396; CHECK-BE-NEXT: setnbcr r3, gt 397; CHECK-BE-NEXT: stw r3, 0(r4) 398; CHECK-BE-NEXT: blr 399entry: 400 %cmp = icmp sle i32 %a, %b 401 %sub = sext i1 %cmp to i32 402 store i32 %sub, i32* @globalVal2, align 4 403 ret void 404} 405 406define signext i32 @setnbcr24(i64 %a, i64 %b) { 407; CHECK-LABEL: setnbcr24: 408; CHECK: # %bb.0: # %entry 409; CHECK-NEXT: cmpd r3, r4 410; CHECK-NEXT: setnbcr r3, gt 411; CHECK-NEXT: blr 412entry: 413 %cmp = icmp sle i64 %a, %b 414 %sub = sext i1 %cmp to i32 415 ret i32 %sub 416} 417 418define void @setnbcr25(i64 %a, i64 %b) { 419; CHECK-LE-LABEL: setnbcr25: 420; CHECK-LE: # %bb.0: # %entry 421; CHECK-LE-NEXT: cmpd r3, r4 422; CHECK-LE-NEXT: setnbcr r3, gt 423; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 424; CHECK-LE-NEXT: blr 425; 426; CHECK-BE-LABEL: setnbcr25: 427; CHECK-BE: # %bb.0: # %entry 428; CHECK-BE-NEXT: cmpd r3, r4 429; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 430; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 431; CHECK-BE-NEXT: setnbcr r3, gt 432; CHECK-BE-NEXT: std r3, 0(r4) 433; CHECK-BE-NEXT: blr 434entry: 435 %cmp = icmp sle i64 %a, %b 436 %conv1 = sext i1 %cmp to i64 437 store i64 %conv1, i64* @globalVal3, align 8 438 ret void 439} 440 441define signext i32 @setnbcr26(i16 signext %a, i16 signext %b) { 442; CHECK-LABEL: setnbcr26: 443; CHECK: # %bb.0: # %entry 444; CHECK-NEXT: cmpw r3, r4 445; CHECK-NEXT: setnbcr r3, gt 446; CHECK-NEXT: blr 447entry: 448 %cmp = icmp sle i16 %a, %b 449 %sub = sext i1 %cmp to i32 450 ret i32 %sub 451} 452 453define void @setnbcr27(i16 signext %a, i16 signext %b) { 454; CHECK-LE-LABEL: setnbcr27: 455; CHECK-LE: # %bb.0: # %entry 456; CHECK-LE-NEXT: cmpw r3, r4 457; CHECK-LE-NEXT: setnbcr r3, gt 458; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 459; CHECK-LE-NEXT: blr 460; 461; CHECK-BE-LABEL: setnbcr27: 462; CHECK-BE: # %bb.0: # %entry 463; CHECK-BE-NEXT: cmpw r3, r4 464; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 465; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 466; CHECK-BE-NEXT: setnbcr r3, gt 467; CHECK-BE-NEXT: sth r3, 0(r4) 468; CHECK-BE-NEXT: blr 469entry: 470 %cmp = icmp sle i16 %a, %b 471 %conv3 = sext i1 %cmp to i16 472 store i16 %conv3, i16* @globalVal4, align 2 473 ret void 474} 475 476define signext i32 @setnbcr28(i8 zeroext %a, i8 zeroext %b) { 477; CHECK-LABEL: setnbcr28: 478; CHECK: # %bb.0: # %entry 479; CHECK-NEXT: cmplw r3, r4 480; CHECK-NEXT: setnbcr r3, gt 481; CHECK-NEXT: blr 482entry: 483 %cmp = icmp ule i8 %a, %b 484 %sub = sext i1 %cmp to i32 485 ret i32 %sub 486} 487 488define void @setnbcr29(i8 zeroext %a, i8 zeroext %b) { 489; CHECK-LE-LABEL: setnbcr29: 490; CHECK-LE: # %bb.0: # %entry 491; CHECK-LE-NEXT: cmplw r3, r4 492; CHECK-LE-NEXT: setnbcr r3, gt 493; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 494; CHECK-LE-NEXT: blr 495; 496; CHECK-BE-LABEL: setnbcr29: 497; CHECK-BE: # %bb.0: # %entry 498; CHECK-BE-NEXT: cmplw r3, r4 499; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 500; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 501; CHECK-BE-NEXT: setnbcr r3, gt 502; CHECK-BE-NEXT: stb r3, 0(r4) 503; CHECK-BE-NEXT: blr 504entry: 505 %cmp = icmp ule i8 %a, %b 506 %conv3 = sext i1 %cmp to i8 507 store i8 %conv3, i8* @globalVal 508 ret void 509} 510 511define signext i32 @setnbcr30(i32 zeroext %a, i32 zeroext %b) { 512; CHECK-LABEL: setnbcr30: 513; CHECK: # %bb.0: # %entry 514; CHECK-NEXT: cmplw r3, r4 515; CHECK-NEXT: setnbcr r3, gt 516; CHECK-NEXT: blr 517entry: 518 %cmp = icmp ule i32 %a, %b 519 %sub = sext i1 %cmp to i32 520 ret i32 %sub 521} 522 523define void @setnbcr31(i32 zeroext %a, i32 zeroext %b) { 524; CHECK-LE-LABEL: setnbcr31: 525; CHECK-LE: # %bb.0: # %entry 526; CHECK-LE-NEXT: cmplw r3, r4 527; CHECK-LE-NEXT: setnbcr r3, gt 528; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 529; CHECK-LE-NEXT: blr 530; 531; CHECK-BE-LABEL: setnbcr31: 532; CHECK-BE: # %bb.0: # %entry 533; CHECK-BE-NEXT: cmplw r3, r4 534; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 535; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 536; CHECK-BE-NEXT: setnbcr r3, gt 537; CHECK-BE-NEXT: stw r3, 0(r4) 538; CHECK-BE-NEXT: blr 539entry: 540 %cmp = icmp ule i32 %a, %b 541 %sub = sext i1 %cmp to i32 542 store i32 %sub, i32* @globalVal2 543 ret void 544} 545 546define signext i32 @setnbcr32(i64 %a, i64 %b) { 547; CHECK-LABEL: setnbcr32: 548; CHECK: # %bb.0: # %entry 549; CHECK-NEXT: cmpld r3, r4 550; CHECK-NEXT: setnbcr r3, gt 551; CHECK-NEXT: blr 552entry: 553 %cmp = icmp ule i64 %a, %b 554 %sub = sext i1 %cmp to i32 555 ret i32 %sub 556} 557 558define void @setnbcr33(i64 %a, i64 %b) { 559; CHECK-LE-LABEL: setnbcr33: 560; CHECK-LE: # %bb.0: # %entry 561; CHECK-LE-NEXT: cmpld r3, r4 562; CHECK-LE-NEXT: setnbcr r3, gt 563; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 564; CHECK-LE-NEXT: blr 565; 566; CHECK-BE-LABEL: setnbcr33: 567; CHECK-BE: # %bb.0: # %entry 568; CHECK-BE-NEXT: cmpld r3, r4 569; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 570; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 571; CHECK-BE-NEXT: setnbcr r3, gt 572; CHECK-BE-NEXT: std r3, 0(r4) 573; CHECK-BE-NEXT: blr 574entry: 575 %cmp = icmp ule i64 %a, %b 576 %conv1 = sext i1 %cmp to i64 577 store i64 %conv1, i64* @globalVal3 578 ret void 579} 580 581define signext i32 @setnbcr34(i16 zeroext %a, i16 zeroext %b) { 582; CHECK-LABEL: setnbcr34: 583; CHECK: # %bb.0: # %entry 584; CHECK-NEXT: cmplw r3, r4 585; CHECK-NEXT: setnbcr r3, gt 586; CHECK-NEXT: blr 587entry: 588 %cmp = icmp ule i16 %a, %b 589 %sub = sext i1 %cmp to i32 590 ret i32 %sub 591} 592 593define void @setnbcr35(i16 zeroext %a, i16 zeroext %b) { 594; CHECK-LE-LABEL: setnbcr35: 595; CHECK-LE: # %bb.0: # %entry 596; CHECK-LE-NEXT: cmplw r3, r4 597; CHECK-LE-NEXT: setnbcr r3, gt 598; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 599; CHECK-LE-NEXT: blr 600; 601; CHECK-BE-LABEL: setnbcr35: 602; CHECK-BE: # %bb.0: # %entry 603; CHECK-BE-NEXT: cmplw r3, r4 604; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 605; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 606; CHECK-BE-NEXT: setnbcr r3, gt 607; CHECK-BE-NEXT: sth r3, 0(r4) 608; CHECK-BE-NEXT: blr 609entry: 610 %cmp = icmp ule i16 %a, %b 611 %conv3 = sext i1 %cmp to i16 612 store i16 %conv3, i16* @globalVal4 613 ret void 614} 615 616define signext i32 @setnbcr36(i8 signext %a, i8 signext %b) { 617; CHECK-LABEL: setnbcr36: 618; CHECK: # %bb.0: # %entry 619; CHECK-NEXT: cmpw r3, r4 620; CHECK-NEXT: setnbcr r3, eq 621; CHECK-NEXT: blr 622entry: 623 %cmp = icmp ne i8 %a, %b 624 %sub = sext i1 %cmp to i32 625 ret i32 %sub 626} 627 628define void @setnbcr37(i8 signext %a, i8 signext %b) { 629; CHECK-LE-LABEL: setnbcr37: 630; CHECK-LE: # %bb.0: # %entry 631; CHECK-LE-NEXT: cmpw r3, r4 632; CHECK-LE-NEXT: setnbcr r3, eq 633; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 634; CHECK-LE-NEXT: blr 635; 636; CHECK-BE-LABEL: setnbcr37: 637; CHECK-BE: # %bb.0: # %entry 638; CHECK-BE-NEXT: cmpw r3, r4 639; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 640; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 641; CHECK-BE-NEXT: setnbcr r3, eq 642; CHECK-BE-NEXT: stb r3, 0(r4) 643; CHECK-BE-NEXT: blr 644entry: 645 %cmp = icmp ne i8 %a, %b 646 %conv3 = sext i1 %cmp to i8 647 store i8 %conv3, i8* @globalVal, align 1 648 ret void 649} 650 651define void @setnbcr38(i32 signext %a, i32 signext %b) { 652; CHECK-LE-LABEL: setnbcr38: 653; CHECK-LE: # %bb.0: # %entry 654; CHECK-LE-NEXT: cmpw r3, r4 655; CHECK-LE-NEXT: setnbcr r3, eq 656; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 657; CHECK-LE-NEXT: blr 658; 659; CHECK-BE-LABEL: setnbcr38: 660; CHECK-BE: # %bb.0: # %entry 661; CHECK-BE-NEXT: cmpw r3, r4 662; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 663; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 664; CHECK-BE-NEXT: setnbcr r3, eq 665; CHECK-BE-NEXT: stw r3, 0(r4) 666; CHECK-BE-NEXT: blr 667entry: 668 %cmp = icmp ne i32 %a, %b 669 %sub = sext i1 %cmp to i32 670 store i32 %sub, i32* @globalVal2, align 4 671 ret void 672} 673 674define signext i32 @setnbcr39(i64 %a, i64 %b) { 675; CHECK-LABEL: setnbcr39: 676; CHECK: # %bb.0: # %entry 677; CHECK-NEXT: cmpd r3, r4 678; CHECK-NEXT: setnbcr r3, eq 679; CHECK-NEXT: blr 680entry: 681 %cmp = icmp ne i64 %a, %b 682 %sub = sext i1 %cmp to i32 683 ret i32 %sub 684} 685 686define void @setnbcr40(i64 %a, i64 %b) { 687; CHECK-LE-LABEL: setnbcr40: 688; CHECK-LE: # %bb.0: # %entry 689; CHECK-LE-NEXT: cmpd r3, r4 690; CHECK-LE-NEXT: setnbcr r3, eq 691; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 692; CHECK-LE-NEXT: blr 693; 694; CHECK-BE-LABEL: setnbcr40: 695; CHECK-BE: # %bb.0: # %entry 696; CHECK-BE-NEXT: cmpd r3, r4 697; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 698; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 699; CHECK-BE-NEXT: setnbcr r3, eq 700; CHECK-BE-NEXT: std r3, 0(r4) 701; CHECK-BE-NEXT: blr 702entry: 703 %cmp = icmp ne i64 %a, %b 704 %conv1 = sext i1 %cmp to i64 705 store i64 %conv1, i64* @globalVal3, align 8 706 ret void 707} 708 709define signext i32 @setnbcr41(i16 signext %a, i16 signext %b) { 710; CHECK-LABEL: setnbcr41: 711; CHECK: # %bb.0: # %entry 712; CHECK-NEXT: cmpw r3, r4 713; CHECK-NEXT: setnbcr r3, eq 714; CHECK-NEXT: blr 715entry: 716 %cmp = icmp ne i16 %a, %b 717 %sub = sext i1 %cmp to i32 718 ret i32 %sub 719} 720 721define void @setnbcr42(i16 signext %a, i16 signext %b) { 722; CHECK-LE-LABEL: setnbcr42: 723; CHECK-LE: # %bb.0: # %entry 724; CHECK-LE-NEXT: cmpw r3, r4 725; CHECK-LE-NEXT: setnbcr r3, eq 726; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 727; CHECK-LE-NEXT: blr 728; 729; CHECK-BE-LABEL: setnbcr42: 730; CHECK-BE: # %bb.0: # %entry 731; CHECK-BE-NEXT: cmpw r3, r4 732; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 733; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 734; CHECK-BE-NEXT: setnbcr r3, eq 735; CHECK-BE-NEXT: sth r3, 0(r4) 736; CHECK-BE-NEXT: blr 737entry: 738 %cmp = icmp ne i16 %a, %b 739 %conv3 = sext i1 %cmp to i16 740 store i16 %conv3, i16* @globalVal4, align 2 741 ret void 742} 743 744define signext i32 @setnbcr43(i8 zeroext %a, i8 zeroext %b) { 745; CHECK-LABEL: setnbcr43: 746; CHECK: # %bb.0: # %entry 747; CHECK-NEXT: cmpw r3, r4 748; CHECK-NEXT: setnbcr r3, eq 749; CHECK-NEXT: blr 750entry: 751 %cmp = icmp ne i8 %a, %b 752 %sub = sext i1 %cmp to i32 753 ret i32 %sub 754} 755 756define void @sernbcr44(i8 zeroext %a, i8 zeroext %b) { 757; CHECK-LE-LABEL: sernbcr44: 758; CHECK-LE: # %bb.0: # %entry 759; CHECK-LE-NEXT: cmpw r3, r4 760; CHECK-LE-NEXT: setnbcr r3, eq 761; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 762; CHECK-LE-NEXT: blr 763; 764; CHECK-BE-LABEL: sernbcr44: 765; CHECK-BE: # %bb.0: # %entry 766; CHECK-BE-NEXT: cmpw r3, r4 767; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 768; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 769; CHECK-BE-NEXT: setnbcr r3, eq 770; CHECK-BE-NEXT: stb r3, 0(r4) 771; CHECK-BE-NEXT: blr 772entry: 773 %cmp = icmp ne i8 %a, %b 774 %conv3 = sext i1 %cmp to i8 775 store i8 %conv3, i8* @globalVal, align 1 776 ret void 777} 778 779define signext i32 @setnbcr45(i32 zeroext %a, i32 zeroext %b) { 780; CHECK-LABEL: setnbcr45: 781; CHECK: # %bb.0: # %entry 782; CHECK-NEXT: cmpw r3, r4 783; CHECK-NEXT: setnbcr r3, eq 784; CHECK-NEXT: blr 785entry: 786 %cmp = icmp ne i32 %a, %b 787 %sub = sext i1 %cmp to i32 788 ret i32 %sub 789} 790 791define void @setnbcr46(i32 zeroext %a, i32 zeroext %b) { 792; CHECK-LE-LABEL: setnbcr46: 793; CHECK-LE: # %bb.0: # %entry 794; CHECK-LE-NEXT: cmpw r3, r4 795; CHECK-LE-NEXT: setnbcr r3, eq 796; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 797; CHECK-LE-NEXT: blr 798; 799; CHECK-BE-LABEL: setnbcr46: 800; CHECK-BE: # %bb.0: # %entry 801; CHECK-BE-NEXT: cmpw r3, r4 802; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 803; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 804; CHECK-BE-NEXT: setnbcr r3, eq 805; CHECK-BE-NEXT: stw r3, 0(r4) 806; CHECK-BE-NEXT: blr 807entry: 808 %cmp = icmp ne i32 %a, %b 809 %conv = sext i1 %cmp to i32 810 store i32 %conv, i32* @globalVal2, align 4 811 ret void 812} 813 814define signext i32 @setnbcr47(i16 zeroext %a, i16 zeroext %b) { 815; CHECK-LABEL: setnbcr47: 816; CHECK: # %bb.0: # %entry 817; CHECK-NEXT: cmpw r3, r4 818; CHECK-NEXT: setnbcr r3, eq 819; CHECK-NEXT: blr 820entry: 821 %cmp = icmp ne i16 %a, %b 822 %sub = sext i1 %cmp to i32 823 ret i32 %sub 824} 825 826define void @setnbcr48(i16 zeroext %a, i16 zeroext %b) { 827; CHECK-LE-LABEL: setnbcr48: 828; CHECK-LE: # %bb.0: # %entry 829; CHECK-LE-NEXT: cmpw r3, r4 830; CHECK-LE-NEXT: setnbcr r3, eq 831; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 832; CHECK-LE-NEXT: blr 833; 834; CHECK-BE-LABEL: setnbcr48: 835; CHECK-BE: # %bb.0: # %entry 836; CHECK-BE-NEXT: cmpw r3, r4 837; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 838; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 839; CHECK-BE-NEXT: setnbcr r3, eq 840; CHECK-BE-NEXT: sth r3, 0(r4) 841; CHECK-BE-NEXT: blr 842entry: 843 %cmp = icmp ne i16 %a, %b 844 %conv3 = sext i1 %cmp to i16 845 store i16 %conv3, i16* @globalVal4, align 2 846 ret void 847} 848 849define i64 @setnbcr49(i8 signext %a, i8 signext %b) { 850; CHECK-LABEL: setnbcr49: 851; CHECK: # %bb.0: # %entry 852; CHECK-NEXT: cmpw r3, r4 853; CHECK-NEXT: setnbcr r3, lt 854; CHECK-NEXT: blr 855entry: 856 %cmp = icmp sge i8 %a, %b 857 %conv3 = sext i1 %cmp to i64 858 ret i64 %conv3 859} 860 861define void @setnbcr50(i8 signext %a, i8 signext %b) { 862; CHECK-LE-LABEL: setnbcr50: 863; CHECK-LE: # %bb.0: # %entry 864; CHECK-LE-NEXT: cmpw r3, r4 865; CHECK-LE-NEXT: setnbcr r3, lt 866; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 867; CHECK-LE-NEXT: blr 868; 869; CHECK-BE-LABEL: setnbcr50: 870; CHECK-BE: # %bb.0: # %entry 871; CHECK-BE-NEXT: cmpw r3, r4 872; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 873; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 874; CHECK-BE-NEXT: setnbcr r3, lt 875; CHECK-BE-NEXT: stb r3, 0(r4) 876; CHECK-BE-NEXT: blr 877entry: 878 %cmp = icmp sge i8 %a, %b 879 %conv3 = sext i1 %cmp to i8 880 store i8 %conv3, i8* @globalVal, align 1 881 ret void 882} 883 884define i64 @setnbcr51(i32 signext %a, i32 signext %b) { 885; CHECK-LABEL: setnbcr51: 886; CHECK: # %bb.0: # %entry 887; CHECK-NEXT: cmpw r3, r4 888; CHECK-NEXT: setnbcr r3, lt 889; CHECK-NEXT: blr 890entry: 891 %cmp = icmp sge i32 %a, %b 892 %conv1 = sext i1 %cmp to i64 893 ret i64 %conv1 894} 895 896define void @setnbcr52(i32 signext %a, i32 signext %b) { 897; CHECK-LE-LABEL: setnbcr52: 898; CHECK-LE: # %bb.0: # %entry 899; CHECK-LE-NEXT: cmpw r3, r4 900; CHECK-LE-NEXT: setnbcr r3, lt 901; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 902; CHECK-LE-NEXT: blr 903; 904; CHECK-BE-LABEL: setnbcr52: 905; CHECK-BE: # %bb.0: # %entry 906; CHECK-BE-NEXT: cmpw r3, r4 907; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 908; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 909; CHECK-BE-NEXT: setnbcr r3, lt 910; CHECK-BE-NEXT: stw r3, 0(r4) 911; CHECK-BE-NEXT: blr 912entry: 913 %cmp = icmp sge i32 %a, %b 914 %sub = sext i1 %cmp to i32 915 store i32 %sub, i32* @globalVal2, align 4 916 ret void 917} 918 919define i64 @setnbcr53(i64 %a, i64 %b) { 920; CHECK-LABEL: setnbcr53: 921; CHECK: # %bb.0: # %entry 922; CHECK-NEXT: cmpd r3, r4 923; CHECK-NEXT: setnbcr r3, lt 924; CHECK-NEXT: blr 925entry: 926 %cmp = icmp sge i64 %a, %b 927 %conv1 = sext i1 %cmp to i64 928 ret i64 %conv1 929} 930 931define void @setnbcr54(i64 %a, i64 %b) { 932; CHECK-LE-LABEL: setnbcr54: 933; CHECK-LE: # %bb.0: # %entry 934; CHECK-LE-NEXT: cmpd r3, r4 935; CHECK-LE-NEXT: setnbcr r3, lt 936; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 937; CHECK-LE-NEXT: blr 938; 939; CHECK-BE-LABEL: setnbcr54: 940; CHECK-BE: # %bb.0: # %entry 941; CHECK-BE-NEXT: cmpd r3, r4 942; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 943; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 944; CHECK-BE-NEXT: setnbcr r3, lt 945; CHECK-BE-NEXT: std r3, 0(r4) 946; CHECK-BE-NEXT: blr 947entry: 948 %cmp = icmp sge i64 %a, %b 949 %conv1 = sext i1 %cmp to i64 950 store i64 %conv1, i64* @globalVal3, align 8 951 ret void 952} 953 954define i64 @setnbcr55(i16 signext %a, i16 signext %b) { 955; CHECK-LABEL: setnbcr55: 956; CHECK: # %bb.0: # %entry 957; CHECK-NEXT: cmpw r3, r4 958; CHECK-NEXT: setnbcr r3, lt 959; CHECK-NEXT: blr 960entry: 961 %cmp = icmp sge i16 %a, %b 962 %conv3 = sext i1 %cmp to i64 963 ret i64 %conv3 964} 965 966define void @setnbcr56(i16 signext %a, i16 signext %b) { 967; CHECK-LE-LABEL: setnbcr56: 968; CHECK-LE: # %bb.0: # %entry 969; CHECK-LE-NEXT: cmpw r3, r4 970; CHECK-LE-NEXT: setnbcr r3, lt 971; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 972; CHECK-LE-NEXT: blr 973; 974; CHECK-BE-LABEL: setnbcr56: 975; CHECK-BE: # %bb.0: # %entry 976; CHECK-BE-NEXT: cmpw r3, r4 977; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 978; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 979; CHECK-BE-NEXT: setnbcr r3, lt 980; CHECK-BE-NEXT: sth r3, 0(r4) 981; CHECK-BE-NEXT: blr 982entry: 983 %cmp = icmp sge i16 %a, %b 984 %conv3 = sext i1 %cmp to i16 985 store i16 %conv3, i16* @globalVal4, align 2 986 ret void 987} 988 989define i64 @setnbcr57(i8 zeroext %a, i8 zeroext %b) { 990; CHECK-LABEL: setnbcr57: 991; CHECK: # %bb.0: # %entry 992; CHECK-NEXT: cmplw r3, r4 993; CHECK-NEXT: setnbcr r3, lt 994; CHECK-NEXT: blr 995entry: 996 %cmp = icmp uge i8 %a, %b 997 %conv3 = sext i1 %cmp to i64 998 ret i64 %conv3 999} 1000 1001define void @setnbcr58(i8 zeroext %a, i8 zeroext %b) { 1002; CHECK-LE-LABEL: setnbcr58: 1003; CHECK-LE: # %bb.0: # %entry 1004; CHECK-LE-NEXT: cmplw r3, r4 1005; CHECK-LE-NEXT: setnbcr r3, lt 1006; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 1007; CHECK-LE-NEXT: blr 1008; 1009; CHECK-BE-LABEL: setnbcr58: 1010; CHECK-BE: # %bb.0: # %entry 1011; CHECK-BE-NEXT: cmplw r3, r4 1012; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 1013; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 1014; CHECK-BE-NEXT: setnbcr r3, lt 1015; CHECK-BE-NEXT: stb r3, 0(r4) 1016; CHECK-BE-NEXT: blr 1017entry: 1018 %cmp = icmp uge i8 %a, %b 1019 %conv3 = sext i1 %cmp to i8 1020 store i8 %conv3, i8* @globalVal 1021 ret void 1022} 1023 1024define i64 @setnbcr59(i32 zeroext %a, i32 zeroext %b) { 1025; CHECK-LABEL: setnbcr59: 1026; CHECK: # %bb.0: # %entry 1027; CHECK-NEXT: cmplw r3, r4 1028; CHECK-NEXT: setnbcr r3, lt 1029; CHECK-NEXT: blr 1030entry: 1031 %cmp = icmp uge i32 %a, %b 1032 %conv1 = sext i1 %cmp to i64 1033 ret i64 %conv1 1034} 1035 1036define void @setnbcr60(i32 zeroext %a, i32 zeroext %b) { 1037; CHECK-LE-LABEL: setnbcr60: 1038; CHECK-LE: # %bb.0: # %entry 1039; CHECK-LE-NEXT: cmplw r3, r4 1040; CHECK-LE-NEXT: setnbcr r3, lt 1041; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 1042; CHECK-LE-NEXT: blr 1043; 1044; CHECK-BE-LABEL: setnbcr60: 1045; CHECK-BE: # %bb.0: # %entry 1046; CHECK-BE-NEXT: cmplw r3, r4 1047; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 1048; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 1049; CHECK-BE-NEXT: setnbcr r3, lt 1050; CHECK-BE-NEXT: stw r3, 0(r4) 1051; CHECK-BE-NEXT: blr 1052entry: 1053 %cmp = icmp uge i32 %a, %b 1054 %sub = sext i1 %cmp to i32 1055 store i32 %sub, i32* @globalVal2 1056 ret void 1057} 1058 1059define i64 @setnbcr61(i64 %a, i64 %b) { 1060; CHECK-LABEL: setnbcr61: 1061; CHECK: # %bb.0: # %entry 1062; CHECK-NEXT: cmpld r3, r4 1063; CHECK-NEXT: setnbcr r3, lt 1064; CHECK-NEXT: blr 1065entry: 1066 %cmp = icmp uge i64 %a, %b 1067 %conv1 = sext i1 %cmp to i64 1068 ret i64 %conv1 1069} 1070 1071define void @setnbcr62(i64 %a, i64 %b) { 1072; CHECK-LE-LABEL: setnbcr62: 1073; CHECK-LE: # %bb.0: # %entry 1074; CHECK-LE-NEXT: cmpld r3, r4 1075; CHECK-LE-NEXT: setnbcr r3, lt 1076; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1077; CHECK-LE-NEXT: blr 1078; 1079; CHECK-BE-LABEL: setnbcr62: 1080; CHECK-BE: # %bb.0: # %entry 1081; CHECK-BE-NEXT: cmpld r3, r4 1082; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 1083; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 1084; CHECK-BE-NEXT: setnbcr r3, lt 1085; CHECK-BE-NEXT: std r3, 0(r4) 1086; CHECK-BE-NEXT: blr 1087entry: 1088 %cmp = icmp uge i64 %a, %b 1089 %conv1 = sext i1 %cmp to i64 1090 store i64 %conv1, i64* @globalVal3 1091 ret void 1092} 1093 1094define i64 @setnbcr63(i16 zeroext %a, i16 zeroext %b) { 1095; CHECK-LABEL: setnbcr63: 1096; CHECK: # %bb.0: # %entry 1097; CHECK-NEXT: cmplw r3, r4 1098; CHECK-NEXT: setnbcr r3, lt 1099; CHECK-NEXT: blr 1100entry: 1101 %cmp = icmp uge i16 %a, %b 1102 %conv3 = sext i1 %cmp to i64 1103 ret i64 %conv3 1104} 1105 1106define void @setnbcr64(i16 zeroext %a, i16 zeroext %b) { 1107; CHECK-LE-LABEL: setnbcr64: 1108; CHECK-LE: # %bb.0: # %entry 1109; CHECK-LE-NEXT: cmplw r3, r4 1110; CHECK-LE-NEXT: setnbcr r3, lt 1111; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 1112; CHECK-LE-NEXT: blr 1113; 1114; CHECK-BE-LABEL: setnbcr64: 1115; CHECK-BE: # %bb.0: # %entry 1116; CHECK-BE-NEXT: cmplw r3, r4 1117; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 1118; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 1119; CHECK-BE-NEXT: setnbcr r3, lt 1120; CHECK-BE-NEXT: sth r3, 0(r4) 1121; CHECK-BE-NEXT: blr 1122entry: 1123 %cmp = icmp uge i16 %a, %b 1124 %conv3 = sext i1 %cmp to i16 1125 store i16 %conv3, i16* @globalVal4 1126 ret void 1127} 1128 1129define i64 @setnbcr65(i8 signext %a, i8 signext %b) { 1130; CHECK-LABEL: setnbcr65: 1131; CHECK: # %bb.0: # %entry 1132; CHECK-NEXT: cmpw r3, r4 1133; CHECK-NEXT: setnbcr r3, gt 1134; CHECK-NEXT: blr 1135entry: 1136 %cmp = icmp sle i8 %a, %b 1137 %conv3 = sext i1 %cmp to i64 1138 ret i64 %conv3 1139} 1140 1141define void @setnbcr66(i8 signext %a, i8 signext %b) { 1142; CHECK-LE-LABEL: setnbcr66: 1143; CHECK-LE: # %bb.0: # %entry 1144; CHECK-LE-NEXT: cmpw r3, r4 1145; CHECK-LE-NEXT: setnbcr r3, gt 1146; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 1147; CHECK-LE-NEXT: blr 1148; 1149; CHECK-BE-LABEL: setnbcr66: 1150; CHECK-BE: # %bb.0: # %entry 1151; CHECK-BE-NEXT: cmpw r3, r4 1152; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 1153; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 1154; CHECK-BE-NEXT: setnbcr r3, gt 1155; CHECK-BE-NEXT: stb r3, 0(r4) 1156; CHECK-BE-NEXT: blr 1157entry: 1158 %cmp = icmp sle i8 %a, %b 1159 %conv3 = sext i1 %cmp to i8 1160 store i8 %conv3, i8* @globalVal, align 1 1161 ret void 1162} 1163 1164define i64 @setnbcr67(i32 signext %a, i32 signext %b) { 1165; CHECK-LABEL: setnbcr67: 1166; CHECK: # %bb.0: # %entry 1167; CHECK-NEXT: cmpw r3, r4 1168; CHECK-NEXT: setnbcr r3, gt 1169; CHECK-NEXT: blr 1170entry: 1171 %cmp = icmp sle i32 %a, %b 1172 %conv1 = sext i1 %cmp to i64 1173 ret i64 %conv1 1174} 1175 1176define void @setnbcr68(i32 signext %a, i32 signext %b) { 1177; CHECK-LE-LABEL: setnbcr68: 1178; CHECK-LE: # %bb.0: # %entry 1179; CHECK-LE-NEXT: cmpw r3, r4 1180; CHECK-LE-NEXT: setnbcr r3, gt 1181; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 1182; CHECK-LE-NEXT: blr 1183; 1184; CHECK-BE-LABEL: setnbcr68: 1185; CHECK-BE: # %bb.0: # %entry 1186; CHECK-BE-NEXT: cmpw r3, r4 1187; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 1188; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 1189; CHECK-BE-NEXT: setnbcr r3, gt 1190; CHECK-BE-NEXT: stw r3, 0(r4) 1191; CHECK-BE-NEXT: blr 1192entry: 1193 %cmp = icmp sle i32 %a, %b 1194 %sub = sext i1 %cmp to i32 1195 store i32 %sub, i32* @globalVal2, align 4 1196 ret void 1197} 1198 1199define i64 @setnbcr69(i64 %a, i64 %b) { 1200; CHECK-LABEL: setnbcr69: 1201; CHECK: # %bb.0: # %entry 1202; CHECK-NEXT: cmpd r3, r4 1203; CHECK-NEXT: setnbcr r3, gt 1204; CHECK-NEXT: blr 1205entry: 1206 %cmp = icmp sle i64 %a, %b 1207 %conv1 = sext i1 %cmp to i64 1208 ret i64 %conv1 1209} 1210 1211define void @setnbcr70(i64 %a, i64 %b) { 1212; CHECK-LE-LABEL: setnbcr70: 1213; CHECK-LE: # %bb.0: # %entry 1214; CHECK-LE-NEXT: cmpd r3, r4 1215; CHECK-LE-NEXT: setnbcr r3, gt 1216; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1217; CHECK-LE-NEXT: blr 1218; 1219; CHECK-BE-LABEL: setnbcr70: 1220; CHECK-BE: # %bb.0: # %entry 1221; CHECK-BE-NEXT: cmpd r3, r4 1222; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 1223; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 1224; CHECK-BE-NEXT: setnbcr r3, gt 1225; CHECK-BE-NEXT: std r3, 0(r4) 1226; CHECK-BE-NEXT: blr 1227entry: 1228 %cmp = icmp sle i64 %a, %b 1229 %conv1 = sext i1 %cmp to i64 1230 store i64 %conv1, i64* @globalVal3, align 8 1231 ret void 1232} 1233 1234define i64 @setnbcr71(i16 signext %a, i16 signext %b) { 1235; CHECK-LABEL: setnbcr71: 1236; CHECK: # %bb.0: # %entry 1237; CHECK-NEXT: cmpw r3, r4 1238; CHECK-NEXT: setnbcr r3, gt 1239; CHECK-NEXT: blr 1240entry: 1241 %cmp = icmp sle i16 %a, %b 1242 %conv3 = sext i1 %cmp to i64 1243 ret i64 %conv3 1244} 1245 1246define void @setnbcr72(i16 signext %a, i16 signext %b) { 1247; CHECK-LE-LABEL: setnbcr72: 1248; CHECK-LE: # %bb.0: # %entry 1249; CHECK-LE-NEXT: cmpw r3, r4 1250; CHECK-LE-NEXT: setnbcr r3, gt 1251; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 1252; CHECK-LE-NEXT: blr 1253; 1254; CHECK-BE-LABEL: setnbcr72: 1255; CHECK-BE: # %bb.0: # %entry 1256; CHECK-BE-NEXT: cmpw r3, r4 1257; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 1258; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 1259; CHECK-BE-NEXT: setnbcr r3, gt 1260; CHECK-BE-NEXT: sth r3, 0(r4) 1261; CHECK-BE-NEXT: blr 1262entry: 1263 %cmp = icmp sle i16 %a, %b 1264 %conv3 = sext i1 %cmp to i16 1265 store i16 %conv3, i16* @globalVal4, align 2 1266 ret void 1267} 1268 1269define i64 @setnbcr73(i8 zeroext %a, i8 zeroext %b) { 1270; CHECK-LABEL: setnbcr73: 1271; CHECK: # %bb.0: # %entry 1272; CHECK-NEXT: cmplw r3, r4 1273; CHECK-NEXT: setnbcr r3, gt 1274; CHECK-NEXT: blr 1275entry: 1276 %cmp = icmp ule i8 %a, %b 1277 %conv3 = sext i1 %cmp to i64 1278 ret i64 %conv3 1279} 1280 1281define void @setnbcr74(i8 zeroext %a, i8 zeroext %b) { 1282; CHECK-LE-LABEL: setnbcr74: 1283; CHECK-LE: # %bb.0: # %entry 1284; CHECK-LE-NEXT: cmplw r3, r4 1285; CHECK-LE-NEXT: setnbcr r3, gt 1286; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 1287; CHECK-LE-NEXT: blr 1288; 1289; CHECK-BE-LABEL: setnbcr74: 1290; CHECK-BE: # %bb.0: # %entry 1291; CHECK-BE-NEXT: cmplw r3, r4 1292; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 1293; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 1294; CHECK-BE-NEXT: setnbcr r3, gt 1295; CHECK-BE-NEXT: stb r3, 0(r4) 1296; CHECK-BE-NEXT: blr 1297entry: 1298 %cmp = icmp ule i8 %a, %b 1299 %conv3 = sext i1 %cmp to i8 1300 store i8 %conv3, i8* @globalVal 1301 ret void 1302} 1303 1304define i64 @setnbcr75(i32 zeroext %a, i32 zeroext %b) { 1305; CHECK-LABEL: setnbcr75: 1306; CHECK: # %bb.0: # %entry 1307; CHECK-NEXT: cmplw r3, r4 1308; CHECK-NEXT: setnbcr r3, gt 1309; CHECK-NEXT: blr 1310entry: 1311 %cmp = icmp ule i32 %a, %b 1312 %conv1 = sext i1 %cmp to i64 1313 ret i64 %conv1 1314} 1315 1316define void @setnbcr76(i32 zeroext %a, i32 zeroext %b) { 1317; CHECK-LE-LABEL: setnbcr76: 1318; CHECK-LE: # %bb.0: # %entry 1319; CHECK-LE-NEXT: cmplw r3, r4 1320; CHECK-LE-NEXT: setnbcr r3, gt 1321; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 1322; CHECK-LE-NEXT: blr 1323; 1324; CHECK-BE-LABEL: setnbcr76: 1325; CHECK-BE: # %bb.0: # %entry 1326; CHECK-BE-NEXT: cmplw r3, r4 1327; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha 1328; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4) 1329; CHECK-BE-NEXT: setnbcr r3, gt 1330; CHECK-BE-NEXT: stw r3, 0(r4) 1331; CHECK-BE-NEXT: blr 1332entry: 1333 %cmp = icmp ule i32 %a, %b 1334 %sub = sext i1 %cmp to i32 1335 store i32 %sub, i32* @globalVal2 1336 ret void 1337} 1338 1339define i64 @setnbcr77(i64 %a, i64 %b) { 1340; CHECK-LABEL: setnbcr77: 1341; CHECK: # %bb.0: # %entry 1342; CHECK-NEXT: cmpld r3, r4 1343; CHECK-NEXT: setnbcr r3, gt 1344; CHECK-NEXT: blr 1345entry: 1346 %cmp = icmp ule i64 %a, %b 1347 %conv1 = sext i1 %cmp to i64 1348 ret i64 %conv1 1349} 1350 1351define void @setnbcr78(i64 %a, i64 %b) { 1352; CHECK-LE-LABEL: setnbcr78: 1353; CHECK-LE: # %bb.0: # %entry 1354; CHECK-LE-NEXT: cmpld r3, r4 1355; CHECK-LE-NEXT: setnbcr r3, gt 1356; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1357; CHECK-LE-NEXT: blr 1358; 1359; CHECK-BE-LABEL: setnbcr78: 1360; CHECK-BE: # %bb.0: # %entry 1361; CHECK-BE-NEXT: cmpld r3, r4 1362; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 1363; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 1364; CHECK-BE-NEXT: setnbcr r3, gt 1365; CHECK-BE-NEXT: std r3, 0(r4) 1366; CHECK-BE-NEXT: blr 1367entry: 1368 %cmp = icmp ule i64 %a, %b 1369 %conv1 = sext i1 %cmp to i64 1370 store i64 %conv1, i64* @globalVal3 1371 ret void 1372} 1373 1374define i64 @setnbcr79(i16 zeroext %a, i16 zeroext %b) { 1375; CHECK-LABEL: setnbcr79: 1376; CHECK: # %bb.0: # %entry 1377; CHECK-NEXT: cmplw r3, r4 1378; CHECK-NEXT: setnbcr r3, gt 1379; CHECK-NEXT: blr 1380entry: 1381 %cmp = icmp ule i16 %a, %b 1382 %conv3 = sext i1 %cmp to i64 1383 ret i64 %conv3 1384} 1385 1386define void @setnbcr80(i16 zeroext %a, i16 zeroext %b) { 1387; CHECK-LE-LABEL: setnbcr80: 1388; CHECK-LE: # %bb.0: # %entry 1389; CHECK-LE-NEXT: cmplw r3, r4 1390; CHECK-LE-NEXT: setnbcr r3, gt 1391; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 1392; CHECK-LE-NEXT: blr 1393; 1394; CHECK-BE-LABEL: setnbcr80: 1395; CHECK-BE: # %bb.0: # %entry 1396; CHECK-BE-NEXT: cmplw r3, r4 1397; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha 1398; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4) 1399; CHECK-BE-NEXT: setnbcr r3, gt 1400; CHECK-BE-NEXT: sth r3, 0(r4) 1401; CHECK-BE-NEXT: blr 1402entry: 1403 %cmp = icmp ule i16 %a, %b 1404 %conv3 = sext i1 %cmp to i16 1405 store i16 %conv3, i16* @globalVal4 1406 ret void 1407} 1408 1409define i64 @setnbcr81(i64 %a, i64 %b) { 1410; CHECK-LABEL: setnbcr81: 1411; CHECK: # %bb.0: # %entry 1412; CHECK-NEXT: cmpd r3, r4 1413; CHECK-NEXT: setnbcr r3, eq 1414; CHECK-NEXT: blr 1415entry: 1416 %cmp = icmp ne i64 %a, %b 1417 %conv1 = sext i1 %cmp to i64 1418 ret i64 %conv1 1419} 1420 1421define i64 @setnbcr82(i64 %a, i64 %b) { 1422; CHECK-LABEL: setnbcr82: 1423; CHECK: # %bb.0: # %entry 1424; CHECK-NEXT: cmpd r3, r4 1425; CHECK-NEXT: setnbcr r3, eq 1426; CHECK-NEXT: blr 1427entry: 1428 %cmp = icmp ne i64 %a, %b 1429 %conv1 = sext i1 %cmp to i64 1430 ret i64 %conv1 1431} 1432 1433define void @setnbcr83(i64 %a, i64 %b) { 1434; CHECK-LE-LABEL: setnbcr83: 1435; CHECK-LE: # %bb.0: # %entry 1436; CHECK-LE-NEXT: cmpd r3, r4 1437; CHECK-LE-NEXT: setnbcr r3, eq 1438; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1439; CHECK-LE-NEXT: blr 1440; 1441; CHECK-BE-LABEL: setnbcr83: 1442; CHECK-BE: # %bb.0: # %entry 1443; CHECK-BE-NEXT: cmpd r3, r4 1444; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha 1445; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4) 1446; CHECK-BE-NEXT: setnbcr r3, eq 1447; CHECK-BE-NEXT: std r3, 0(r4) 1448; CHECK-BE-NEXT: blr 1449entry: 1450 %cmp = icmp ne i64 %a, %b 1451 %conv1 = sext i1 %cmp to i64 1452 store i64 %conv1, i64* @globalVal3, align 8 1453 ret void 1454} 1455 1456