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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN: FileCheck %s
5define hidden void @julia_tryparse_internal_45896() #0 {
6; CHECK-LABEL: julia_tryparse_internal_45896:
7; CHECK:       # %bb.0: # %top
8; CHECK-NEXT:    ld r3, 0(r3)
9; CHECK-NEXT:    cmpldi r3, 0
10; CHECK-NEXT:    beq cr0, .LBB0_3
11; CHECK-NEXT:  # %bb.1: # %top
12; CHECK-NEXT:    cmpldi r3, 10
13; CHECK-NEXT:    beq cr0, .LBB0_4
14; CHECK-NEXT:  # %bb.2: # %top
15; CHECK-NEXT:  .LBB0_3: # %fail194
16; CHECK-NEXT:  .LBB0_4: # %L294
17; CHECK-NEXT:    bc 12, 4*cr5+lt, .LBB0_6
18; CHECK-NEXT:  # %bb.5: # %L294
19; CHECK-NEXT:    bc 4, 4*cr5+lt, .LBB0_7
20; CHECK-NEXT:  .LBB0_6: # %L1057.preheader
21; CHECK-NEXT:  .LBB0_7: # %L670
22; CHECK-NEXT:    lis r5, 4095
23; CHECK-NEXT:    cmpdi r3, 0
24; CHECK-NEXT:    sradi r4, r3, 63
25; CHECK-NEXT:    ori r5, r5, 65533
26; CHECK-NEXT:    crnot 4*cr5+gt, eq
27; CHECK-NEXT:    sldi r5, r5, 4
28; CHECK-NEXT:    mulhdu r3, r3, r5
29; CHECK-NEXT:    maddld r6, r4, r5, r3
30; CHECK-NEXT:    cmpld r6, r3
31; CHECK-NEXT:    mulld r3, r4, r5
32; CHECK-NEXT:    cmpldi cr1, r3, 0
33; CHECK-NEXT:    crandc 4*cr5+lt, lt, 4*cr1+eq
34; CHECK-NEXT:    mulhdu. r3, r4, r5
35; CHECK-NEXT:    bc 4, 4*cr5+gt, .LBB0_10
36; CHECK-NEXT:  # %bb.8: # %L670
37; CHECK-NEXT:    crorc 4*cr5+lt, 4*cr5+lt, eq
38; CHECK-NEXT:    bc 4, 4*cr5+lt, .LBB0_10
39; CHECK-NEXT:  # %bb.9: # %L917
40; CHECK-NEXT:  .LBB0_10: # %L994
41top:
42  %0 = load i64, i64* undef, align 8
43  %1 = icmp ne i64 %0, 0
44  %2 = sext i64 %0 to i128
45  switch i64 %0, label %pass195 [
46    i64 10, label %L294
47    i64 16, label %L294.fold.split
48    i64 0, label %fail194
49  ]
50
51L294.fold.split:                                  ; preds = %top
52  unreachable
53
54L294:                                             ; preds = %top
55  %3 = add nsw i32 0, -48
56  %4 = zext i32 %3 to i128
57  %5 = add i128 %4, 0
58  switch i32 undef, label %L670 [
59    i32 -1031471104, label %L1057.preheader
60    i32 536870912, label %L1057.preheader
61  ]
62
63L670:                                             ; preds = %L294
64  br label %L898
65
66L1057.preheader:                                  ; preds = %L294, %L294
67  unreachable
68
69L898:                                             ; preds = %L670
70  %umul = call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %2, i128 %5)
71  %umul.ov = extractvalue { i128, i1 } %umul, 1
72  %value_phi102 = and i1 %1, %umul.ov
73  %6 = or i1 %value_phi102, false
74  br i1 %6, label %L917, label %L994
75
76L917:                                             ; preds = %L898
77  unreachable
78
79L994:                                             ; preds = %L898
80  unreachable
81
82fail194:                                          ; preds = %top
83  unreachable
84
85pass195:                                          ; preds = %top
86  unreachable
87}
88
89; Function Attrs: nounwind readnone speculatable willreturn
90declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
91