• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3; RUN:   -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4; RUN:   -check-prefix=CHECK-LE %s
5
6define void @foo(i32 %vla_size) #0 {
7; CHECK-LE-LABEL: foo:
8; CHECK-LE:       # %bb.0: # %entry
9; CHECK-LE-NEXT:    std r31, -8(r1)
10; CHECK-LE-NEXT:    std r30, -16(r1)
11; CHECK-LE-NEXT:    mr r30, r1
12; CHECK-LE-NEXT:    .cfi_def_cfa r30, 0
13; CHECK-LE-NEXT:    clrldi r0, r30, 53
14; CHECK-LE-NEXT:    subc r12, r30, r0
15; CHECK-LE-NEXT:    clrldi r0, r0, 52
16; CHECK-LE-NEXT:    cmpdi r0, 0
17; CHECK-LE-NEXT:    beq cr0, .LBB0_2
18; CHECK-LE-NEXT:  # %bb.1: # %entry
19; CHECK-LE-NEXT:    neg r0, r0
20; CHECK-LE-NEXT:    stdux r30, r1, r0
21; CHECK-LE-NEXT:  .LBB0_2: # %entry
22; CHECK-LE-NEXT:    li r0, -4096
23; CHECK-LE-NEXT:    cmpd r1, r12
24; CHECK-LE-NEXT:    beq cr0, .LBB0_4
25; CHECK-LE-NEXT:  .LBB0_3: # %entry
26; CHECK-LE-NEXT:    #
27; CHECK-LE-NEXT:    stdux r30, r1, r0
28; CHECK-LE-NEXT:    cmpd r1, r12
29; CHECK-LE-NEXT:    bne cr0, .LBB0_3
30; CHECK-LE-NEXT:  .LBB0_4: # %entry
31; CHECK-LE-NEXT:    mr r12, r30
32; CHECK-LE-NEXT:    stdu r12, -2048(r1)
33; CHECK-LE-NEXT:    stdu r12, -4096(r1)
34; CHECK-LE-NEXT:    .cfi_def_cfa_register r1
35; CHECK-LE-NEXT:    .cfi_def_cfa_register r30
36; CHECK-LE-NEXT:    .cfi_offset r31, -8
37; CHECK-LE-NEXT:    .cfi_offset r30, -16
38; CHECK-LE-NEXT:    clrldi r3, r3, 32
39; CHECK-LE-NEXT:    li r5, -2048
40; CHECK-LE-NEXT:    mr r31, r1
41; CHECK-LE-NEXT:    addi r3, r3, 15
42; CHECK-LE-NEXT:    rldicl r3, r3, 60, 4
43; CHECK-LE-NEXT:    rldicl r3, r3, 4, 31
44; CHECK-LE-NEXT:    neg r4, r3
45; CHECK-LE-NEXT:    ld r3, 0(r1)
46; CHECK-LE-NEXT:    and r5, r4, r5
47; CHECK-LE-NEXT:    mr r4, r5
48; CHECK-LE-NEXT:    li r5, -4096
49; CHECK-LE-NEXT:    divd r6, r4, r5
50; CHECK-LE-NEXT:    mulld r5, r6, r5
51; CHECK-LE-NEXT:    sub r5, r4, r5
52; CHECK-LE-NEXT:    add r4, r1, r4
53; CHECK-LE-NEXT:    stdux r3, r1, r5
54; CHECK-LE-NEXT:    cmpd r1, r4
55; CHECK-LE-NEXT:    beq cr0, .LBB0_6
56; CHECK-LE-NEXT:  .LBB0_5: # %entry
57; CHECK-LE-NEXT:    #
58; CHECK-LE-NEXT:    stdu r3, -4096(r1)
59; CHECK-LE-NEXT:    cmpd r1, r4
60; CHECK-LE-NEXT:    bne cr0, .LBB0_5
61; CHECK-LE-NEXT:  .LBB0_6: # %entry
62; CHECK-LE-NEXT:    addi r3, r1, 2048
63; CHECK-LE-NEXT:    lbz r3, 0(r3)
64; CHECK-LE-NEXT:    ld r1, 0(r1)
65; CHECK-LE-NEXT:    ld r31, -8(r1)
66; CHECK-LE-NEXT:    ld r30, -16(r1)
67; CHECK-LE-NEXT:    blr
68entry:
69  %0 = zext i32 %vla_size to i64
70  %vla = alloca i8, i64 %0, align 2048
71  %1 = load volatile i8, i8* %vla, align 2048
72  ret void
73}
74
75attributes #0 = { "probe-stack"="inline-asm" }
76