1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ 3; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 4%struct.poly2 = type { [11 x i64] } 5 6; Function Attrs: nofree norecurse nounwind 7define dso_local void @poly2_lshift1(%struct.poly2* nocapture %p) local_unnamed_addr #0 { 8; CHECK-LABEL: poly2_lshift1: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: li r4, 72 11; CHECK-NEXT: addis r5, r2, .LCPI0_0@toc@ha 12; CHECK-NEXT: addis r6, r2, .LCPI0_1@toc@ha 13; CHECK-NEXT: ld r7, 64(r3) 14; CHECK-NEXT: ld r8, 16(r3) 15; CHECK-NEXT: ld r10, 24(r3) 16; CHECK-NEXT: ld r11, 32(r3) 17; CHECK-NEXT: lxvd2x vs0, r3, r4 18; CHECK-NEXT: addi r5, r5, .LCPI0_0@toc@l 19; CHECK-NEXT: addi r6, r6, .LCPI0_1@toc@l 20; CHECK-NEXT: ld r12, 56(r3) 21; CHECK-NEXT: lxvd2x vs1, 0, r5 22; CHECK-NEXT: mtfprd f2, r7 23; CHECK-NEXT: ld r5, 0(r3) 24; CHECK-NEXT: xxswapd v2, vs0 25; CHECK-NEXT: lxvd2x vs0, 0, r6 26; CHECK-NEXT: ld r6, 8(r3) 27; CHECK-NEXT: rotldi r9, r5, 1 28; CHECK-NEXT: sldi r5, r5, 1 29; CHECK-NEXT: xxswapd v3, vs1 30; CHECK-NEXT: std r5, 0(r3) 31; CHECK-NEXT: rotldi r5, r10, 1 32; CHECK-NEXT: rldimi r9, r6, 1, 0 33; CHECK-NEXT: rotldi r6, r6, 1 34; CHECK-NEXT: xxpermdi v4, v2, vs2, 2 35; CHECK-NEXT: xxswapd v5, vs0 36; CHECK-NEXT: rldimi r6, r8, 1, 0 37; CHECK-NEXT: rotldi r8, r8, 1 38; CHECK-NEXT: std r9, 8(r3) 39; CHECK-NEXT: ld r9, 40(r3) 40; CHECK-NEXT: rldimi r8, r10, 1, 0 41; CHECK-NEXT: rldimi r5, r11, 1, 0 42; CHECK-NEXT: std r6, 16(r3) 43; CHECK-NEXT: rotldi r10, r11, 1 44; CHECK-NEXT: ld r11, 48(r3) 45; CHECK-NEXT: std r5, 32(r3) 46; CHECK-NEXT: rotldi r6, r12, 1 47; CHECK-NEXT: vsrd v3, v4, v3 48; CHECK-NEXT: rldimi r10, r9, 1, 0 49; CHECK-NEXT: rotldi r9, r9, 1 50; CHECK-NEXT: std r8, 24(r3) 51; CHECK-NEXT: vsld v2, v2, v5 52; CHECK-NEXT: rotldi r5, r11, 1 53; CHECK-NEXT: rldimi r9, r11, 1, 0 54; CHECK-NEXT: std r10, 40(r3) 55; CHECK-NEXT: rldimi r5, r12, 1, 0 56; CHECK-NEXT: rldimi r6, r7, 1, 0 57; CHECK-NEXT: std r9, 48(r3) 58; CHECK-NEXT: xxlor vs0, v2, v3 59; CHECK-NEXT: std r5, 56(r3) 60; CHECK-NEXT: std r6, 64(r3) 61; CHECK-NEXT: xxswapd vs0, vs0 62; CHECK-NEXT: stxvd2x vs0, r3, r4 63; CHECK-NEXT: blr 64entry: 65 %arrayidx = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 0 66 %0 = load i64, i64* %arrayidx, align 8 67 %shl = shl i64 %0, 1 68 store i64 %shl, i64* %arrayidx, align 8 69 %arrayidx.1 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 1 70 %1 = load i64, i64* %arrayidx.1, align 8 71 %or.1 = call i64 @llvm.fshl.i64(i64 %1, i64 %0, i64 1) 72 store i64 %or.1, i64* %arrayidx.1, align 8 73 %arrayidx.2 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 2 74 %2 = load i64, i64* %arrayidx.2, align 8 75 %or.2 = call i64 @llvm.fshl.i64(i64 %2, i64 %1, i64 1) 76 store i64 %or.2, i64* %arrayidx.2, align 8 77 %arrayidx.3 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 3 78 %3 = load i64, i64* %arrayidx.3, align 8 79 %or.3 = call i64 @llvm.fshl.i64(i64 %3, i64 %2, i64 1) 80 store i64 %or.3, i64* %arrayidx.3, align 8 81 %arrayidx.4 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 4 82 %4 = load i64, i64* %arrayidx.4, align 8 83 %or.4 = call i64 @llvm.fshl.i64(i64 %4, i64 %3, i64 1) 84 store i64 %or.4, i64* %arrayidx.4, align 8 85 %arrayidx.5 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 5 86 %5 = load i64, i64* %arrayidx.5, align 8 87 %or.5 = call i64 @llvm.fshl.i64(i64 %5, i64 %4, i64 1) 88 store i64 %or.5, i64* %arrayidx.5, align 8 89 %arrayidx.6 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 6 90 %6 = load i64, i64* %arrayidx.6, align 8 91 %or.6 = call i64 @llvm.fshl.i64(i64 %6, i64 %5, i64 1) 92 store i64 %or.6, i64* %arrayidx.6, align 8 93 %arrayidx.7 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 7 94 %7 = load i64, i64* %arrayidx.7, align 8 95 %or.7 = call i64 @llvm.fshl.i64(i64 %7, i64 %6, i64 1) 96 store i64 %or.7, i64* %arrayidx.7, align 8 97 %arrayidx.8 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 8 98 %8 = load i64, i64* %arrayidx.8, align 8 99 %or.8 = call i64 @llvm.fshl.i64(i64 %8, i64 %7, i64 1) 100 store i64 %or.8, i64* %arrayidx.8, align 8 101 %arrayidx.9 = getelementptr inbounds %struct.poly2, %struct.poly2* %p, i64 0, i32 0, i64 9 102 %9 = bitcast i64* %arrayidx.9 to <2 x i64>* 103 %10 = load <2 x i64>, <2 x i64>* %9, align 8 104 %11 = insertelement <2 x i64> undef, i64 %8, i32 0 105 %12 = shufflevector <2 x i64> %11, <2 x i64> %10, <2 x i32> <i32 0, i32 2> 106 %13 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %10, <2 x i64> %12, <2 x i64> <i64 1, i64 1>) 107 %14 = bitcast i64* %arrayidx.9 to <2 x i64>* 108 store <2 x i64> %13, <2 x i64>* %14, align 8 109 ret void 110} 111 112; Function Attrs: nofree nosync nounwind readnone speculatable willreturn 113declare i64 @llvm.fshl.i64(i64, i64, i64) #1 114 115; Function Attrs: nofree nosync nounwind readnone speculatable willreturn 116declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) #1 117