1; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx -mcpu=pwr8 < %s | \ 2; RUN: FileCheck %s --implicit-check-not lxvd2x --implicit-check-not lfs 3; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mattr=-altivec -mcpu=pwr8 -mattr=-vsx < %s | \ 4; RUN: FileCheck %s --check-prefix=CHECK-NVSXALT --implicit-check-not xxlxor \ 5; RUN: --implicit-check-not vxor 6 7define signext i32 @t1(float %x) local_unnamed_addr #0 { 8entry: 9 %cmp = fcmp ogt float %x, 0.000000e+00 10 %tmp = select i1 %cmp, i32 43, i32 11 11 ret i32 %tmp 12 13; CHECK-LABEL: t1: 14; CHECK: xxlxor [[REG1:[0-9]+]], [[REG1]], [[REG1]] 15; CHECK: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG1]] 16; CHECK: blr 17; CHECK-NVSXALT: lfs [[REG1:[0-9]+]] 18; CHECK-NVSXALT: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG1]] 19; CHECK-NVSXALT: blr 20} 21 22define signext i32 @t2(double %x) local_unnamed_addr #0 { 23entry: 24 %cmp = fcmp ogt double %x, 0.000000e+00 25 %tmp = select i1 %cmp, i32 43, i32 11 26 ret i32 %tmp 27 28; CHECK-LABEL: t2: 29; CHECK: xxlxor [[REG2:[0-9]+]], [[REG2]], [[REG2]] 30; CHECK: xscmpudp {{[0-9]+}}, {{[0-9]+}}, [[REG2]] 31; CHECK: blr 32; CHECK-NVSXALT: lfs [[REG2:[0-9]+]] 33; CHECK-NVSXALT: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG2]] 34; CHECK-NVSXALT: blr 35} 36 37define signext i32 @t3(ppc_fp128 %x) local_unnamed_addr #0 { 38entry: 39 %cmp = fcmp ogt ppc_fp128 %x, 0xM00000000000000000000000000000000 40 %tmp = select i1 %cmp, i32 43, i32 11 41 ret i32 %tmp 42 43; CHECK-LABEL: t3: 44; CHECK: xxlxor [[REG3:[0-9]+]], [[REG3]], [[REG3]] 45; CHECK: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG3]] 46; CHECK: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG3]] 47; CHECK: blr 48; CHECK-NVSXALT: lfs [[REG3:[0-9]+]] 49; CHECK-NVSXALT: fcmpu {{[0-9]+}}, {{[0-9]+}}, [[REG3]] 50; CHECK-NVSXALT: blr 51} 52 53define <2 x double> @t4() local_unnamed_addr #0 { 54 ret <2 x double> zeroinitializer 55; CHECK-LABEL: t4: 56; CHECK: xxlxor [[REG4:[0-9]+]], [[REG4]], [[REG4]] 57; CHECK: blr 58; CHECK-NVSXALT: lfs [[REG4:[0-9]+]] 59; CHECK-NVSXALT: fmr {{[0-9]+}}, [[REG4:[0-9]+]] 60; CHECK-NVSXALT: blr 61} 62 63define <2 x i64> @t5() local_unnamed_addr #0 { 64 ret <2 x i64> zeroinitializer 65; CHECK-LABEL: t5: 66; CHECK: xxlxor [[REG5:[0-9]+]], [[REG5]], [[REG5]] 67; CHECK: blr 68; CHECK-NVSXALT: li 3, 0 69; CHECK-NVSXALT-NEXT: li 4, 0 70; CHECK-NVSXALT-NEXT: blr 71} 72