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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s
3
4; Check if this causes infinite loop when estimation disabled
5define <4 x float> @repeated_fp_divisor_noest(float %a, <4 x float> %b) {
6; CHECK-LABEL: repeated_fp_divisor_noest:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    xscvdpspn 0, 1
9; CHECK-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
10; CHECK-NEXT:    addi 3, 3, .LCPI0_1@toc@l
11; CHECK-NEXT:    lvx 3, 0, 3
12; CHECK-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
13; CHECK-NEXT:    addi 3, 3, .LCPI0_0@toc@l
14; CHECK-NEXT:    xxspltw 0, 0, 0
15; CHECK-NEXT:    xvdivsp 0, 35, 0
16; CHECK-NEXT:    lvx 3, 0, 3
17; CHECK-NEXT:    xvmulsp 1, 34, 35
18; CHECK-NEXT:    xvmulsp 34, 1, 0
19; CHECK-NEXT:    blr
20  %ins = insertelement <4 x float> undef, float %a, i32 0
21  %splat = shufflevector <4 x float> %ins, <4 x float> undef, <4 x i32> zeroinitializer
22  %t1 = fmul reassoc <4 x float> %b, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0x3FF028F5C0000000>
23  %mul = fdiv reassoc arcp nsz <4 x float> %t1, %splat
24  ret <4 x float> %mul
25}
26
27define <4 x float> @repeated_fp_divisor(float %a, <4 x float> %b) {
28; CHECK-LABEL: repeated_fp_divisor:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    xscvdpspn 0, 1
31; CHECK-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
32; CHECK-NEXT:    addi 3, 3, .LCPI1_0@toc@l
33; CHECK-NEXT:    lvx 3, 0, 3
34; CHECK-NEXT:    addis 3, 2, .LCPI1_1@toc@ha
35; CHECK-NEXT:    addi 3, 3, .LCPI1_1@toc@l
36; CHECK-NEXT:    lvx 4, 0, 3
37; CHECK-NEXT:    xxspltw 0, 0, 0
38; CHECK-NEXT:    xvresp 1, 0
39; CHECK-NEXT:    xvnmsubasp 35, 0, 1
40; CHECK-NEXT:    xvmulsp 0, 34, 36
41; CHECK-NEXT:    xvmaddasp 1, 1, 35
42; CHECK-NEXT:    xvmulsp 34, 0, 1
43; CHECK-NEXT:    blr
44  %ins = insertelement <4 x float> undef, float %a, i32 0
45  %splat = shufflevector <4 x float> %ins, <4 x float> undef, <4 x i32> zeroinitializer
46  %t1 = fmul reassoc <4 x float> %b, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0x3FF028F5C0000000>
47  %mul = fdiv reassoc arcp nsz ninf <4 x float> %t1, %splat
48  ret <4 x float> %mul
49}
50
51