1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu \ 3; RUN: -mattr=+spe | FileCheck %s 4 5declare float @llvm.fabs.float(float) 6define float @test_float_abs(float %a) #0 { 7; CHECK-LABEL: test_float_abs: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: efsabs 3, 3 10; CHECK-NEXT: blr 11 entry: 12 %0 = tail call float @llvm.fabs.float(float %a) 13 ret float %0 14} 15 16define float @test_fnabs(float %a) #0 { 17; CHECK-LABEL: test_fnabs: 18; CHECK: # %bb.0: # %entry 19; CHECK-NEXT: efsnabs 3, 3 20; CHECK-NEXT: blr 21 entry: 22 %0 = tail call float @llvm.fabs.float(float %a) 23 %sub = fsub float -0.000000e+00, %0 24 ret float %sub 25} 26 27define float @test_fdiv(float %a, float %b) { 28; CHECK-LABEL: test_fdiv: 29; CHECK: # %bb.0: # %entry 30; CHECK-NEXT: efsdiv 3, 3, 4 31; CHECK-NEXT: blr 32entry: 33 %v = fdiv float %a, %b 34 ret float %v 35 36} 37 38define float @test_fmul(float %a, float %b) { 39; CHECK-LABEL: test_fmul: 40; CHECK: # %bb.0: # %entry 41; CHECK-NEXT: efsmul 3, 3, 4 42; CHECK-NEXT: blr 43 entry: 44 %v = fmul float %a, %b 45 ret float %v 46} 47 48define float @test_fadd(float %a, float %b) { 49; CHECK-LABEL: test_fadd: 50; CHECK: # %bb.0: # %entry 51; CHECK-NEXT: efsadd 3, 3, 4 52; CHECK-NEXT: blr 53 entry: 54 %v = fadd float %a, %b 55 ret float %v 56} 57 58define float @test_fsub(float %a, float %b) { 59; CHECK-LABEL: test_fsub: 60; CHECK: # %bb.0: # %entry 61; CHECK-NEXT: efssub 3, 3, 4 62; CHECK-NEXT: blr 63 entry: 64 %v = fsub float %a, %b 65 ret float %v 66} 67 68define float @test_fneg(float %a) { 69; CHECK-LABEL: test_fneg: 70; CHECK: # %bb.0: # %entry 71; CHECK-NEXT: efsneg 3, 3 72; CHECK-NEXT: blr 73 entry: 74 %v = fsub float -0.0, %a 75 ret float %v 76} 77 78define float @test_dtos(double %a) { 79; CHECK-LABEL: test_dtos: 80; CHECK: # %bb.0: # %entry 81; CHECK-NEXT: evmergelo 3, 3, 4 82; CHECK-NEXT: efscfd 3, 3 83; CHECK-NEXT: blr 84 entry: 85 %v = fptrunc double %a to float 86 ret float %v 87} 88 89define i32 @test_fcmpgt(float %a, float %b) { 90; CHECK-LABEL: test_fcmpgt: 91; CHECK: # %bb.0: # %entry 92; CHECK-NEXT: stwu 1, -16(1) 93; CHECK-NEXT: .cfi_def_cfa_offset 16 94; CHECK-NEXT: efscmpgt 0, 3, 4 95; CHECK-NEXT: ble 0, .LBB8_2 96; CHECK-NEXT: # %bb.1: # %tr 97; CHECK-NEXT: li 3, 1 98; CHECK-NEXT: b .LBB8_3 99; CHECK-NEXT: .LBB8_2: # %fa 100; CHECK-NEXT: li 3, 0 101; CHECK-NEXT: .LBB8_3: # %ret 102; CHECK-NEXT: stw 3, 12(1) 103; CHECK-NEXT: lwz 3, 12(1) 104; CHECK-NEXT: addi 1, 1, 16 105; CHECK-NEXT: blr 106 entry: 107 %r = alloca i32, align 4 108 %c = fcmp ogt float %a, %b 109 br i1 %c, label %tr, label %fa 110tr: 111 store i32 1, i32* %r, align 4 112 br label %ret 113fa: 114 store i32 0, i32* %r, align 4 115 br label %ret 116ret: 117 %0 = load i32, i32* %r, align 4 118 ret i32 %0 119} 120 121define i32 @test_fcmpugt(float %a, float %b) { 122; CHECK-LABEL: test_fcmpugt: 123; CHECK: # %bb.0: # %entry 124; CHECK-NEXT: stwu 1, -16(1) 125; CHECK-NEXT: .cfi_def_cfa_offset 16 126; CHECK-NEXT: efscmpeq 0, 4, 4 127; CHECK-NEXT: bc 4, 1, .LBB9_4 128; CHECK-NEXT: # %bb.1: # %entry 129; CHECK-NEXT: efscmpeq 0, 3, 3 130; CHECK-NEXT: bc 4, 1, .LBB9_4 131; CHECK-NEXT: # %bb.2: # %entry 132; CHECK-NEXT: efscmpgt 0, 3, 4 133; CHECK-NEXT: bc 12, 1, .LBB9_4 134; CHECK-NEXT: # %bb.3: # %fa 135; CHECK-NEXT: li 3, 0 136; CHECK-NEXT: b .LBB9_5 137; CHECK-NEXT: .LBB9_4: # %tr 138; CHECK-NEXT: li 3, 1 139; CHECK-NEXT: .LBB9_5: # %ret 140; CHECK-NEXT: stw 3, 12(1) 141; CHECK-NEXT: lwz 3, 12(1) 142; CHECK-NEXT: addi 1, 1, 16 143; CHECK-NEXT: blr 144 entry: 145 %r = alloca i32, align 4 146 %c = fcmp ugt float %a, %b 147 br i1 %c, label %tr, label %fa 148tr: 149 store i32 1, i32* %r, align 4 150 br label %ret 151fa: 152 store i32 0, i32* %r, align 4 153 br label %ret 154ret: 155 %0 = load i32, i32* %r, align 4 156 ret i32 %0 157} 158 159define i32 @test_fcmple(float %a, float %b) { 160; CHECK-LABEL: test_fcmple: 161; CHECK: # %bb.0: # %entry 162; CHECK-NEXT: stwu 1, -16(1) 163; CHECK-NEXT: .cfi_def_cfa_offset 16 164; CHECK-NEXT: efscmpeq 0, 3, 3 165; CHECK-NEXT: bc 4, 1, .LBB10_4 166; CHECK-NEXT: # %bb.1: # %entry 167; CHECK-NEXT: efscmpeq 0, 4, 4 168; CHECK-NEXT: bc 4, 1, .LBB10_4 169; CHECK-NEXT: # %bb.2: # %entry 170; CHECK-NEXT: efscmpgt 0, 3, 4 171; CHECK-NEXT: bc 12, 1, .LBB10_4 172; CHECK-NEXT: # %bb.3: # %tr 173; CHECK-NEXT: li 3, 1 174; CHECK-NEXT: b .LBB10_5 175; CHECK-NEXT: .LBB10_4: # %fa 176; CHECK-NEXT: li 3, 0 177; CHECK-NEXT: .LBB10_5: # %ret 178; CHECK-NEXT: stw 3, 12(1) 179; CHECK-NEXT: lwz 3, 12(1) 180; CHECK-NEXT: addi 1, 1, 16 181; CHECK-NEXT: blr 182 entry: 183 %r = alloca i32, align 4 184 %c = fcmp ole float %a, %b 185 br i1 %c, label %tr, label %fa 186tr: 187 store i32 1, i32* %r, align 4 188 br label %ret 189fa: 190 store i32 0, i32* %r, align 4 191 br label %ret 192ret: 193 %0 = load i32, i32* %r, align 4 194 ret i32 %0 195} 196 197define i32 @test_fcmpule(float %a, float %b) { 198; CHECK-LABEL: test_fcmpule: 199; CHECK: # %bb.0: # %entry 200; CHECK-NEXT: stwu 1, -16(1) 201; CHECK-NEXT: .cfi_def_cfa_offset 16 202; CHECK-NEXT: efscmpgt 0, 3, 4 203; CHECK-NEXT: bgt 0, .LBB11_2 204; CHECK-NEXT: # %bb.1: # %tr 205; CHECK-NEXT: li 3, 1 206; CHECK-NEXT: b .LBB11_3 207; CHECK-NEXT: .LBB11_2: # %fa 208; CHECK-NEXT: li 3, 0 209; CHECK-NEXT: .LBB11_3: # %ret 210; CHECK-NEXT: stw 3, 12(1) 211; CHECK-NEXT: lwz 3, 12(1) 212; CHECK-NEXT: addi 1, 1, 16 213; CHECK-NEXT: blr 214 entry: 215 %r = alloca i32, align 4 216 %c = fcmp ule float %a, %b 217 br i1 %c, label %tr, label %fa 218tr: 219 store i32 1, i32* %r, align 4 220 br label %ret 221fa: 222 store i32 0, i32* %r, align 4 223 br label %ret 224ret: 225 %0 = load i32, i32* %r, align 4 226 ret i32 %0 227} 228 229; The type of comparison found in C's if (x == y) 230define i32 @test_fcmpeq(float %a, float %b) { 231; CHECK-LABEL: test_fcmpeq: 232; CHECK: # %bb.0: # %entry 233; CHECK-NEXT: stwu 1, -16(1) 234; CHECK-NEXT: .cfi_def_cfa_offset 16 235; CHECK-NEXT: efscmpeq 0, 3, 4 236; CHECK-NEXT: ble 0, .LBB12_2 237; CHECK-NEXT: # %bb.1: # %tr 238; CHECK-NEXT: li 3, 1 239; CHECK-NEXT: b .LBB12_3 240; CHECK-NEXT: .LBB12_2: # %fa 241; CHECK-NEXT: li 3, 0 242; CHECK-NEXT: .LBB12_3: # %ret 243; CHECK-NEXT: stw 3, 12(1) 244; CHECK-NEXT: lwz 3, 12(1) 245; CHECK-NEXT: addi 1, 1, 16 246; CHECK-NEXT: blr 247 entry: 248 %r = alloca i32, align 4 249 %c = fcmp oeq float %a, %b 250 br i1 %c, label %tr, label %fa 251tr: 252 store i32 1, i32* %r, align 4 253 br label %ret 254fa: 255 store i32 0, i32* %r, align 4 256 br label %ret 257ret: 258 %0 = load i32, i32* %r, align 4 259 ret i32 %0 260} 261 262; (un)ordered tests are expanded to une and oeq so verify 263define i1 @test_fcmpuno(float %a, float %b) { 264; CHECK-LABEL: test_fcmpuno: 265; CHECK: # %bb.0: # %entry 266; CHECK-NEXT: efscmpeq 0, 3, 3 267; CHECK-NEXT: efscmpeq 1, 4, 4 268; CHECK-NEXT: li 5, 1 269; CHECK-NEXT: crand 20, 5, 1 270; CHECK-NEXT: bc 12, 20, .LBB13_2 271; CHECK-NEXT: # %bb.1: # %entry 272; CHECK-NEXT: ori 3, 5, 0 273; CHECK-NEXT: blr 274; CHECK-NEXT: .LBB13_2: # %entry 275; CHECK-NEXT: li 3, 0 276; CHECK-NEXT: blr 277 entry: 278 %r = fcmp uno float %a, %b 279 ret i1 %r 280} 281 282define i1 @test_fcmpord(float %a, float %b) { 283; CHECK-LABEL: test_fcmpord: 284; CHECK: # %bb.0: # %entry 285; CHECK-NEXT: efscmpeq 0, 4, 4 286; CHECK-NEXT: efscmpeq 1, 3, 3 287; CHECK-NEXT: li 5, 1 288; CHECK-NEXT: crnand 20, 5, 1 289; CHECK-NEXT: bc 12, 20, .LBB14_2 290; CHECK-NEXT: # %bb.1: # %entry 291; CHECK-NEXT: ori 3, 5, 0 292; CHECK-NEXT: blr 293; CHECK-NEXT: .LBB14_2: # %entry 294; CHECK-NEXT: li 3, 0 295; CHECK-NEXT: blr 296 entry: 297 %r = fcmp ord float %a, %b 298 ret i1 %r 299} 300 301define i1 @test_fcmpueq(float %a, float %b) { 302; CHECK-LABEL: test_fcmpueq: 303; CHECK: # %bb.0: # %entry 304; CHECK-NEXT: efscmpeq 0, 3, 3 305; CHECK-NEXT: efscmpeq 1, 4, 4 306; CHECK-NEXT: crnand 20, 5, 1 307; CHECK-NEXT: efscmpeq 0, 3, 4 308; CHECK-NEXT: li 5, 1 309; CHECK-NEXT: crnor 20, 1, 20 310; CHECK-NEXT: bc 12, 20, .LBB15_2 311; CHECK-NEXT: # %bb.1: # %entry 312; CHECK-NEXT: ori 3, 5, 0 313; CHECK-NEXT: blr 314; CHECK-NEXT: .LBB15_2: # %entry 315; CHECK-NEXT: li 3, 0 316; CHECK-NEXT: blr 317 entry: 318 %r = fcmp ueq float %a, %b 319 ret i1 %r 320} 321 322define i1 @test_fcmpne(float %a, float %b) { 323; CHECK-LABEL: test_fcmpne: 324; CHECK: # %bb.0: # %entry 325; CHECK-NEXT: efscmpeq 0, 4, 4 326; CHECK-NEXT: efscmpeq 1, 3, 3 327; CHECK-NEXT: crand 20, 5, 1 328; CHECK-NEXT: efscmpeq 0, 3, 4 329; CHECK-NEXT: li 5, 1 330; CHECK-NEXT: crorc 20, 1, 20 331; CHECK-NEXT: bc 12, 20, .LBB16_2 332; CHECK-NEXT: # %bb.1: # %entry 333; CHECK-NEXT: ori 3, 5, 0 334; CHECK-NEXT: blr 335; CHECK-NEXT: .LBB16_2: # %entry 336; CHECK-NEXT: li 3, 0 337; CHECK-NEXT: blr 338 entry: 339 %r = fcmp one float %a, %b 340 ret i1 %r 341} 342 343define i32 @test_fcmpune(float %a, float %b) { 344; CHECK-LABEL: test_fcmpune: 345; CHECK: # %bb.0: # %entry 346; CHECK-NEXT: stwu 1, -16(1) 347; CHECK-NEXT: .cfi_def_cfa_offset 16 348; CHECK-NEXT: efscmpeq 0, 3, 4 349; CHECK-NEXT: bgt 0, .LBB17_2 350; CHECK-NEXT: # %bb.1: # %tr 351; CHECK-NEXT: li 3, 1 352; CHECK-NEXT: b .LBB17_3 353; CHECK-NEXT: .LBB17_2: # %fa 354; CHECK-NEXT: li 3, 0 355; CHECK-NEXT: .LBB17_3: # %ret 356; CHECK-NEXT: stw 3, 12(1) 357; CHECK-NEXT: lwz 3, 12(1) 358; CHECK-NEXT: addi 1, 1, 16 359; CHECK-NEXT: blr 360 entry: 361 %r = alloca i32, align 4 362 %c = fcmp une float %a, %b 363 br i1 %c, label %tr, label %fa 364tr: 365 store i32 1, i32* %r, align 4 366 br label %ret 367fa: 368 store i32 0, i32* %r, align 4 369 br label %ret 370ret: 371 %0 = load i32, i32* %r, align 4 372 ret i32 %0 373} 374 375define i32 @test_fcmplt(float %a, float %b) { 376; CHECK-LABEL: test_fcmplt: 377; CHECK: # %bb.0: # %entry 378; CHECK-NEXT: stwu 1, -16(1) 379; CHECK-NEXT: .cfi_def_cfa_offset 16 380; CHECK-NEXT: efscmplt 0, 3, 4 381; CHECK-NEXT: ble 0, .LBB18_2 382; CHECK-NEXT: # %bb.1: # %tr 383; CHECK-NEXT: li 3, 1 384; CHECK-NEXT: b .LBB18_3 385; CHECK-NEXT: .LBB18_2: # %fa 386; CHECK-NEXT: li 3, 0 387; CHECK-NEXT: .LBB18_3: # %ret 388; CHECK-NEXT: stw 3, 12(1) 389; CHECK-NEXT: lwz 3, 12(1) 390; CHECK-NEXT: addi 1, 1, 16 391; CHECK-NEXT: blr 392 entry: 393 %r = alloca i32, align 4 394 %c = fcmp olt float %a, %b 395 br i1 %c, label %tr, label %fa 396tr: 397 store i32 1, i32* %r, align 4 398 br label %ret 399fa: 400 store i32 0, i32* %r, align 4 401 br label %ret 402ret: 403 %0 = load i32, i32* %r, align 4 404 ret i32 %0 405} 406 407define i1 @test_fcmpult(float %a, float %b) { 408; CHECK-LABEL: test_fcmpult: 409; CHECK: # %bb.0: # %entry 410; CHECK-NEXT: efscmpeq 0, 3, 3 411; CHECK-NEXT: efscmpeq 1, 4, 4 412; CHECK-NEXT: crnand 20, 5, 1 413; CHECK-NEXT: efscmplt 0, 3, 4 414; CHECK-NEXT: li 5, 1 415; CHECK-NEXT: crnor 20, 1, 20 416; CHECK-NEXT: bc 12, 20, .LBB19_2 417; CHECK-NEXT: # %bb.1: # %entry 418; CHECK-NEXT: ori 3, 5, 0 419; CHECK-NEXT: blr 420; CHECK-NEXT: .LBB19_2: # %entry 421; CHECK-NEXT: li 3, 0 422; CHECK-NEXT: blr 423 entry: 424 %r = fcmp ult float %a, %b 425 ret i1 %r 426} 427 428define i32 @test_fcmpge(float %a, float %b) { 429; CHECK-LABEL: test_fcmpge: 430; CHECK: # %bb.0: # %entry 431; CHECK-NEXT: stwu 1, -16(1) 432; CHECK-NEXT: .cfi_def_cfa_offset 16 433; CHECK-NEXT: efscmpeq 0, 3, 3 434; CHECK-NEXT: bc 4, 1, .LBB20_4 435; CHECK-NEXT: # %bb.1: # %entry 436; CHECK-NEXT: efscmpeq 0, 4, 4 437; CHECK-NEXT: bc 4, 1, .LBB20_4 438; CHECK-NEXT: # %bb.2: # %entry 439; CHECK-NEXT: efscmplt 0, 3, 4 440; CHECK-NEXT: bc 12, 1, .LBB20_4 441; CHECK-NEXT: # %bb.3: # %tr 442; CHECK-NEXT: li 3, 1 443; CHECK-NEXT: b .LBB20_5 444; CHECK-NEXT: .LBB20_4: # %fa 445; CHECK-NEXT: li 3, 0 446; CHECK-NEXT: .LBB20_5: # %ret 447; CHECK-NEXT: stw 3, 12(1) 448; CHECK-NEXT: lwz 3, 12(1) 449; CHECK-NEXT: addi 1, 1, 16 450; CHECK-NEXT: blr 451 entry: 452 %r = alloca i32, align 4 453 %c = fcmp oge float %a, %b 454 br i1 %c, label %tr, label %fa 455tr: 456 store i32 1, i32* %r, align 4 457 br label %ret 458fa: 459 store i32 0, i32* %r, align 4 460 br label %ret 461ret: 462 %0 = load i32, i32* %r, align 4 463 ret i32 %0 464} 465 466define i32 @test_fcmpuge(float %a, float %b) { 467; CHECK-LABEL: test_fcmpuge: 468; CHECK: # %bb.0: # %entry 469; CHECK-NEXT: stwu 1, -16(1) 470; CHECK-NEXT: .cfi_def_cfa_offset 16 471; CHECK-NEXT: efscmplt 0, 3, 4 472; CHECK-NEXT: bgt 0, .LBB21_2 473; CHECK-NEXT: # %bb.1: # %tr 474; CHECK-NEXT: li 3, 1 475; CHECK-NEXT: b .LBB21_3 476; CHECK-NEXT: .LBB21_2: # %fa 477; CHECK-NEXT: li 3, 0 478; CHECK-NEXT: .LBB21_3: # %ret 479; CHECK-NEXT: stw 3, 12(1) 480; CHECK-NEXT: lwz 3, 12(1) 481; CHECK-NEXT: addi 1, 1, 16 482; CHECK-NEXT: blr 483 entry: 484 %r = alloca i32, align 4 485 %c = fcmp uge float %a, %b 486 br i1 %c, label %tr, label %fa 487tr: 488 store i32 1, i32* %r, align 4 489 br label %ret 490fa: 491 store i32 0, i32* %r, align 4 492 br label %ret 493ret: 494 %0 = load i32, i32* %r, align 4 495 ret i32 %0 496} 497 498 499define i32 @test_ftoui(float %a) { 500; CHECK-LABEL: test_ftoui: 501; CHECK: # %bb.0: 502; CHECK-NEXT: efsctuiz 3, 3 503; CHECK-NEXT: blr 504 %v = fptoui float %a to i32 505 ret i32 %v 506} 507 508define i32 @test_ftosi(float %a) { 509; CHECK-LABEL: test_ftosi: 510; CHECK: # %bb.0: 511; CHECK-NEXT: efsctsiz 3, 3 512; CHECK-NEXT: blr 513 %v = fptosi float %a to i32 514 ret i32 %v 515} 516 517define float @test_ffromui(i32 %a) { 518; CHECK-LABEL: test_ffromui: 519; CHECK: # %bb.0: 520; CHECK-NEXT: efscfui 3, 3 521; CHECK-NEXT: blr 522 %v = uitofp i32 %a to float 523 ret float %v 524} 525 526define float @test_ffromsi(i32 %a) { 527; CHECK-LABEL: test_ffromsi: 528; CHECK: # %bb.0: 529; CHECK-NEXT: efscfsi 3, 3 530; CHECK-NEXT: blr 531 %v = sitofp i32 %a to float 532 ret float %v 533} 534 535define i32 @test_fasmconst(float %x) { 536; CHECK-LABEL: test_fasmconst: 537; CHECK: # %bb.0: # %entry 538; CHECK-NEXT: stwu 1, -32(1) 539; CHECK-NEXT: .cfi_def_cfa_offset 32 540; CHECK-NEXT: stw 3, 20(1) 541; CHECK-NEXT: stw 3, 24(1) 542; CHECK-NEXT: lwz 3, 20(1) 543; CHECK-NEXT: #APP 544; CHECK-NEXT: efsctsi 3, 3 545; CHECK-NEXT: #NO_APP 546; CHECK-NEXT: addi 1, 1, 32 547; CHECK-NEXT: blr 548entry: 549 %x.addr = alloca float, align 8 550 store float %x, float* %x.addr, align 8 551 %0 = load float, float* %x.addr, align 8 552 %1 = call i32 asm sideeffect "efsctsi $0, $1", "=f,f"(float %0) 553 ret i32 %1 554; Check that it's not loading a double 555} 556 557; Double tests 558 559define void @test_double_abs(double * %aa) #0 { 560; CHECK-LABEL: test_double_abs: 561; CHECK: # %bb.0: # %entry 562; CHECK-NEXT: evldd 4, 0(3) 563; CHECK-NEXT: efdabs 4, 4 564; CHECK-NEXT: evstdd 4, 0(3) 565; CHECK-NEXT: blr 566 entry: 567 %0 = load double, double * %aa 568 %1 = tail call double @llvm.fabs.f64(double %0) #2 569 store double %1, double * %aa 570 ret void 571} 572 573; Function Attrs: nounwind readnone 574declare double @llvm.fabs.f64(double) #1 575 576define void @test_dnabs(double * %aa) #0 { 577; CHECK-LABEL: test_dnabs: 578; CHECK: # %bb.0: # %entry 579; CHECK-NEXT: evldd 4, 0(3) 580; CHECK-NEXT: efdnabs 4, 4 581; CHECK-NEXT: evstdd 4, 0(3) 582; CHECK-NEXT: blr 583 entry: 584 %0 = load double, double * %aa 585 %1 = tail call double @llvm.fabs.f64(double %0) #2 586 %sub = fsub double -0.000000e+00, %1 587 store double %sub, double * %aa 588 ret void 589} 590 591define double @test_ddiv(double %a, double %b) { 592; CHECK-LABEL: test_ddiv: 593; CHECK: # %bb.0: # %entry 594; CHECK-NEXT: evmergelo 5, 5, 6 595; CHECK-NEXT: evmergelo 3, 3, 4 596; CHECK-NEXT: efddiv 4, 3, 5 597; CHECK-NEXT: evmergehi 3, 4, 4 598; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 599; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 600; CHECK-NEXT: blr 601entry: 602 %v = fdiv double %a, %b 603 ret double %v 604 605} 606 607define double @test_dmul(double %a, double %b) { 608; CHECK-LABEL: test_dmul: 609; CHECK: # %bb.0: # %entry 610; CHECK-NEXT: evmergelo 5, 5, 6 611; CHECK-NEXT: evmergelo 3, 3, 4 612; CHECK-NEXT: efdmul 4, 3, 5 613; CHECK-NEXT: evmergehi 3, 4, 4 614; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 615; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 616; CHECK-NEXT: blr 617 entry: 618 %v = fmul double %a, %b 619 ret double %v 620} 621 622define double @test_dadd(double %a, double %b) { 623; CHECK-LABEL: test_dadd: 624; CHECK: # %bb.0: # %entry 625; CHECK-NEXT: evmergelo 5, 5, 6 626; CHECK-NEXT: evmergelo 3, 3, 4 627; CHECK-NEXT: efdadd 4, 3, 5 628; CHECK-NEXT: evmergehi 3, 4, 4 629; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 630; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 631; CHECK-NEXT: blr 632 entry: 633 %v = fadd double %a, %b 634 ret double %v 635} 636 637define double @test_dsub(double %a, double %b) { 638; CHECK-LABEL: test_dsub: 639; CHECK: # %bb.0: # %entry 640; CHECK-NEXT: evmergelo 5, 5, 6 641; CHECK-NEXT: evmergelo 3, 3, 4 642; CHECK-NEXT: efdsub 4, 3, 5 643; CHECK-NEXT: evmergehi 3, 4, 4 644; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 645; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 646; CHECK-NEXT: blr 647 entry: 648 %v = fsub double %a, %b 649 ret double %v 650} 651 652define double @test_dneg(double %a) { 653; CHECK-LABEL: test_dneg: 654; CHECK: # %bb.0: # %entry 655; CHECK-NEXT: evmergelo 3, 3, 4 656; CHECK-NEXT: efdneg 4, 3 657; CHECK-NEXT: evmergehi 3, 4, 4 658; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 659; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 660; CHECK-NEXT: blr 661 entry: 662 %v = fsub double -0.0, %a 663 ret double %v 664} 665 666define double @test_stod(float %a) { 667; CHECK-LABEL: test_stod: 668; CHECK: # %bb.0: # %entry 669; CHECK-NEXT: efdcfs 4, 3 670; CHECK-NEXT: evmergehi 3, 4, 4 671; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 672; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 673; CHECK-NEXT: blr 674 entry: 675 %v = fpext float %a to double 676 ret double %v 677} 678 679; (un)ordered tests are expanded to une and oeq so verify 680define i1 @test_dcmpuno(double %a, double %b) { 681; CHECK-LABEL: test_dcmpuno: 682; CHECK: # %bb.0: # %entry 683; CHECK-NEXT: evmergelo 5, 5, 6 684; CHECK-NEXT: evmergelo 3, 3, 4 685; CHECK-NEXT: li 7, 1 686; CHECK-NEXT: efdcmpeq 0, 3, 3 687; CHECK-NEXT: efdcmpeq 1, 5, 5 688; CHECK-NEXT: crand 20, 5, 1 689; CHECK-NEXT: bc 12, 20, .LBB35_2 690; CHECK-NEXT: # %bb.1: # %entry 691; CHECK-NEXT: ori 3, 7, 0 692; CHECK-NEXT: blr 693; CHECK-NEXT: .LBB35_2: # %entry 694; CHECK-NEXT: li 3, 0 695; CHECK-NEXT: blr 696 entry: 697 %r = fcmp uno double %a, %b 698 ret i1 %r 699} 700 701define i1 @test_dcmpord(double %a, double %b) { 702; CHECK-LABEL: test_dcmpord: 703; CHECK: # %bb.0: # %entry 704; CHECK-NEXT: evmergelo 3, 3, 4 705; CHECK-NEXT: evmergelo 4, 5, 6 706; CHECK-NEXT: li 7, 1 707; CHECK-NEXT: efdcmpeq 0, 4, 4 708; CHECK-NEXT: efdcmpeq 1, 3, 3 709; CHECK-NEXT: crnand 20, 5, 1 710; CHECK-NEXT: bc 12, 20, .LBB36_2 711; CHECK-NEXT: # %bb.1: # %entry 712; CHECK-NEXT: ori 3, 7, 0 713; CHECK-NEXT: blr 714; CHECK-NEXT: .LBB36_2: # %entry 715; CHECK-NEXT: li 3, 0 716; CHECK-NEXT: blr 717 entry: 718 %r = fcmp ord double %a, %b 719 ret i1 %r 720} 721 722define i32 @test_dcmpgt(double %a, double %b) { 723; CHECK-LABEL: test_dcmpgt: 724; CHECK: # %bb.0: # %entry 725; CHECK-NEXT: stwu 1, -16(1) 726; CHECK-NEXT: .cfi_def_cfa_offset 16 727; CHECK-NEXT: evmergelo 5, 5, 6 728; CHECK-NEXT: evmergelo 3, 3, 4 729; CHECK-NEXT: efdcmpgt 0, 3, 5 730; CHECK-NEXT: ble 0, .LBB37_2 731; CHECK-NEXT: # %bb.1: # %tr 732; CHECK-NEXT: li 3, 1 733; CHECK-NEXT: b .LBB37_3 734; CHECK-NEXT: .LBB37_2: # %fa 735; CHECK-NEXT: li 3, 0 736; CHECK-NEXT: .LBB37_3: # %ret 737; CHECK-NEXT: stw 3, 12(1) 738; CHECK-NEXT: lwz 3, 12(1) 739; CHECK-NEXT: addi 1, 1, 16 740; CHECK-NEXT: blr 741 entry: 742 %r = alloca i32, align 4 743 %c = fcmp ogt double %a, %b 744 br i1 %c, label %tr, label %fa 745tr: 746 store i32 1, i32* %r, align 4 747 br label %ret 748fa: 749 store i32 0, i32* %r, align 4 750 br label %ret 751ret: 752 %0 = load i32, i32* %r, align 4 753 ret i32 %0 754} 755 756define i32 @test_dcmpugt(double %a, double %b) { 757; CHECK-LABEL: test_dcmpugt: 758; CHECK: # %bb.0: # %entry 759; CHECK-NEXT: stwu 1, -16(1) 760; CHECK-NEXT: .cfi_def_cfa_offset 16 761; CHECK-NEXT: evmergelo 3, 3, 4 762; CHECK-NEXT: evmergelo 4, 5, 6 763; CHECK-NEXT: efdcmpeq 0, 4, 4 764; CHECK-NEXT: bc 4, 1, .LBB38_4 765; CHECK-NEXT: # %bb.1: # %entry 766; CHECK-NEXT: efdcmpeq 0, 3, 3 767; CHECK-NEXT: bc 4, 1, .LBB38_4 768; CHECK-NEXT: # %bb.2: # %entry 769; CHECK-NEXT: efdcmpgt 0, 3, 4 770; CHECK-NEXT: bc 12, 1, .LBB38_4 771; CHECK-NEXT: # %bb.3: # %fa 772; CHECK-NEXT: li 3, 0 773; CHECK-NEXT: b .LBB38_5 774; CHECK-NEXT: .LBB38_4: # %tr 775; CHECK-NEXT: li 3, 1 776; CHECK-NEXT: .LBB38_5: # %ret 777; CHECK-NEXT: stw 3, 12(1) 778; CHECK-NEXT: lwz 3, 12(1) 779; CHECK-NEXT: addi 1, 1, 16 780; CHECK-NEXT: blr 781 entry: 782 %r = alloca i32, align 4 783 %c = fcmp ugt double %a, %b 784 br i1 %c, label %tr, label %fa 785tr: 786 store i32 1, i32* %r, align 4 787 br label %ret 788fa: 789 store i32 0, i32* %r, align 4 790 br label %ret 791ret: 792 %0 = load i32, i32* %r, align 4 793 ret i32 %0 794} 795 796define i32 @test_dcmple(double %a, double %b) { 797; CHECK-LABEL: test_dcmple: 798; CHECK: # %bb.0: # %entry 799; CHECK-NEXT: stwu 1, -16(1) 800; CHECK-NEXT: .cfi_def_cfa_offset 16 801; CHECK-NEXT: evmergelo 5, 5, 6 802; CHECK-NEXT: evmergelo 3, 3, 4 803; CHECK-NEXT: efdcmpgt 0, 3, 5 804; CHECK-NEXT: bgt 0, .LBB39_2 805; CHECK-NEXT: # %bb.1: # %tr 806; CHECK-NEXT: li 3, 1 807; CHECK-NEXT: b .LBB39_3 808; CHECK-NEXT: .LBB39_2: # %fa 809; CHECK-NEXT: li 3, 0 810; CHECK-NEXT: .LBB39_3: # %ret 811; CHECK-NEXT: stw 3, 12(1) 812; CHECK-NEXT: lwz 3, 12(1) 813; CHECK-NEXT: addi 1, 1, 16 814; CHECK-NEXT: blr 815 entry: 816 %r = alloca i32, align 4 817 %c = fcmp ule double %a, %b 818 br i1 %c, label %tr, label %fa 819tr: 820 store i32 1, i32* %r, align 4 821 br label %ret 822fa: 823 store i32 0, i32* %r, align 4 824 br label %ret 825ret: 826 %0 = load i32, i32* %r, align 4 827 ret i32 %0 828} 829 830define i32 @test_dcmpule(double %a, double %b) { 831; CHECK-LABEL: test_dcmpule: 832; CHECK: # %bb.0: # %entry 833; CHECK-NEXT: stwu 1, -16(1) 834; CHECK-NEXT: .cfi_def_cfa_offset 16 835; CHECK-NEXT: evmergelo 5, 5, 6 836; CHECK-NEXT: evmergelo 3, 3, 4 837; CHECK-NEXT: efdcmpgt 0, 3, 5 838; CHECK-NEXT: bgt 0, .LBB40_2 839; CHECK-NEXT: # %bb.1: # %tr 840; CHECK-NEXT: li 3, 1 841; CHECK-NEXT: b .LBB40_3 842; CHECK-NEXT: .LBB40_2: # %fa 843; CHECK-NEXT: li 3, 0 844; CHECK-NEXT: .LBB40_3: # %ret 845; CHECK-NEXT: stw 3, 12(1) 846; CHECK-NEXT: lwz 3, 12(1) 847; CHECK-NEXT: addi 1, 1, 16 848; CHECK-NEXT: blr 849 entry: 850 %r = alloca i32, align 4 851 %c = fcmp ule double %a, %b 852 br i1 %c, label %tr, label %fa 853tr: 854 store i32 1, i32* %r, align 4 855 br label %ret 856fa: 857 store i32 0, i32* %r, align 4 858 br label %ret 859ret: 860 %0 = load i32, i32* %r, align 4 861 ret i32 %0 862} 863 864; The type of comparison found in C's if (x == y) 865define i32 @test_dcmpeq(double %a, double %b) { 866; CHECK-LABEL: test_dcmpeq: 867; CHECK: # %bb.0: # %entry 868; CHECK-NEXT: stwu 1, -16(1) 869; CHECK-NEXT: .cfi_def_cfa_offset 16 870; CHECK-NEXT: evmergelo 5, 5, 6 871; CHECK-NEXT: evmergelo 3, 3, 4 872; CHECK-NEXT: efdcmpeq 0, 3, 5 873; CHECK-NEXT: ble 0, .LBB41_2 874; CHECK-NEXT: # %bb.1: # %tr 875; CHECK-NEXT: li 3, 1 876; CHECK-NEXT: b .LBB41_3 877; CHECK-NEXT: .LBB41_2: # %fa 878; CHECK-NEXT: li 3, 0 879; CHECK-NEXT: .LBB41_3: # %ret 880; CHECK-NEXT: stw 3, 12(1) 881; CHECK-NEXT: lwz 3, 12(1) 882; CHECK-NEXT: addi 1, 1, 16 883; CHECK-NEXT: blr 884 entry: 885 %r = alloca i32, align 4 886 %c = fcmp oeq double %a, %b 887 br i1 %c, label %tr, label %fa 888tr: 889 store i32 1, i32* %r, align 4 890 br label %ret 891fa: 892 store i32 0, i32* %r, align 4 893 br label %ret 894ret: 895 %0 = load i32, i32* %r, align 4 896 ret i32 %0 897} 898 899define i32 @test_dcmpueq(double %a, double %b) { 900; CHECK-LABEL: test_dcmpueq: 901; CHECK: # %bb.0: # %entry 902; CHECK-NEXT: stwu 1, -16(1) 903; CHECK-NEXT: .cfi_def_cfa_offset 16 904; CHECK-NEXT: evmergelo 3, 3, 4 905; CHECK-NEXT: evmergelo 4, 5, 6 906; CHECK-NEXT: efdcmpeq 0, 4, 4 907; CHECK-NEXT: bc 4, 1, .LBB42_4 908; CHECK-NEXT: # %bb.1: # %entry 909; CHECK-NEXT: efdcmpeq 0, 3, 3 910; CHECK-NEXT: bc 4, 1, .LBB42_4 911; CHECK-NEXT: # %bb.2: # %entry 912; CHECK-NEXT: efdcmpeq 0, 3, 4 913; CHECK-NEXT: bc 12, 1, .LBB42_4 914; CHECK-NEXT: # %bb.3: # %fa 915; CHECK-NEXT: li 3, 0 916; CHECK-NEXT: b .LBB42_5 917; CHECK-NEXT: .LBB42_4: # %tr 918; CHECK-NEXT: li 3, 1 919; CHECK-NEXT: .LBB42_5: # %ret 920; CHECK-NEXT: stw 3, 12(1) 921; CHECK-NEXT: lwz 3, 12(1) 922; CHECK-NEXT: addi 1, 1, 16 923; CHECK-NEXT: blr 924 entry: 925 %r = alloca i32, align 4 926 %c = fcmp ueq double %a, %b 927 br i1 %c, label %tr, label %fa 928tr: 929 store i32 1, i32* %r, align 4 930 br label %ret 931fa: 932 store i32 0, i32* %r, align 4 933 br label %ret 934ret: 935 %0 = load i32, i32* %r, align 4 936 ret i32 %0 937} 938 939define i1 @test_dcmpne(double %a, double %b) { 940; CHECK-LABEL: test_dcmpne: 941; CHECK: # %bb.0: # %entry 942; CHECK-NEXT: evmergelo 3, 3, 4 943; CHECK-NEXT: evmergelo 4, 5, 6 944; CHECK-NEXT: li 7, 1 945; CHECK-NEXT: efdcmpeq 0, 4, 4 946; CHECK-NEXT: efdcmpeq 1, 3, 3 947; CHECK-NEXT: efdcmpeq 5, 3, 4 948; CHECK-NEXT: crand 24, 5, 1 949; CHECK-NEXT: crorc 20, 21, 24 950; CHECK-NEXT: bc 12, 20, .LBB43_2 951; CHECK-NEXT: # %bb.1: # %entry 952; CHECK-NEXT: ori 3, 7, 0 953; CHECK-NEXT: blr 954; CHECK-NEXT: .LBB43_2: # %entry 955; CHECK-NEXT: li 3, 0 956; CHECK-NEXT: blr 957 entry: 958 %r = fcmp one double %a, %b 959 ret i1 %r 960} 961 962define i32 @test_dcmpune(double %a, double %b) { 963; CHECK-LABEL: test_dcmpune: 964; CHECK: # %bb.0: # %entry 965; CHECK-NEXT: stwu 1, -16(1) 966; CHECK-NEXT: .cfi_def_cfa_offset 16 967; CHECK-NEXT: evmergelo 5, 5, 6 968; CHECK-NEXT: evmergelo 3, 3, 4 969; CHECK-NEXT: efdcmpeq 0, 3, 5 970; CHECK-NEXT: bgt 0, .LBB44_2 971; CHECK-NEXT: # %bb.1: # %tr 972; CHECK-NEXT: li 3, 1 973; CHECK-NEXT: b .LBB44_3 974; CHECK-NEXT: .LBB44_2: # %fa 975; CHECK-NEXT: li 3, 0 976; CHECK-NEXT: .LBB44_3: # %ret 977; CHECK-NEXT: stw 3, 12(1) 978; CHECK-NEXT: lwz 3, 12(1) 979; CHECK-NEXT: addi 1, 1, 16 980; CHECK-NEXT: blr 981 entry: 982 %r = alloca i32, align 4 983 %c = fcmp une double %a, %b 984 br i1 %c, label %tr, label %fa 985tr: 986 store i32 1, i32* %r, align 4 987 br label %ret 988fa: 989 store i32 0, i32* %r, align 4 990 br label %ret 991ret: 992 %0 = load i32, i32* %r, align 4 993 ret i32 %0 994} 995 996define i32 @test_dcmplt(double %a, double %b) { 997; CHECK-LABEL: test_dcmplt: 998; CHECK: # %bb.0: # %entry 999; CHECK-NEXT: stwu 1, -16(1) 1000; CHECK-NEXT: .cfi_def_cfa_offset 16 1001; CHECK-NEXT: evmergelo 5, 5, 6 1002; CHECK-NEXT: evmergelo 3, 3, 4 1003; CHECK-NEXT: efdcmplt 0, 3, 5 1004; CHECK-NEXT: ble 0, .LBB45_2 1005; CHECK-NEXT: # %bb.1: # %tr 1006; CHECK-NEXT: li 3, 1 1007; CHECK-NEXT: b .LBB45_3 1008; CHECK-NEXT: .LBB45_2: # %fa 1009; CHECK-NEXT: li 3, 0 1010; CHECK-NEXT: .LBB45_3: # %ret 1011; CHECK-NEXT: stw 3, 12(1) 1012; CHECK-NEXT: lwz 3, 12(1) 1013; CHECK-NEXT: addi 1, 1, 16 1014; CHECK-NEXT: blr 1015 entry: 1016 %r = alloca i32, align 4 1017 %c = fcmp olt double %a, %b 1018 br i1 %c, label %tr, label %fa 1019tr: 1020 store i32 1, i32* %r, align 4 1021 br label %ret 1022fa: 1023 store i32 0, i32* %r, align 4 1024 br label %ret 1025ret: 1026 %0 = load i32, i32* %r, align 4 1027 ret i32 %0 1028} 1029 1030define i32 @test_dcmpult(double %a, double %b) { 1031; CHECK-LABEL: test_dcmpult: 1032; CHECK: # %bb.0: # %entry 1033; CHECK-NEXT: stwu 1, -16(1) 1034; CHECK-NEXT: .cfi_def_cfa_offset 16 1035; CHECK-NEXT: evmergelo 3, 3, 4 1036; CHECK-NEXT: evmergelo 4, 5, 6 1037; CHECK-NEXT: efdcmpeq 0, 4, 4 1038; CHECK-NEXT: bc 4, 1, .LBB46_4 1039; CHECK-NEXT: # %bb.1: # %entry 1040; CHECK-NEXT: efdcmpeq 0, 3, 3 1041; CHECK-NEXT: bc 4, 1, .LBB46_4 1042; CHECK-NEXT: # %bb.2: # %entry 1043; CHECK-NEXT: efdcmplt 0, 3, 4 1044; CHECK-NEXT: bc 12, 1, .LBB46_4 1045; CHECK-NEXT: # %bb.3: # %fa 1046; CHECK-NEXT: li 3, 0 1047; CHECK-NEXT: b .LBB46_5 1048; CHECK-NEXT: .LBB46_4: # %tr 1049; CHECK-NEXT: li 3, 1 1050; CHECK-NEXT: .LBB46_5: # %ret 1051; CHECK-NEXT: stw 3, 12(1) 1052; CHECK-NEXT: lwz 3, 12(1) 1053; CHECK-NEXT: addi 1, 1, 16 1054; CHECK-NEXT: blr 1055 entry: 1056 %r = alloca i32, align 4 1057 %c = fcmp ult double %a, %b 1058 br i1 %c, label %tr, label %fa 1059tr: 1060 store i32 1, i32* %r, align 4 1061 br label %ret 1062fa: 1063 store i32 0, i32* %r, align 4 1064 br label %ret 1065ret: 1066 %0 = load i32, i32* %r, align 4 1067 ret i32 %0 1068} 1069 1070define i1 @test_dcmpge(double %a, double %b) { 1071; CHECK-LABEL: test_dcmpge: 1072; CHECK: # %bb.0: # %entry 1073; CHECK-NEXT: evmergelo 3, 3, 4 1074; CHECK-NEXT: evmergelo 4, 5, 6 1075; CHECK-NEXT: li 7, 1 1076; CHECK-NEXT: efdcmpeq 0, 4, 4 1077; CHECK-NEXT: efdcmpeq 1, 3, 3 1078; CHECK-NEXT: efdcmplt 5, 3, 4 1079; CHECK-NEXT: crand 24, 5, 1 1080; CHECK-NEXT: crorc 20, 21, 24 1081; CHECK-NEXT: bc 12, 20, .LBB47_2 1082; CHECK-NEXT: # %bb.1: # %entry 1083; CHECK-NEXT: ori 3, 7, 0 1084; CHECK-NEXT: blr 1085; CHECK-NEXT: .LBB47_2: # %entry 1086; CHECK-NEXT: li 3, 0 1087; CHECK-NEXT: blr 1088 entry: 1089 %r = fcmp oge double %a, %b 1090 ret i1 %r 1091} 1092 1093define i32 @test_dcmpuge(double %a, double %b) { 1094; CHECK-LABEL: test_dcmpuge: 1095; CHECK: # %bb.0: # %entry 1096; CHECK-NEXT: stwu 1, -16(1) 1097; CHECK-NEXT: .cfi_def_cfa_offset 16 1098; CHECK-NEXT: evmergelo 5, 5, 6 1099; CHECK-NEXT: evmergelo 3, 3, 4 1100; CHECK-NEXT: efdcmplt 0, 3, 5 1101; CHECK-NEXT: bgt 0, .LBB48_2 1102; CHECK-NEXT: # %bb.1: # %tr 1103; CHECK-NEXT: li 3, 1 1104; CHECK-NEXT: b .LBB48_3 1105; CHECK-NEXT: .LBB48_2: # %fa 1106; CHECK-NEXT: li 3, 0 1107; CHECK-NEXT: .LBB48_3: # %ret 1108; CHECK-NEXT: stw 3, 12(1) 1109; CHECK-NEXT: lwz 3, 12(1) 1110; CHECK-NEXT: addi 1, 1, 16 1111; CHECK-NEXT: blr 1112 entry: 1113 %r = alloca i32, align 4 1114 %c = fcmp uge double %a, %b 1115 br i1 %c, label %tr, label %fa 1116tr: 1117 store i32 1, i32* %r, align 4 1118 br label %ret 1119fa: 1120 store i32 0, i32* %r, align 4 1121 br label %ret 1122ret: 1123 %0 = load i32, i32* %r, align 4 1124 ret i32 %0 1125} 1126 1127define double @test_dselect(double %a, double %b, i1 %c) { 1128; CHECK-LABEL: test_dselect: 1129; CHECK: # %bb.0: # %entry 1130; CHECK-NEXT: andi. 7, 7, 1 1131; CHECK-NEXT: evmergelo 5, 5, 6 1132; CHECK-NEXT: evmergelo 4, 3, 4 1133; CHECK-NEXT: bc 12, 1, .LBB49_2 1134; CHECK-NEXT: # %bb.1: # %entry 1135; CHECK-NEXT: evor 4, 5, 5 1136; CHECK-NEXT: .LBB49_2: # %entry 1137; CHECK-NEXT: evmergehi 3, 4, 4 1138; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1139; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1140; CHECK-NEXT: blr 1141entry: 1142 %r = select i1 %c, double %a, double %b 1143 ret double %r 1144} 1145 1146define i32 @test_dtoui(double %a) { 1147; CHECK-LABEL: test_dtoui: 1148; CHECK: # %bb.0: # %entry 1149; CHECK-NEXT: evmergelo 3, 3, 4 1150; CHECK-NEXT: efdctuiz 3, 3 1151; CHECK-NEXT: blr 1152entry: 1153 %v = fptoui double %a to i32 1154 ret i32 %v 1155} 1156 1157define i32 @test_dtosi(double %a) { 1158; CHECK-LABEL: test_dtosi: 1159; CHECK: # %bb.0: # %entry 1160; CHECK-NEXT: evmergelo 3, 3, 4 1161; CHECK-NEXT: efdctsiz 3, 3 1162; CHECK-NEXT: blr 1163entry: 1164 %v = fptosi double %a to i32 1165 ret i32 %v 1166} 1167 1168define double @test_dfromui(i32 %a) { 1169; CHECK-LABEL: test_dfromui: 1170; CHECK: # %bb.0: # %entry 1171; CHECK-NEXT: efdcfui 4, 3 1172; CHECK-NEXT: evmergehi 3, 4, 4 1173; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1174; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1175; CHECK-NEXT: blr 1176entry: 1177 %v = uitofp i32 %a to double 1178 ret double %v 1179} 1180 1181define double @test_dfromsi(i32 %a) { 1182; CHECK-LABEL: test_dfromsi: 1183; CHECK: # %bb.0: # %entry 1184; CHECK-NEXT: efdcfsi 4, 3 1185; CHECK-NEXT: evmergehi 3, 4, 4 1186; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1187; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1188; CHECK-NEXT: blr 1189entry: 1190 %v = sitofp i32 %a to double 1191 ret double %v 1192} 1193 1194define i32 @test_dasmconst(double %x) { 1195; CHECK-LABEL: test_dasmconst: 1196; CHECK: # %bb.0: # %entry 1197; CHECK-NEXT: stwu 1, -16(1) 1198; CHECK-NEXT: .cfi_def_cfa_offset 16 1199; CHECK-NEXT: evmergelo 3, 3, 4 1200; CHECK-NEXT: evstdd 3, 8(1) 1201; CHECK-NEXT: #APP 1202; CHECK-NEXT: efdctsi 3, 3 1203; CHECK-NEXT: #NO_APP 1204; CHECK-NEXT: addi 1, 1, 16 1205; CHECK-NEXT: blr 1206entry: 1207 %x.addr = alloca double, align 8 1208 store double %x, double* %x.addr, align 8 1209 %0 = load double, double* %x.addr, align 8 1210 %1 = call i32 asm sideeffect "efdctsi $0, $1", "=d,d"(double %0) 1211 ret i32 %1 1212} 1213 1214declare double @test_spill_spe_regs(double, double); 1215define dso_local void @test_func2() #0 { 1216; CHECK-LABEL: test_func2: 1217; CHECK: # %bb.0: # %entry 1218; CHECK-NEXT: blr 1219entry: 1220 ret void 1221} 1222 1223declare void @test_memset(i8* nocapture writeonly, i8, i32, i1) 1224@global_var1 = global i32 0, align 4 1225define double @test_spill(double %a, i32 %a1, i64 %a2, i8 * %a3, i32 *%a4, i32* %a5) nounwind { 1226; CHECK-LABEL: test_spill: 1227; CHECK: # %bb.0: # %entry 1228; CHECK-NEXT: mflr 0 1229; CHECK-NEXT: stw 0, 4(1) 1230; CHECK-NEXT: stwu 1, -352(1) 1231; CHECK-NEXT: li 5, 256 1232; CHECK-NEXT: evstddx 30, 1, 5 # 8-byte Folded Spill 1233; CHECK-NEXT: li 5, 264 1234; CHECK-NEXT: evstddx 31, 1, 5 # 8-byte Folded Spill 1235; CHECK-NEXT: li 5, .LCPI56_0@l 1236; CHECK-NEXT: lis 6, .LCPI56_0@ha 1237; CHECK-NEXT: evlddx 5, 6, 5 1238; CHECK-NEXT: stw 14, 280(1) # 4-byte Folded Spill 1239; CHECK-NEXT: stw 15, 284(1) # 4-byte Folded Spill 1240; CHECK-NEXT: stw 16, 288(1) # 4-byte Folded Spill 1241; CHECK-NEXT: stw 17, 292(1) # 4-byte Folded Spill 1242; CHECK-NEXT: stw 18, 296(1) # 4-byte Folded Spill 1243; CHECK-NEXT: stw 19, 300(1) # 4-byte Folded Spill 1244; CHECK-NEXT: stw 20, 304(1) # 4-byte Folded Spill 1245; CHECK-NEXT: stw 21, 308(1) # 4-byte Folded Spill 1246; CHECK-NEXT: stw 22, 312(1) # 4-byte Folded Spill 1247; CHECK-NEXT: stw 23, 316(1) # 4-byte Folded Spill 1248; CHECK-NEXT: stw 24, 320(1) # 4-byte Folded Spill 1249; CHECK-NEXT: stw 25, 324(1) # 4-byte Folded Spill 1250; CHECK-NEXT: stw 26, 328(1) # 4-byte Folded Spill 1251; CHECK-NEXT: stw 27, 332(1) # 4-byte Folded Spill 1252; CHECK-NEXT: stw 28, 336(1) # 4-byte Folded Spill 1253; CHECK-NEXT: stw 29, 340(1) # 4-byte Folded Spill 1254; CHECK-NEXT: stw 30, 344(1) # 4-byte Folded Spill 1255; CHECK-NEXT: stw 31, 348(1) # 4-byte Folded Spill 1256; CHECK-NEXT: evstdd 14, 128(1) # 8-byte Folded Spill 1257; CHECK-NEXT: evstdd 15, 136(1) # 8-byte Folded Spill 1258; CHECK-NEXT: evstdd 16, 144(1) # 8-byte Folded Spill 1259; CHECK-NEXT: evstdd 17, 152(1) # 8-byte Folded Spill 1260; CHECK-NEXT: evstdd 18, 160(1) # 8-byte Folded Spill 1261; CHECK-NEXT: evstdd 19, 168(1) # 8-byte Folded Spill 1262; CHECK-NEXT: evstdd 20, 176(1) # 8-byte Folded Spill 1263; CHECK-NEXT: evstdd 21, 184(1) # 8-byte Folded Spill 1264; CHECK-NEXT: evstdd 22, 192(1) # 8-byte Folded Spill 1265; CHECK-NEXT: evstdd 23, 200(1) # 8-byte Folded Spill 1266; CHECK-NEXT: evstdd 24, 208(1) # 8-byte Folded Spill 1267; CHECK-NEXT: evstdd 25, 216(1) # 8-byte Folded Spill 1268; CHECK-NEXT: evstdd 26, 224(1) # 8-byte Folded Spill 1269; CHECK-NEXT: evstdd 27, 232(1) # 8-byte Folded Spill 1270; CHECK-NEXT: evstdd 28, 240(1) # 8-byte Folded Spill 1271; CHECK-NEXT: evstdd 29, 248(1) # 8-byte Folded Spill 1272; CHECK-NEXT: evmergelo 3, 3, 4 1273; CHECK-NEXT: lwz 4, 360(1) 1274; CHECK-NEXT: efdadd 3, 3, 3 1275; CHECK-NEXT: efdadd 3, 3, 5 1276; CHECK-NEXT: evstdd 3, 24(1) # 8-byte Folded Spill 1277; CHECK-NEXT: stw 4, 20(1) # 4-byte Folded Spill 1278; CHECK-NEXT: #APP 1279; CHECK-NEXT: #NO_APP 1280; CHECK-NEXT: addi 3, 1, 76 1281; CHECK-NEXT: li 4, 0 1282; CHECK-NEXT: li 5, 24 1283; CHECK-NEXT: li 6, 1 1284; CHECK-NEXT: li 30, 0 1285; CHECK-NEXT: bl test_memset 1286; CHECK-NEXT: lwz 3, 20(1) # 4-byte Folded Reload 1287; CHECK-NEXT: stw 30, 0(3) 1288; CHECK-NEXT: bl test_func2 1289; CHECK-NEXT: addi 3, 1, 32 1290; CHECK-NEXT: li 4, 0 1291; CHECK-NEXT: li 5, 20 1292; CHECK-NEXT: li 6, 1 1293; CHECK-NEXT: bl test_memset 1294; CHECK-NEXT: evldd 4, 24(1) # 8-byte Folded Reload 1295; CHECK-NEXT: li 5, 264 1296; CHECK-NEXT: evmergehi 3, 4, 4 1297; CHECK-NEXT: evlddx 31, 1, 5 # 8-byte Folded Reload 1298; CHECK-NEXT: li 5, 256 1299; CHECK-NEXT: evlddx 30, 1, 5 # 8-byte Folded Reload 1300; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1301; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1302; CHECK-NEXT: evldd 29, 248(1) # 8-byte Folded Reload 1303; CHECK-NEXT: evldd 28, 240(1) # 8-byte Folded Reload 1304; CHECK-NEXT: evldd 27, 232(1) # 8-byte Folded Reload 1305; CHECK-NEXT: evldd 26, 224(1) # 8-byte Folded Reload 1306; CHECK-NEXT: evldd 25, 216(1) # 8-byte Folded Reload 1307; CHECK-NEXT: evldd 24, 208(1) # 8-byte Folded Reload 1308; CHECK-NEXT: evldd 23, 200(1) # 8-byte Folded Reload 1309; CHECK-NEXT: evldd 22, 192(1) # 8-byte Folded Reload 1310; CHECK-NEXT: evldd 21, 184(1) # 8-byte Folded Reload 1311; CHECK-NEXT: evldd 20, 176(1) # 8-byte Folded Reload 1312; CHECK-NEXT: evldd 19, 168(1) # 8-byte Folded Reload 1313; CHECK-NEXT: evldd 18, 160(1) # 8-byte Folded Reload 1314; CHECK-NEXT: evldd 17, 152(1) # 8-byte Folded Reload 1315; CHECK-NEXT: evldd 16, 144(1) # 8-byte Folded Reload 1316; CHECK-NEXT: evldd 15, 136(1) # 8-byte Folded Reload 1317; CHECK-NEXT: evldd 14, 128(1) # 8-byte Folded Reload 1318; CHECK-NEXT: lwz 31, 348(1) # 4-byte Folded Reload 1319; CHECK-NEXT: lwz 30, 344(1) # 4-byte Folded Reload 1320; CHECK-NEXT: lwz 29, 340(1) # 4-byte Folded Reload 1321; CHECK-NEXT: lwz 28, 336(1) # 4-byte Folded Reload 1322; CHECK-NEXT: lwz 27, 332(1) # 4-byte Folded Reload 1323; CHECK-NEXT: lwz 26, 328(1) # 4-byte Folded Reload 1324; CHECK-NEXT: lwz 25, 324(1) # 4-byte Folded Reload 1325; CHECK-NEXT: lwz 24, 320(1) # 4-byte Folded Reload 1326; CHECK-NEXT: lwz 23, 316(1) # 4-byte Folded Reload 1327; CHECK-NEXT: lwz 22, 312(1) # 4-byte Folded Reload 1328; CHECK-NEXT: lwz 21, 308(1) # 4-byte Folded Reload 1329; CHECK-NEXT: lwz 20, 304(1) # 4-byte Folded Reload 1330; CHECK-NEXT: lwz 19, 300(1) # 4-byte Folded Reload 1331; CHECK-NEXT: lwz 18, 296(1) # 4-byte Folded Reload 1332; CHECK-NEXT: lwz 17, 292(1) # 4-byte Folded Reload 1333; CHECK-NEXT: lwz 16, 288(1) # 4-byte Folded Reload 1334; CHECK-NEXT: lwz 15, 284(1) # 4-byte Folded Reload 1335; CHECK-NEXT: lwz 14, 280(1) # 4-byte Folded Reload 1336; CHECK-NEXT: lwz 0, 356(1) 1337; CHECK-NEXT: addi 1, 1, 352 1338; CHECK-NEXT: mtlr 0 1339; CHECK-NEXT: blr 1340entry: 1341 %v1 = alloca [13 x i32], align 4 1342 %v2 = alloca [11 x i32], align 4 1343 %0 = fadd double %a, %a 1344 call void asm sideeffect "","~{s0},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind 1345 %1 = fadd double %0, 3.14159 1346 %2 = bitcast [13 x i32]* %v1 to i8* 1347 call void @test_memset(i8* align 4 %2, i8 0, i32 24, i1 true) 1348 store i32 0, i32* %a5, align 4 1349 call void @test_func2() 1350 %3 = bitcast [11 x i32]* %v2 to i8* 1351 call void @test_memset(i8* align 4 %3, i8 0, i32 20, i1 true) 1352 br label %return 1353 1354return: 1355 ret double %1 1356 1357} 1358 1359define dso_local float @test_fma(i32 %d) local_unnamed_addr #0 { 1360; CHECK-LABEL: test_fma: 1361; CHECK: # %bb.0: # %entry 1362; CHECK-NEXT: mflr 0 1363; CHECK-NEXT: stw 0, 4(1) 1364; CHECK-NEXT: stwu 1, -48(1) 1365; CHECK-NEXT: .cfi_def_cfa_offset 48 1366; CHECK-NEXT: .cfi_offset lr, 4 1367; CHECK-NEXT: .cfi_offset r29, -12 1368; CHECK-NEXT: .cfi_offset r30, -8 1369; CHECK-NEXT: .cfi_offset r29, -40 1370; CHECK-NEXT: .cfi_offset r30, -32 1371; CHECK-NEXT: cmpwi 3, 1 1372; CHECK-NEXT: stw 29, 36(1) # 4-byte Folded Spill 1373; CHECK-NEXT: stw 30, 40(1) # 4-byte Folded Spill 1374; CHECK-NEXT: evstdd 29, 8(1) # 8-byte Folded Spill 1375; CHECK-NEXT: evstdd 30, 16(1) # 8-byte Folded Spill 1376; CHECK-NEXT: blt 0, .LBB57_3 1377; CHECK-NEXT: # %bb.1: # %for.body.preheader 1378; CHECK-NEXT: mr 30, 3 1379; CHECK-NEXT: li 29, 0 1380; CHECK-NEXT: # implicit-def: $r5 1381; CHECK-NEXT: .LBB57_2: # %for.body 1382; CHECK-NEXT: # 1383; CHECK-NEXT: efscfsi 3, 29 1384; CHECK-NEXT: mr 4, 3 1385; CHECK-NEXT: bl fmaf 1386; CHECK-NEXT: addi 29, 29, 1 1387; CHECK-NEXT: cmplw 30, 29 1388; CHECK-NEXT: mr 5, 3 1389; CHECK-NEXT: bne 0, .LBB57_2 1390; CHECK-NEXT: b .LBB57_4 1391; CHECK-NEXT: .LBB57_3: 1392; CHECK-NEXT: # implicit-def: $r5 1393; CHECK-NEXT: .LBB57_4: # %for.cond.cleanup 1394; CHECK-NEXT: evldd 30, 16(1) # 8-byte Folded Reload 1395; CHECK-NEXT: mr 3, 5 1396; CHECK-NEXT: evldd 29, 8(1) # 8-byte Folded Reload 1397; CHECK-NEXT: lwz 30, 40(1) # 4-byte Folded Reload 1398; CHECK-NEXT: lwz 29, 36(1) # 4-byte Folded Reload 1399; CHECK-NEXT: lwz 0, 52(1) 1400; CHECK-NEXT: addi 1, 1, 48 1401; CHECK-NEXT: mtlr 0 1402; CHECK-NEXT: blr 1403entry: 1404 %cmp8 = icmp sgt i32 %d, 0 1405 br i1 %cmp8, label %for.body, label %for.cond.cleanup 1406 1407for.cond.cleanup: ; preds = %for.body, %entry 1408 %e.0.lcssa = phi float [ undef, %entry ], [ %0, %for.body ] 1409 ret float %e.0.lcssa 1410 1411for.body: ; preds = %for.body, %entry 1412 %f.010 = phi i32 [ %inc, %for.body ], [ 0, %entry ] 1413 %e.09 = phi float [ %0, %for.body ], [ undef, %entry ] 1414 %conv = sitofp i32 %f.010 to float 1415 %0 = tail call float @llvm.fma.f32(float %conv, float %conv, float %e.09) 1416 %inc = add nuw nsw i32 %f.010, 1 1417 %exitcond = icmp eq i32 %inc, %d 1418 br i1 %exitcond, label %for.cond.cleanup, label %for.body 1419} 1420 1421; Function Attrs: nounwind readnone speculatable willreturn 1422declare float @llvm.fma.f32(float, float, float) #1 1423 1424attributes #1 = { nounwind readnone speculatable willreturn } 1425 1426%struct.a = type { float, float } 1427 1428define void @d(%struct.a* %e, %struct.a* %f) { 1429; CHECK-LABEL: d: 1430; CHECK: # %bb.0: # %entry 1431; CHECK-NEXT: mflr 0 1432; CHECK-NEXT: stw 0, 4(1) 1433; CHECK-NEXT: stwu 1, -48(1) 1434; CHECK-NEXT: .cfi_def_cfa_offset 48 1435; CHECK-NEXT: .cfi_offset lr, 4 1436; CHECK-NEXT: .cfi_offset r29, -12 1437; CHECK-NEXT: .cfi_offset r30, -8 1438; CHECK-NEXT: .cfi_offset r29, -40 1439; CHECK-NEXT: .cfi_offset r30, -32 1440; CHECK-NEXT: lwz 4, 0(4) 1441; CHECK-NEXT: lwz 3, 0(3) 1442; CHECK-NEXT: stw 29, 36(1) # 4-byte Folded Spill 1443; CHECK-NEXT: evstdd 29, 8(1) # 8-byte Folded Spill 1444; CHECK-NEXT: efdcfs 29, 4 1445; CHECK-NEXT: stw 30, 40(1) # 4-byte Folded Spill 1446; CHECK-NEXT: mr 4, 29 1447; CHECK-NEXT: evstdd 30, 16(1) # 8-byte Folded Spill 1448; CHECK-NEXT: efdcfs 30, 3 1449; CHECK-NEXT: evmergehi 3, 29, 29 1450; CHECK-NEXT: mtctr 3 1451; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1452; CHECK-NEXT: bctrl 1453; CHECK-NEXT: evmergehi 3, 30, 30 1454; CHECK-NEXT: mr 4, 30 1455; CHECK-NEXT: mtctr 3 1456; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1457; CHECK-NEXT: bctrl 1458; CHECK-NEXT: li 3, .LCPI58_0@l 1459; CHECK-NEXT: lis 4, .LCPI58_0@ha 1460; CHECK-NEXT: evlddx 3, 4, 3 1461; CHECK-NEXT: evldd 30, 16(1) # 8-byte Folded Reload 1462; CHECK-NEXT: efdmul 3, 29, 3 1463; CHECK-NEXT: evldd 29, 8(1) # 8-byte Folded Reload 1464; CHECK-NEXT: efscfd 3, 3 1465; CHECK-NEXT: stw 3, 0(3) 1466; CHECK-NEXT: lwz 30, 40(1) # 4-byte Folded Reload 1467; CHECK-NEXT: lwz 29, 36(1) # 4-byte Folded Reload 1468; CHECK-NEXT: lwz 0, 52(1) 1469; CHECK-NEXT: addi 1, 1, 48 1470; CHECK-NEXT: mtlr 0 1471; CHECK-NEXT: blr 1472entry: 1473 %0 = getelementptr %struct.a, %struct.a* %f, i32 0, i32 0 1474 %1 = load float, float* undef 1475 %conv = fpext float %1 to double 1476 %2 = load float, float* %0 1477 %g = fpext float %2 to double 1478 %3 = call i32 undef(double %g) 1479 %h = call i32 undef(double %conv) 1480 %n = sitofp i32 %3 to double 1481 %k = fmul double %g, %n 1482 %l = fptrunc double %k to float 1483 store float %l, float* undef 1484 ret void 1485} 1486