1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = local_unnamed_addr global i32 0, align 4 10 11; Function Attrs: norecurse nounwind readnone 12define signext i32 @test_igtsi(i32 signext %a, i32 signext %b) { 13; CHECK-LABEL: test_igtsi: 14; CHECK: # %bb.0: # %entry 15; CHECK-NEXT: sub r3, r4, r3 16; CHECK-NEXT: rldicl r3, r3, 1, 63 17; CHECK-NEXT: blr 18entry: 19 %cmp = icmp sgt i32 %a, %b 20 %conv = zext i1 %cmp to i32 21 ret i32 %conv 22} 23 24; Function Attrs: norecurse nounwind readnone 25define signext i32 @test_igtsi_sext(i32 signext %a, i32 signext %b) { 26; CHECK-LABEL: test_igtsi_sext: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: sub r3, r4, r3 29; CHECK-NEXT: sradi r3, r3, 63 30; CHECK-NEXT: blr 31entry: 32 %cmp = icmp sgt i32 %a, %b 33 %sub = sext i1 %cmp to i32 34 ret i32 %sub 35} 36 37; FIXME 38; Function Attrs: norecurse nounwind readnone 39define signext i32 @test_igtsi_z(i32 signext %a) { 40; CHECK-LABEL: test_igtsi_z: 41; CHECK: # %bb.0: # %entry 42; CHECK-NEXT: neg r3, r3 43; CHECK-NEXT: rldicl r3, r3, 1, 63 44; CHECK-NEXT: blr 45entry: 46 %cmp = icmp sgt i32 %a, 0 47 %conv = zext i1 %cmp to i32 48 ret i32 %conv 49} 50 51; Function Attrs: norecurse nounwind readnone 52define signext i32 @test_igtsi_sext_z(i32 signext %a) { 53; CHECK-LABEL: test_igtsi_sext_z: 54; CHECK: # %bb.0: # %entry 55; CHECK-NEXT: neg r3, r3 56; CHECK-NEXT: sradi r3, r3, 63 57; CHECK-NEXT: blr 58entry: 59 %cmp = icmp sgt i32 %a, 0 60 %sub = sext i1 %cmp to i32 61 ret i32 %sub 62} 63 64; Function Attrs: norecurse nounwind 65define void @test_igtsi_store(i32 signext %a, i32 signext %b) { 66; CHECK-LABEL: test_igtsi_store: 67; CHECK: # %bb.0: # %entry 68; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 69; CHECK-NEXT: sub r3, r4, r3 70; CHECK-NEXT: ld r5, .LC0@toc@l(r5) 71; CHECK-NEXT: rldicl r3, r3, 1, 63 72; CHECK-NEXT: stw r3, 0(r5) 73; CHECK-NEXT: blr 74entry: 75 %cmp = icmp sgt i32 %a, %b 76 %conv = zext i1 %cmp to i32 77 store i32 %conv, i32* @glob, align 4 78 ret void 79} 80 81; Function Attrs: norecurse nounwind 82define void @test_igtsi_sext_store(i32 signext %a, i32 signext %b) { 83; CHECK-LABEL: test_igtsi_sext_store: 84; CHECK: # %bb.0: # %entry 85; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 86; CHECK-NEXT: sub r3, r4, r3 87; CHECK-NEXT: ld r5, .LC0@toc@l(r5) 88; CHECK-NEXT: sradi r3, r3, 63 89; CHECK-NEXT: stw r3, 0(r5) 90; CHECK-NEXT: blr 91entry: 92 %cmp = icmp sgt i32 %a, %b 93 %sub = sext i1 %cmp to i32 94 store i32 %sub, i32* @glob, align 4 95 ret void 96} 97 98; FIXME 99; Function Attrs: norecurse nounwind 100define void @test_igtsi_z_store(i32 signext %a) { 101; CHECK-LABEL: test_igtsi_z_store: 102; CHECK: # %bb.0: # %entry 103; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 104; CHECK-NEXT: neg r3, r3 105; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 106; CHECK-NEXT: rldicl r3, r3, 1, 63 107; CHECK-NEXT: stw r3, 0(r4) 108; CHECK-NEXT: blr 109entry: 110 %cmp = icmp sgt i32 %a, 0 111 %conv = zext i1 %cmp to i32 112 store i32 %conv, i32* @glob, align 4 113 ret void 114} 115 116; Function Attrs: norecurse nounwind 117define void @test_igtsi_sext_z_store(i32 signext %a) { 118; CHECK-LABEL: test_igtsi_sext_z_store: 119; CHECK: # %bb.0: # %entry 120; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 121; CHECK-NEXT: neg r3, r3 122; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 123; CHECK-NEXT: sradi r3, r3, 63 124; CHECK-NEXT: stw r3, 0(r4) 125; CHECK-NEXT: blr 126entry: 127 %cmp = icmp sgt i32 %a, 0 128 %sub = sext i1 %cmp to i32 129 store i32 %sub, i32* @glob, align 4 130 ret void 131} 132