1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \ 5; RUN: --check-prefixes=CHECK,BE 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 7; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 8; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \ 9; RUN: --check-prefixes=CHECK,LE 10 11@glob = local_unnamed_addr global i16 0, align 2 12 13; Function Attrs: norecurse nounwind readnone 14define signext i32 @test_iltus(i16 zeroext %a, i16 zeroext %b) { 15; CHECK-LABEL: test_iltus: 16; CHECK: # %bb.0: # %entry 17; CHECK-NEXT: sub r3, r3, r4 18; CHECK-NEXT: rldicl r3, r3, 1, 63 19; CHECK-NEXT: blr 20entry: 21 %cmp = icmp ult i16 %a, %b 22 %conv2 = zext i1 %cmp to i32 23 ret i32 %conv2 24} 25 26; Function Attrs: norecurse nounwind readnone 27define signext i32 @test_iltus_sext(i16 zeroext %a, i16 zeroext %b) { 28; CHECK-LABEL: test_iltus_sext: 29; CHECK: # %bb.0: # %entry 30; CHECK-NEXT: sub r3, r3, r4 31; CHECK-NEXT: sradi r3, r3, 63 32; CHECK-NEXT: blr 33entry: 34 %cmp = icmp ult i16 %a, %b 35 %sub = sext i1 %cmp to i32 36 ret i32 %sub 37} 38 39; Function Attrs: norecurse nounwind 40define void @test_iltus_store(i16 zeroext %a, i16 zeroext %b) { 41; BE-LABEL: test_iltus_store: 42; BE: # %bb.0: # %entry 43; BE-NEXT: addis r5, r2, .LC0@toc@ha 44; BE-NEXT: sub r3, r3, r4 45; BE-NEXT: ld r5, .LC0@toc@l(r5) 46; BE-NEXT: rldicl r3, r3, 1, 63 47; BE-NEXT: sth r3, 0(r5) 48; BE-NEXT: blr 49; 50; LE-LABEL: test_iltus_store: 51; LE: # %bb.0: # %entry 52; LE-NEXT: sub r3, r3, r4 53; LE-NEXT: addis r5, r2, glob@toc@ha 54; LE-NEXT: rldicl r3, r3, 1, 63 55; LE-NEXT: sth r3, glob@toc@l(r5) 56; LE-NEXT: blr 57entry: 58 %cmp = icmp ult i16 %a, %b 59 %conv3 = zext i1 %cmp to i16 60 store i16 %conv3, i16* @glob, align 2 61 ret void 62} 63 64; Function Attrs: norecurse nounwind 65define void @test_iltus_sext_store(i16 zeroext %a, i16 zeroext %b) { 66; BE-LABEL: test_iltus_sext_store: 67; BE: # %bb.0: # %entry 68; BE-NEXT: addis r5, r2, .LC0@toc@ha 69; BE-NEXT: sub r3, r3, r4 70; BE-NEXT: ld r5, .LC0@toc@l(r5) 71; BE-NEXT: sradi r3, r3, 63 72; BE-NEXT: sth r3, 0(r5) 73; BE-NEXT: blr 74; 75; LE-LABEL: test_iltus_sext_store: 76; LE: # %bb.0: # %entry 77; LE-NEXT: sub r3, r3, r4 78; LE-NEXT: addis r5, r2, glob@toc@ha 79; LE-NEXT: sradi r3, r3, 63 80; LE-NEXT: sth r3, glob@toc@l(r5) 81; LE-NEXT: blr 82entry: 83 %cmp = icmp ult i16 %a, %b 84 %conv3 = sext i1 %cmp to i16 85 store i16 %conv3, i16* @glob, align 2 86 ret void 87} 88