1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = local_unnamed_addr global i32 0, align 4 10 11define i64 @test_lllesi(i32 signext %a, i32 signext %b) { 12; CHECK-LABEL: test_lllesi: 13; CHECK: # %bb.0: # %entry 14; CHECK-NEXT: sub r3, r4, r3 15; CHECK-NEXT: rldicl r3, r3, 1, 63 16; CHECK-NEXT: xori r3, r3, 1 17; CHECK-NEXT: blr 18; CHECK-BE-LABEL: test_lllesi: 19; CHECK-BE: # %bb.0: # %entry 20; CHECK-BE-NEXT: sub r3, r4, r3 21; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 22; CHECK-BE-NEXT: xori r3, r3, 1 23; CHECK-BE-NEXT: blr 24; 25; CHECK-LE-LABEL: test_lllesi: 26; CHECK-LE: # %bb.0: # %entry 27; CHECK-LE-NEXT: sub r3, r4, r3 28; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 29; CHECK-LE-NEXT: xori r3, r3, 1 30; CHECK-LE-NEXT: blr 31entry: 32 %cmp = icmp sle i32 %a, %b 33 %conv1 = zext i1 %cmp to i64 34 ret i64 %conv1 35} 36 37define i64 @test_lllesi_sext(i32 signext %a, i32 signext %b) { 38; CHECK-LABEL: test_lllesi_sext: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: sub r3, r4, r3 41; CHECK-NEXT: rldicl r3, r3, 1, 63 42; CHECK-NEXT: addi r3, r3, -1 43; CHECK-NEXT: blr 44; CHECK-BE-LABEL: test_lllesi_sext: 45; CHECK-BE: # %bb.0: # %entry 46; CHECK-BE-NEXT: sub r3, r4, r3 47; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 48; CHECK-BE-NEXT: addi r3, r3, -1 49; CHECK-BE-NEXT: blr 50; 51; CHECK-LE-LABEL: test_lllesi_sext: 52; CHECK-LE: # %bb.0: # %entry 53; CHECK-LE-NEXT: sub r3, r4, r3 54; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 55; CHECK-LE-NEXT: addi r3, r3, -1 56; CHECK-LE-NEXT: blr 57entry: 58 %cmp = icmp sle i32 %a, %b 59 %conv1 = sext i1 %cmp to i64 60 ret i64 %conv1 61} 62 63define void @test_lllesi_store(i32 signext %a, i32 signext %b) { 64; CHECK-LABEL: test_lllesi_store: 65; CHECK: # %bb.0: # %entry 66; CHECK-NEXT: sub r3, r4, r3 67; CHECK-NEXT: addis r5, r2, glob@toc@ha 68; CHECK-NEXT: rldicl r3, r3, 1, 63 69; CHECK-NEXT: xori r3, r3, 1 70; CHECK-NEXT: stw r3, glob@toc@l(r5) 71; CHECK-NEXT: blr 72; CHECK-BE-LABEL: test_lllesi_store: 73; CHECK-BE: # %bb.0: # %entry 74; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha 75; CHECK-BE-NEXT: sub r3, r4, r3 76; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5) 77; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 78; CHECK-BE-NEXT: xori r3, r3, 1 79; CHECK-BE-NEXT: stw r3, 0(r4) 80; CHECK-BE-NEXT: blr 81; 82; CHECK-LE-LABEL: test_lllesi_store: 83; CHECK-LE: # %bb.0: # %entry 84; CHECK-LE-NEXT: sub r3, r4, r3 85; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha 86; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 87; CHECK-LE-NEXT: xori r3, r3, 1 88; CHECK-LE-NEXT: stw r3, glob@toc@l(r5) 89; CHECK-LE-NEXT: blr 90entry: 91 %cmp = icmp sle i32 %a, %b 92 %conv = zext i1 %cmp to i32 93 store i32 %conv, i32* @glob, align 4 94 ret void 95} 96 97define void @test_lllesi_sext_store(i32 signext %a, i32 signext %b) { 98; CHECK-LABEL: test_lllesi_sext_store: 99; CHECK: # %bb.0: # %entry 100; CHECK-NEXT: sub r3, r4, r3 101; CHECK-NEXT: addis r5, r2, glob@toc@ha 102; CHECK-NEXT: rldicl r3, r3, 1, 63 103; CHECK-NEXT: addi r3, r3, -1 104; CHECK-NEXT: stw r3, glob@toc@l(r5) 105; CHECK-NEXT: blr 106; CHECK-BE-LABEL: test_lllesi_sext_store: 107; CHECK-BE: # %bb.0: # %entry 108; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha 109; CHECK-BE-NEXT: sub r3, r4, r3 110; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5) 111; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 112; CHECK-BE-NEXT: addi r3, r3, -1 113; CHECK-BE-NEXT: stw r3, 0(r4) 114; CHECK-BE-NEXT: blr 115; 116; CHECK-LE-LABEL: test_lllesi_sext_store: 117; CHECK-LE: # %bb.0: # %entry 118; CHECK-LE-NEXT: sub r3, r4, r3 119; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha 120; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 121; CHECK-LE-NEXT: addi r3, r3, -1 122; CHECK-LE-NEXT: stw r3, glob@toc@l(r5) 123; CHECK-LE-NEXT: blr 124entry: 125 %cmp = icmp sle i32 %a, %b 126 %sub = sext i1 %cmp to i32 127 store i32 %sub, i32* @glob, align 4 128 ret void 129} 130