1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8@glob = local_unnamed_addr global i64 0, align 8 9 10; Function Attrs: norecurse nounwind readnone 11define i64 @test_lllesll(i64 %a, i64 %b) { 12; CHECK-LABEL: test_lllesll: 13; CHECK: # %bb.0: # %entry 14; CHECK-NEXT: sradi r5, r4, 63 15; CHECK-NEXT: rldicl r6, r3, 1, 63 16; CHECK-NEXT: subfc r3, r3, r4 17; CHECK-NEXT: adde r3, r5, r6 18; CHECK-NEXT: blr 19; CHECK-BE-LABEL: test_lllesll: 20; CHECK-BE: # %bb.0: # %entry 21; CHECK-BE-NEXT: sradi r5, r4, 63 22; CHECK-BE-NEXT: rldicl r6, r3, 1, 63 23; CHECK-BE-NEXT: subc r3, r4, r3 24; CHECK-BE-NEXT: adde r3, r5, r6 25; CHECK-BE-NEXT: blr 26; 27; CHECK-LE-LABEL: test_lllesll: 28; CHECK-LE: # %bb.0: # %entry 29; CHECK-LE-NEXT: sradi r5, r4, 63 30; CHECK-LE-NEXT: rldicl r6, r3, 1, 63 31; CHECK-LE-NEXT: subc r3, r4, r3 32; CHECK-LE-NEXT: adde r3, r5, r6 33; CHECK-LE-NEXT: blr 34entry: 35 %cmp = icmp sle i64 %a, %b 36 %conv1 = zext i1 %cmp to i64 37 ret i64 %conv1 38} 39 40; Function Attrs: norecurse nounwind readnone 41define i64 @test_lllesll_sext(i64 %a, i64 %b) { 42; CHECK-LABEL: test_lllesll_sext: 43; CHECK: # %bb.0: # %entry 44; CHECK-NEXT: sradi r5, r4, 63 45; CHECK-NEXT: rldicl r6, r3, 1, 63 46; CHECK-NEXT: subfc r3, r3, r4 47; CHECK-NEXT: adde r3, r5, r6 48; CHECK-NEXT: neg r3, r3 49; CHECK-NEXT: blr 50; CHECK-BE-LABEL: test_lllesll_sext: 51; CHECK-BE: # %bb.0: # %entry 52; CHECK-BE-NEXT: sradi r5, r4, 63 53; CHECK-BE-NEXT: rldicl r6, r3, 1, 63 54; CHECK-BE-NEXT: subc r3, r4, r3 55; CHECK-BE-NEXT: adde r3, r5, r6 56; CHECK-BE-NEXT: neg r3, r3 57; CHECK-BE-NEXT: blr 58; 59; CHECK-LE-LABEL: test_lllesll_sext: 60; CHECK-LE: # %bb.0: # %entry 61; CHECK-LE-NEXT: sradi r5, r4, 63 62; CHECK-LE-NEXT: rldicl r6, r3, 1, 63 63; CHECK-LE-NEXT: subc r3, r4, r3 64; CHECK-LE-NEXT: adde r3, r5, r6 65; CHECK-LE-NEXT: neg r3, r3 66; CHECK-LE-NEXT: blr 67entry: 68 %cmp = icmp sle i64 %a, %b 69 %conv1 = sext i1 %cmp to i64 70 ret i64 %conv1 71} 72 73; Function Attrs: norecurse nounwind readnone 74define i64 @test_lllesll_z(i64 %a) { 75; CHECK-LABEL: test_lllesll_z: 76; CHECK: # %bb.0: # %entry 77; CHECK-NEXT: addi r4, r3, -1 78; CHECK-NEXT: or r3, r4, r3 79; CHECK-NEXT: rldicl r3, r3, 1, 63 80; CHECK-NEXT: blr 81; CHECK-BE-LABEL: test_lllesll_z: 82; CHECK-BE: # %bb.0: # %entry 83; CHECK-BE-NEXT: addi r4, r3, -1 84; CHECK-BE-NEXT: or r3, r4, r3 85; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 86; CHECK-BE-NEXT: blr 87; 88; CHECK-LE-LABEL: test_lllesll_z: 89; CHECK-LE: # %bb.0: # %entry 90; CHECK-LE-NEXT: addi r4, r3, -1 91; CHECK-LE-NEXT: or r3, r4, r3 92; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 93; CHECK-LE-NEXT: blr 94entry: 95 %cmp = icmp slt i64 %a, 1 96 %conv1 = zext i1 %cmp to i64 97 ret i64 %conv1 98} 99 100; Function Attrs: norecurse nounwind readnone 101define i64 @test_lllesll_sext_z(i64 %a) { 102; CHECK-LABEL: test_lllesll_sext_z: 103; CHECK: # %bb.0: # %entry 104; CHECK-NEXT: addi r4, r3, -1 105; CHECK-NEXT: or r3, r4, r3 106; CHECK-NEXT: sradi r3, r3, 63 107; CHECK-NEXT: blr 108; CHECK-BE-LABEL: test_lllesll_sext_z: 109; CHECK-BE: # %bb.0: # %entry 110; CHECK-BE-NEXT: addi r4, r3, -1 111; CHECK-BE-NEXT: or r3, r4, r3 112; CHECK-BE-NEXT: sradi r3, r3, 63 113; CHECK-BE-NEXT: blr 114; 115; CHECK-LE-LABEL: test_lllesll_sext_z: 116; CHECK-LE: # %bb.0: # %entry 117; CHECK-LE-NEXT: addi r4, r3, -1 118; CHECK-LE-NEXT: or r3, r4, r3 119; CHECK-LE-NEXT: sradi r3, r3, 63 120; CHECK-LE-NEXT: blr 121entry: 122 %cmp = icmp slt i64 %a, 1 123 %conv1 = sext i1 %cmp to i64 124 ret i64 %conv1 125} 126 127; Function Attrs: norecurse nounwind 128define void @test_lllesll_store(i64 %a, i64 %b) { 129; CHECK-LABEL: test_lllesll_store: 130; CHECK: # %bb.0: # %entry 131; CHECK-NEXT: sradi r6, r4, 63 132; CHECK-NEXT: addis r5, r2, glob@toc@ha 133; CHECK-NEXT: subfc r4, r3, r4 134; CHECK-NEXT: rldicl r3, r3, 1, 63 135; CHECK-NEXT: adde r3, r6, r3 136; CHECK-NEXT: std r3, glob@toc@l(r5) 137; CHECK-NEXT: blr 138; CHECK-BE-LABEL: test_lllesll_store: 139; CHECK-BE: # %bb.0: # %entry 140; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha 141; CHECK-BE-NEXT: sradi r6, r4, 63 142; CHECK-BE-NEXT: ld r5, .LC0@toc@l(r5) 143; CHECK-BE-NEXT: subc r4, r4, r3 144; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 145; CHECK-BE-NEXT: adde r3, r6, r3 146; CHECK-BE-NEXT: std r3, 0(r5) 147; CHECK-BE-NEXT: blr 148; 149; CHECK-LE-LABEL: test_lllesll_store: 150; CHECK-LE: # %bb.0: # %entry 151; CHECK-LE-NEXT: sradi r6, r4, 63 152; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha 153; CHECK-LE-NEXT: subc r4, r4, r3 154; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 155; CHECK-LE-NEXT: adde r3, r6, r3 156; CHECK-LE-NEXT: std r3, glob@toc@l(r5) 157; CHECK-LE-NEXT: blr 158entry: 159 %cmp = icmp sle i64 %a, %b 160 %conv1 = zext i1 %cmp to i64 161 store i64 %conv1, i64* @glob, align 8 162 ret void 163} 164 165; Function Attrs: norecurse nounwind 166define void @test_lllesll_sext_store(i64 %a, i64 %b) { 167; CHECK-LABEL: test_lllesll_sext_store: 168; CHECK: # %bb.0: # %entry 169; CHECK-NEXT: sradi r6, r4, 63 170; CHECK-NEXT: addis r5, r2, glob@toc@ha 171; CHECK-NEXT: subfc r4, r3, r4 172; CHECK-NEXT: rldicl r3, r3, 1, 63 173; CHECK-NEXT: adde r3, r6, r3 174; CHECK-NEXT: neg r3, r3 175; CHECK-NEXT: std r3, glob@toc@l(r5) 176; CHECK-NEXT: blr 177; CHECK-BE-LABEL: test_lllesll_sext_store: 178; CHECK-BE: # %bb.0: # %entry 179; CHECK-BE-NEXT: sradi r6, r4, 63 180; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha 181; CHECK-BE-NEXT: subc r4, r4, r3 182; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 183; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5) 184; CHECK-BE-NEXT: adde r3, r6, r3 185; CHECK-BE-NEXT: neg r3, r3 186; CHECK-BE-NEXT: std r3, 0(r4) 187; CHECK-BE-NEXT: blr 188; 189; CHECK-LE-LABEL: test_lllesll_sext_store: 190; CHECK-LE: # %bb.0: # %entry 191; CHECK-LE-NEXT: sradi r6, r4, 63 192; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha 193; CHECK-LE-NEXT: subc r4, r4, r3 194; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 195; CHECK-LE-NEXT: adde r3, r6, r3 196; CHECK-LE-NEXT: neg r3, r3 197; CHECK-LE-NEXT: std r3, glob@toc@l(r5) 198; CHECK-LE-NEXT: blr 199entry: 200 %cmp = icmp sle i64 %a, %b 201 %conv1 = sext i1 %cmp to i64 202 store i64 %conv1, i64* @glob, align 8 203 ret void 204} 205 206; Function Attrs: norecurse nounwind 207define void @test_lllesll_z_store(i64 %a) { 208; CHECK-LABEL: test_lllesll_z_store: 209; CHECK: # %bb.0: # %entry 210; CHECK-NEXT: addi r5, r3, -1 211; CHECK-NEXT: addis r4, r2, glob@toc@ha 212; CHECK-NEXT: or r3, r5, r3 213; CHECK-NEXT: rldicl r3, r3, 1, 63 214; CHECK-NEXT: std r3, glob@toc@l(r4) 215; CHECK-NEXT: blr 216; CHECK-BE-LABEL: test_lllesll_z_store: 217; CHECK-BE: # %bb.0: # %entry 218; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 219; CHECK-BE-NEXT: addi r5, r3, -1 220; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 221; CHECK-BE-NEXT: or r3, r5, r3 222; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 223; CHECK-BE-NEXT: std r3, 0(r4) 224; CHECK-BE-NEXT: blr 225; 226; CHECK-LE-LABEL: test_lllesll_z_store: 227; CHECK-LE: # %bb.0: # %entry 228; CHECK-LE-NEXT: addi r5, r3, -1 229; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha 230; CHECK-LE-NEXT: or r3, r5, r3 231; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 232; CHECK-LE-NEXT: std r3, glob@toc@l(r4) 233; CHECK-LE-NEXT: blr 234entry: 235 %cmp = icmp slt i64 %a, 1 236 %conv1 = zext i1 %cmp to i64 237 store i64 %conv1, i64* @glob, align 8 238 ret void 239} 240 241; Function Attrs: norecurse nounwind 242define void @test_lllesll_sext_z_store(i64 %a) { 243; CHECK-LABEL: test_lllesll_sext_z_store: 244; CHECK: # %bb.0: # %entry 245; CHECK-NEXT: addi r5, r3, -1 246; CHECK-NEXT: addis r4, r2, glob@toc@ha 247; CHECK-NEXT: or r3, r5, r3 248; CHECK-NEXT: sradi r3, r3, 63 249; CHECK-NEXT: std r3, glob@toc@l(r4) 250; CHECK-NEXT: blr 251; CHECK-BE-LABEL: test_lllesll_sext_z_store: 252; CHECK-BE: # %bb.0: # %entry 253; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha 254; CHECK-BE-NEXT: addi r5, r3, -1 255; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4) 256; CHECK-BE-NEXT: or r3, r5, r3 257; CHECK-BE-NEXT: sradi r3, r3, 63 258; CHECK-BE-NEXT: std r3, 0(r4) 259; CHECK-BE-NEXT: blr 260; 261; CHECK-LE-LABEL: test_lllesll_sext_z_store: 262; CHECK-LE: # %bb.0: # %entry 263; CHECK-LE-NEXT: addi r5, r3, -1 264; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha 265; CHECK-LE-NEXT: or r3, r5, r3 266; CHECK-LE-NEXT: sradi r3, r3, 63 267; CHECK-LE-NEXT: std r3, glob@toc@l(r4) 268; CHECK-LE-NEXT: blr 269entry: 270 %cmp = icmp slt i64 %a, 1 271 %conv1 = sext i1 %cmp to i64 272 store i64 %conv1, i64* @glob, align 8 273 ret void 274} 275