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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -O3 -ppc-asm-full-reg-names -verify-machineinstrs < %s | FileCheck %s
3
4; Test cases are generated from:
5; long long NAME(PARAM a, PARAM b) {
6;   if (LHS > RHS)
7;     return b;
8;   if (LHS < RHS)
9;     return a;\
10;   return a * b;
11; }
12; Please note funtion name is defined as <PARAM>_<LHS>_<RHS>. Take ll_a_op_b__1
13; for example. ll is PARAM, a_op_b (i.e., a << b) is LHS, _1 (i.e., -1) is RHS.
14
15target datalayout = "e-m:e-i64:64-n32:64"
16
17define i64 @ll_a_op_b__2(i64 %a, i64 %b) {
18; CHECK-LABEL: ll_a_op_b__2:
19; CHECK:       # %bb.0: # %entry
20; CHECK-NEXT:    sld r5, r3, r4
21; CHECK-NEXT:    cmpdi r5, -2
22; CHECK-NEXT:    ble cr0, .LBB0_2
23; CHECK-NEXT:  # %bb.1: # %return
24; CHECK-NEXT:    mr r3, r4
25; CHECK-NEXT:    blr
26; CHECK-NEXT:  .LBB0_2: # %if.end
27; CHECK-NEXT:    li r5, 1
28; CHECK-NEXT:    isellt r4, r5, r4
29; CHECK-NEXT:    mulld r3, r4, r3
30; CHECK-NEXT:    blr
31entry:
32  %shl = shl i64 %a, %b
33  %cmp = icmp sgt i64 %shl, -2
34  br i1 %cmp, label %return, label %if.end
35
36if.end:                                           ; preds = %entry
37  %cmp2 = icmp eq i64 %shl, -2
38  %mul = select i1 %cmp2, i64 %b, i64 1
39  %spec.select = mul nsw i64 %mul, %a
40  ret i64 %spec.select
41
42return:                                           ; preds = %entry
43  ret i64 %b
44}
45
46define i64 @ll_a_op_b__1(i64 %a, i64 %b) {
47; CHECK-LABEL: ll_a_op_b__1:
48; CHECK:       # %bb.0: # %entry
49; CHECK-NEXT:    sld r5, r3, r4
50; CHECK-NEXT:    cmpdi r5, -1
51; CHECK-NEXT:    ble cr0, .LBB1_2
52; CHECK-NEXT:  # %bb.1: # %return
53; CHECK-NEXT:    mr r3, r4
54; CHECK-NEXT:    blr
55; CHECK-NEXT:  .LBB1_2: # %if.end
56; CHECK-NEXT:    li r5, 1
57; CHECK-NEXT:    isellt r4, r5, r4
58; CHECK-NEXT:    mulld r3, r4, r3
59; CHECK-NEXT:    blr
60entry:
61  %shl = shl i64 %a, %b
62  %cmp = icmp sgt i64 %shl, -1
63  br i1 %cmp, label %return, label %if.end
64
65if.end:                                           ; preds = %entry
66  %cmp2 = icmp eq i64 %shl, -1
67  %mul = select i1 %cmp2, i64 %b, i64 1
68  %spec.select = mul nsw i64 %mul, %a
69  ret i64 %spec.select
70
71return:                                           ; preds = %entry
72  ret i64 %b
73}
74
75define i64 @ll_a_op_b_0(i64 %a, i64 %b) {
76; CHECK-LABEL: ll_a_op_b_0:
77; CHECK:       # %bb.0: # %entry
78; CHECK-NEXT:    sld. r5, r3, r4
79; CHECK-NEXT:    ble cr0, .LBB2_2
80; CHECK-NEXT:  # %bb.1: # %return
81; CHECK-NEXT:    mr r3, r4
82; CHECK-NEXT:    blr
83; CHECK-NEXT:  .LBB2_2: # %if.end
84; CHECK-NEXT:    li r5, 1
85; CHECK-NEXT:    isellt r4, r5, r4
86; CHECK-NEXT:    mulld r3, r4, r3
87; CHECK-NEXT:    blr
88entry:
89  %shl = shl i64 %a, %b
90  %cmp = icmp sgt i64 %shl, 0
91  br i1 %cmp, label %return, label %if.end
92
93if.end:                                           ; preds = %entry
94  %cmp2 = icmp eq i64 %shl, 0
95  %mul = select i1 %cmp2, i64 %b, i64 1
96  %spec.select = mul nsw i64 %mul, %a
97  ret i64 %spec.select
98
99return:                                           ; preds = %entry
100  ret i64 %b
101}
102
103define i64 @ll_a_op_b_1(i64 %a, i64 %b) {
104; CHECK-LABEL: ll_a_op_b_1:
105; CHECK:       # %bb.0: # %entry
106; CHECK-NEXT:    sld r5, r3, r4
107; CHECK-NEXT:    cmpdi r5, 1
108; CHECK-NEXT:    ble cr0, .LBB3_2
109; CHECK-NEXT:  # %bb.1: # %return
110; CHECK-NEXT:    mr r3, r4
111; CHECK-NEXT:    blr
112; CHECK-NEXT:  .LBB3_2: # %if.end
113; CHECK-NEXT:    li r5, 1
114; CHECK-NEXT:    isellt r4, r5, r4
115; CHECK-NEXT:    mulld r3, r4, r3
116; CHECK-NEXT:    blr
117entry:
118  %shl = shl i64 %a, %b
119  %cmp = icmp sgt i64 %shl, 1
120  br i1 %cmp, label %return, label %if.end
121
122if.end:                                           ; preds = %entry
123  %cmp2 = icmp eq i64 %shl, 1
124  %mul = select i1 %cmp2, i64 %b, i64 1
125  %spec.select = mul nsw i64 %mul, %a
126  ret i64 %spec.select
127
128return:                                           ; preds = %entry
129  ret i64 %b
130}
131
132define i64 @ll_a_op_b_2(i64 %a, i64 %b) {
133; CHECK-LABEL: ll_a_op_b_2:
134; CHECK:       # %bb.0: # %entry
135; CHECK-NEXT:    sld r5, r3, r4
136; CHECK-NEXT:    cmpdi r5, 2
137; CHECK-NEXT:    ble cr0, .LBB4_2
138; CHECK-NEXT:  # %bb.1: # %return
139; CHECK-NEXT:    mr r3, r4
140; CHECK-NEXT:    blr
141; CHECK-NEXT:  .LBB4_2: # %if.end
142; CHECK-NEXT:    li r5, 1
143; CHECK-NEXT:    isellt r4, r5, r4
144; CHECK-NEXT:    mulld r3, r4, r3
145; CHECK-NEXT:    blr
146entry:
147  %shl = shl i64 %a, %b
148  %cmp = icmp sgt i64 %shl, 2
149  br i1 %cmp, label %return, label %if.end
150
151if.end:                                           ; preds = %entry
152  %cmp2 = icmp eq i64 %shl, 2
153  %mul = select i1 %cmp2, i64 %b, i64 1
154  %spec.select = mul nsw i64 %mul, %a
155  ret i64 %spec.select
156
157return:                                           ; preds = %entry
158  ret i64 %b
159}
160
161define i64 @ll_a__2(i64 %a, i64 %b) {
162; CHECK-LABEL: ll_a__2:
163; CHECK:       # %bb.0: # %entry
164; CHECK-NEXT:    cmpdi r3, -2
165; CHECK-NEXT:    ble cr0, .LBB5_2
166; CHECK-NEXT:  # %bb.1: # %return
167; CHECK-NEXT:    mr r3, r4
168; CHECK-NEXT:    blr
169; CHECK-NEXT:  .LBB5_2: # %if.end
170; CHECK-NEXT:    li r5, 1
171; CHECK-NEXT:    isellt r4, r5, r4
172; CHECK-NEXT:    mulld r3, r4, r3
173; CHECK-NEXT:    blr
174entry:
175  %cmp = icmp sgt i64 %a, -2
176  br i1 %cmp, label %return, label %if.end
177
178if.end:                                           ; preds = %entry
179  %cmp1 = icmp eq i64 %a, -2
180  %mul = select i1 %cmp1, i64 %b, i64 1
181  %spec.select = mul nsw i64 %mul, %a
182  ret i64 %spec.select
183
184return:                                           ; preds = %entry
185  ret i64 %b
186}
187
188define i64 @ll_a__1(i64 %a, i64 %b) {
189; CHECK-LABEL: ll_a__1:
190; CHECK:       # %bb.0: # %entry
191; CHECK-NEXT:    cmpdi r3, -1
192; CHECK-NEXT:    ble cr0, .LBB6_2
193; CHECK-NEXT:  # %bb.1: # %return
194; CHECK-NEXT:    mr r3, r4
195; CHECK-NEXT:    blr
196; CHECK-NEXT:  .LBB6_2: # %if.end
197; CHECK-NEXT:    li r5, 1
198; CHECK-NEXT:    isellt r4, r5, r4
199; CHECK-NEXT:    mulld r3, r4, r3
200; CHECK-NEXT:    blr
201entry:
202  %cmp = icmp sgt i64 %a, -1
203  br i1 %cmp, label %return, label %if.end
204
205if.end:                                           ; preds = %entry
206  %cmp1 = icmp eq i64 %a, -1
207  %mul = select i1 %cmp1, i64 %b, i64 1
208  %spec.select = mul nsw i64 %mul, %a
209  ret i64 %spec.select
210
211return:                                           ; preds = %entry
212  ret i64 %b
213}
214
215define i64 @ll_a_0(i64 %a, i64 %b) {
216; CHECK-LABEL: ll_a_0:
217; CHECK:       # %bb.0: # %entry
218; CHECK-NEXT:    cmpdi r3, 0
219; CHECK-NEXT:    ble cr0, .LBB7_2
220; CHECK-NEXT:  # %bb.1: # %return
221; CHECK-NEXT:    mr r3, r4
222; CHECK-NEXT:    blr
223; CHECK-NEXT:  .LBB7_2: # %if.end
224; CHECK-NEXT:    li r5, 1
225; CHECK-NEXT:    isellt r4, r5, r4
226; CHECK-NEXT:    mulld r3, r4, r3
227; CHECK-NEXT:    blr
228entry:
229  %cmp = icmp sgt i64 %a, 0
230  br i1 %cmp, label %return, label %if.end
231
232if.end:                                           ; preds = %entry
233  %cmp1 = icmp eq i64 %a, 0
234  %mul = select i1 %cmp1, i64 %b, i64 1
235  %spec.select = mul nsw i64 %mul, %a
236  ret i64 %spec.select
237
238return:                                           ; preds = %entry
239  ret i64 %b
240}
241
242define i64 @ll_a_1(i64 %a, i64 %b) {
243; CHECK-LABEL: ll_a_1:
244; CHECK:       # %bb.0: # %entry
245; CHECK-NEXT:    cmpdi r3, 1
246; CHECK-NEXT:    ble cr0, .LBB8_2
247; CHECK-NEXT:  # %bb.1: # %return
248; CHECK-NEXT:    mr r3, r4
249; CHECK-NEXT:    blr
250; CHECK-NEXT:  .LBB8_2: # %if.end
251; CHECK-NEXT:    li r5, 1
252; CHECK-NEXT:    isellt r4, r5, r4
253; CHECK-NEXT:    mulld r3, r4, r3
254; CHECK-NEXT:    blr
255entry:
256  %cmp = icmp sgt i64 %a, 1
257  br i1 %cmp, label %return, label %if.end
258
259if.end:                                           ; preds = %entry
260  %cmp1 = icmp eq i64 %a, 1
261  %mul = select i1 %cmp1, i64 %b, i64 1
262  %spec.select = mul nsw i64 %mul, %a
263  ret i64 %spec.select
264
265return:                                           ; preds = %entry
266  ret i64 %b
267}
268
269define i64 @ll_a_2(i64 %a, i64 %b) {
270; CHECK-LABEL: ll_a_2:
271; CHECK:       # %bb.0: # %entry
272; CHECK-NEXT:    cmpdi r3, 2
273; CHECK-NEXT:    ble cr0, .LBB9_2
274; CHECK-NEXT:  # %bb.1: # %return
275; CHECK-NEXT:    mr r3, r4
276; CHECK-NEXT:    blr
277; CHECK-NEXT:  .LBB9_2: # %if.end
278; CHECK-NEXT:    li r5, 1
279; CHECK-NEXT:    isellt r4, r5, r4
280; CHECK-NEXT:    mulld r3, r4, r3
281; CHECK-NEXT:    blr
282entry:
283  %cmp = icmp sgt i64 %a, 2
284  br i1 %cmp, label %return, label %if.end
285
286if.end:                                           ; preds = %entry
287  %cmp1 = icmp eq i64 %a, 2
288  %mul = select i1 %cmp1, i64 %b, i64 1
289  %spec.select = mul nsw i64 %mul, %a
290  ret i64 %spec.select
291
292return:                                           ; preds = %entry
293  ret i64 %b
294}
295
296define i64 @i_a_op_b__2(i32 signext %a, i32 signext %b) {
297; CHECK-LABEL: i_a_op_b__2:
298; CHECK:       # %bb.0: # %entry
299; CHECK-NEXT:    slw r5, r3, r4
300; CHECK-NEXT:    cmpwi r5, -2
301; CHECK-NEXT:    bgt cr0, .LBB10_2
302; CHECK-NEXT:  # %bb.1: # %if.end
303; CHECK-NEXT:    li r5, 1
304; CHECK-NEXT:    isellt r4, r5, r4
305; CHECK-NEXT:    mullw r4, r4, r3
306; CHECK-NEXT:  .LBB10_2: # %return
307; CHECK-NEXT:    extsw r3, r4
308; CHECK-NEXT:    blr
309entry:
310  %shl = shl i32 %a, %b
311  %cmp = icmp sgt i32 %shl, -2
312  br i1 %cmp, label %return, label %if.end
313
314if.end:                                           ; preds = %entry
315  %cmp2 = icmp eq i32 %shl, -2
316  %mul = select i1 %cmp2, i32 %b, i32 1
317  %spec.select = mul nsw i32 %mul, %a
318  br label %return
319
320return:                                           ; preds = %if.end, %entry
321  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
322  %retval.0 = sext i32 %retval.0.in to i64
323  ret i64 %retval.0
324}
325
326define i64 @i_a_op_b__1(i32 signext %a, i32 signext %b) {
327; CHECK-LABEL: i_a_op_b__1:
328; CHECK:       # %bb.0: # %entry
329; CHECK-NEXT:    slw r5, r3, r4
330; CHECK-NEXT:    cmpwi r5, -1
331; CHECK-NEXT:    ble cr0, .LBB11_2
332; CHECK-NEXT:  # %bb.1: # %return
333; CHECK-NEXT:    extsw r3, r4
334; CHECK-NEXT:    blr
335; CHECK-NEXT:  .LBB11_2: # %if.end
336; CHECK-NEXT:    li r5, 1
337; CHECK-NEXT:    isellt r4, r5, r4
338; CHECK-NEXT:    mullw r4, r4, r3
339; CHECK-NEXT:    extsw r3, r4
340; CHECK-NEXT:    blr
341entry:
342  %shl = shl i32 %a, %b
343  %cmp = icmp sgt i32 %shl, -1
344  br i1 %cmp, label %return, label %if.end
345
346if.end:                                           ; preds = %entry
347  %cmp2 = icmp eq i32 %shl, -1
348  %mul = select i1 %cmp2, i32 %b, i32 1
349  %spec.select = mul nsw i32 %mul, %a
350  br label %return
351
352return:                                           ; preds = %if.end, %entry
353  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
354  %retval.0 = sext i32 %retval.0.in to i64
355  ret i64 %retval.0
356}
357
358define i64 @i_a_op_b_0(i32 signext %a, i32 signext %b) {
359; CHECK-LABEL: i_a_op_b_0:
360; CHECK:       # %bb.0: # %entry
361; CHECK-NEXT:    slw r5, r3, r4
362; CHECK-NEXT:    cmpwi r5, 0
363; CHECK-NEXT:    ble cr0, .LBB12_2
364; CHECK-NEXT:  # %bb.1: # %return
365; CHECK-NEXT:    extsw r3, r4
366; CHECK-NEXT:    blr
367; CHECK-NEXT:  .LBB12_2: # %if.end
368; CHECK-NEXT:    li r5, 1
369; CHECK-NEXT:    isellt r4, r5, r4
370; CHECK-NEXT:    mullw r4, r4, r3
371; CHECK-NEXT:    extsw r3, r4
372; CHECK-NEXT:    blr
373entry:
374  %shl = shl i32 %a, %b
375  %cmp = icmp sgt i32 %shl, 0
376  br i1 %cmp, label %return, label %if.end
377
378if.end:                                           ; preds = %entry
379  %cmp2 = icmp eq i32 %shl, 0
380  %mul = select i1 %cmp2, i32 %b, i32 1
381  %spec.select = mul nsw i32 %mul, %a
382  br label %return
383
384return:                                           ; preds = %if.end, %entry
385  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
386  %retval.0 = sext i32 %retval.0.in to i64
387  ret i64 %retval.0
388}
389
390define i64 @i_a_op_b_1(i32 signext %a, i32 signext %b) {
391; CHECK-LABEL: i_a_op_b_1:
392; CHECK:       # %bb.0: # %entry
393; CHECK-NEXT:    slw r5, r3, r4
394; CHECK-NEXT:    cmpwi r5, 1
395; CHECK-NEXT:    bgt cr0, .LBB13_2
396; CHECK-NEXT:  # %bb.1: # %if.end
397; CHECK-NEXT:    li r5, 1
398; CHECK-NEXT:    isellt r4, r5, r4
399; CHECK-NEXT:    mullw r4, r4, r3
400; CHECK-NEXT:  .LBB13_2: # %return
401; CHECK-NEXT:    extsw r3, r4
402; CHECK-NEXT:    blr
403entry:
404  %shl = shl i32 %a, %b
405  %cmp = icmp sgt i32 %shl, 1
406  br i1 %cmp, label %return, label %if.end
407
408if.end:                                           ; preds = %entry
409  %cmp2 = icmp eq i32 %shl, 1
410  %mul = select i1 %cmp2, i32 %b, i32 1
411  %spec.select = mul nsw i32 %mul, %a
412  br label %return
413
414return:                                           ; preds = %if.end, %entry
415  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
416  %retval.0 = sext i32 %retval.0.in to i64
417  ret i64 %retval.0
418}
419
420define i64 @i_a_op_b_2(i32 signext %a, i32 signext %b) {
421; CHECK-LABEL: i_a_op_b_2:
422; CHECK:       # %bb.0: # %entry
423; CHECK-NEXT:    slw r5, r3, r4
424; CHECK-NEXT:    cmpwi r5, 2
425; CHECK-NEXT:    bgt cr0, .LBB14_2
426; CHECK-NEXT:  # %bb.1: # %if.end
427; CHECK-NEXT:    li r5, 1
428; CHECK-NEXT:    isellt r4, r5, r4
429; CHECK-NEXT:    mullw r4, r4, r3
430; CHECK-NEXT:  .LBB14_2: # %return
431; CHECK-NEXT:    extsw r3, r4
432; CHECK-NEXT:    blr
433entry:
434  %shl = shl i32 %a, %b
435  %cmp = icmp sgt i32 %shl, 2
436  br i1 %cmp, label %return, label %if.end
437
438if.end:                                           ; preds = %entry
439  %cmp2 = icmp eq i32 %shl, 2
440  %mul = select i1 %cmp2, i32 %b, i32 1
441  %spec.select = mul nsw i32 %mul, %a
442  br label %return
443
444return:                                           ; preds = %if.end, %entry
445  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
446  %retval.0 = sext i32 %retval.0.in to i64
447  ret i64 %retval.0
448}
449
450define i64 @i_a__2(i32 signext %a, i32 signext %b) {
451; CHECK-LABEL: i_a__2:
452; CHECK:       # %bb.0: # %entry
453; CHECK-NEXT:    cmpwi r3, -2
454; CHECK-NEXT:    bgt cr0, .LBB15_2
455; CHECK-NEXT:  # %bb.1: # %if.end
456; CHECK-NEXT:    li r5, 1
457; CHECK-NEXT:    isellt r4, r5, r4
458; CHECK-NEXT:    mullw r4, r4, r3
459; CHECK-NEXT:  .LBB15_2: # %return
460; CHECK-NEXT:    extsw r3, r4
461; CHECK-NEXT:    blr
462entry:
463  %cmp = icmp sgt i32 %a, -2
464  br i1 %cmp, label %return, label %if.end
465
466if.end:                                           ; preds = %entry
467  %cmp1 = icmp eq i32 %a, -2
468  %mul = select i1 %cmp1, i32 %b, i32 1
469  %spec.select = mul nsw i32 %mul, %a
470  br label %return
471
472return:                                           ; preds = %if.end, %entry
473  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
474  %retval.0 = sext i32 %retval.0.in to i64
475  ret i64 %retval.0
476}
477
478define i64 @i_a__1(i32 signext %a, i32 signext %b) {
479; CHECK-LABEL: i_a__1:
480; CHECK:       # %bb.0: # %entry
481; CHECK-NEXT:    cmpwi r3, -1
482; CHECK-NEXT:    ble cr0, .LBB16_2
483; CHECK-NEXT:  # %bb.1: # %return
484; CHECK-NEXT:    extsw r3, r4
485; CHECK-NEXT:    blr
486; CHECK-NEXT:  .LBB16_2: # %if.end
487; CHECK-NEXT:    li r5, 1
488; CHECK-NEXT:    isellt r4, r5, r4
489; CHECK-NEXT:    mullw r4, r4, r3
490; CHECK-NEXT:    extsw r3, r4
491; CHECK-NEXT:    blr
492entry:
493  %cmp = icmp sgt i32 %a, -1
494  br i1 %cmp, label %return, label %if.end
495
496if.end:                                           ; preds = %entry
497  %cmp1 = icmp eq i32 %a, -1
498  %mul = select i1 %cmp1, i32 %b, i32 1
499  %spec.select = mul nsw i32 %mul, %a
500  br label %return
501
502return:                                           ; preds = %if.end, %entry
503  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
504  %retval.0 = sext i32 %retval.0.in to i64
505  ret i64 %retval.0
506}
507
508define i64 @i_a_0(i32 signext %a, i32 signext %b) {
509; CHECK-LABEL: i_a_0:
510; CHECK:       # %bb.0: # %entry
511; CHECK-NEXT:    cmpwi r3, 0
512; CHECK-NEXT:    ble cr0, .LBB17_2
513; CHECK-NEXT:  # %bb.1: # %return
514; CHECK-NEXT:    extsw r3, r4
515; CHECK-NEXT:    blr
516; CHECK-NEXT:  .LBB17_2: # %if.end
517; CHECK-NEXT:    li r5, 1
518; CHECK-NEXT:    isellt r4, r5, r4
519; CHECK-NEXT:    mullw r4, r4, r3
520; CHECK-NEXT:    extsw r3, r4
521; CHECK-NEXT:    blr
522entry:
523  %cmp = icmp sgt i32 %a, 0
524  br i1 %cmp, label %return, label %if.end
525
526if.end:                                           ; preds = %entry
527  %cmp1 = icmp eq i32 %a, 0
528  %mul = select i1 %cmp1, i32 %b, i32 1
529  %spec.select = mul nsw i32 %mul, %a
530  br label %return
531
532return:                                           ; preds = %if.end, %entry
533  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
534  %retval.0 = sext i32 %retval.0.in to i64
535  ret i64 %retval.0
536}
537
538define i64 @i_a_1(i32 signext %a, i32 signext %b) {
539; CHECK-LABEL: i_a_1:
540; CHECK:       # %bb.0: # %entry
541; CHECK-NEXT:    cmpwi r3, 1
542; CHECK-NEXT:    bgt cr0, .LBB18_2
543; CHECK-NEXT:  # %bb.1: # %if.end
544; CHECK-NEXT:    li r5, 1
545; CHECK-NEXT:    isellt r4, r5, r4
546; CHECK-NEXT:    mullw r4, r4, r3
547; CHECK-NEXT:  .LBB18_2: # %return
548; CHECK-NEXT:    extsw r3, r4
549; CHECK-NEXT:    blr
550entry:
551  %cmp = icmp sgt i32 %a, 1
552  br i1 %cmp, label %return, label %if.end
553
554if.end:                                           ; preds = %entry
555  %cmp1 = icmp eq i32 %a, 1
556  %mul = select i1 %cmp1, i32 %b, i32 1
557  %spec.select = mul nsw i32 %mul, %a
558  br label %return
559
560return:                                           ; preds = %if.end, %entry
561  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
562  %retval.0 = sext i32 %retval.0.in to i64
563  ret i64 %retval.0
564}
565
566define i64 @i_a_2(i32 signext %a, i32 signext %b) {
567; CHECK-LABEL: i_a_2:
568; CHECK:       # %bb.0: # %entry
569; CHECK-NEXT:    cmpwi r3, 2
570; CHECK-NEXT:    bgt cr0, .LBB19_2
571; CHECK-NEXT:  # %bb.1: # %if.end
572; CHECK-NEXT:    li r5, 1
573; CHECK-NEXT:    isellt r4, r5, r4
574; CHECK-NEXT:    mullw r4, r4, r3
575; CHECK-NEXT:  .LBB19_2: # %return
576; CHECK-NEXT:    extsw r3, r4
577; CHECK-NEXT:    blr
578entry:
579  %cmp = icmp sgt i32 %a, 2
580  br i1 %cmp, label %return, label %if.end
581
582if.end:                                           ; preds = %entry
583  %cmp1 = icmp eq i32 %a, 2
584  %mul = select i1 %cmp1, i32 %b, i32 1
585  %spec.select = mul nsw i32 %mul, %a
586  br label %return
587
588return:                                           ; preds = %if.end, %entry
589  %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]
590  %retval.0 = sext i32 %retval.0.in to i64
591  ret i64 %retval.0
592}
593