1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck -check-prefix=P32 %s 3; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck -check-prefix=P64 %s 4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefix=P64 %s 5 6; PR8327 7define i8* @test1(i8** %foo) nounwind { 8; P32-LABEL: test1: 9; P32: # %bb.0: 10; P32-NEXT: lbz r4, 0(r3) 11; P32-NEXT: lwz r5, 4(r3) 12; P32-NEXT: lwz r6, 8(r3) 13; P32-NEXT: addi r7, r4, 1 14; P32-NEXT: stb r7, 0(r3) 15; P32-NEXT: addi r7, r5, 4 16; P32-NEXT: cmpwi r4, 8 17; P32-NEXT: slwi r4, r4, 2 18; P32-NEXT: add r4, r6, r4 19; P32-NEXT: bc 12, lt, .LBB0_2 20; P32-NEXT: # %bb.1: 21; P32-NEXT: ori r6, r7, 0 22; P32-NEXT: b .LBB0_3 23; P32-NEXT: .LBB0_2: 24; P32-NEXT: addi r6, r5, 0 25; P32-NEXT: .LBB0_3: 26; P32-NEXT: stw r6, 4(r3) 27; P32-NEXT: bc 12, lt, .LBB0_5 28; P32-NEXT: # %bb.4: 29; P32-NEXT: ori r3, r5, 0 30; P32-NEXT: b .LBB0_6 31; P32-NEXT: .LBB0_5: 32; P32-NEXT: addi r3, r4, 0 33; P32-NEXT: .LBB0_6: 34; P32-NEXT: lwz r3, 0(r3) 35; P32-NEXT: blr 36; 37; P64-LABEL: test1: 38; P64: # %bb.0: 39; P64-NEXT: ld r4, 0(r3) 40; P64-NEXT: addi r5, r4, 8 41; P64-NEXT: std r5, 0(r3) 42; P64-NEXT: ld r3, 0(r4) 43; P64-NEXT: blr 44 %A = va_arg i8** %foo, i8* 45 ret i8* %A 46} 47 48 49