1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s --check-prefixes=ALL,VSX 3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s --check-prefixes=ALL,NOVSX 4 5; Check VMX 128-bit integer operations 6 7define <1 x i128> @out_of_bounds_insertelement(<1 x i128> %x, i128 %val) nounwind { 8; ALL-LABEL: out_of_bounds_insertelement: 9; ALL: # %bb.0: 10; ALL-NEXT: blr 11 %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 1 12 %result = add <1 x i128> %x, %tmpvec 13 ret <1 x i128> %result 14} 15 16define <1 x i128> @test_add(<1 x i128> %x, <1 x i128> %y) nounwind { 17; ALL-LABEL: test_add: 18; ALL: # %bb.0: 19; ALL-NEXT: vadduqm 2, 2, 3 20; ALL-NEXT: blr 21 %result = add <1 x i128> %x, %y 22 ret <1 x i128> %result 23} 24 25define <1 x i128> @increment_by_one(<1 x i128> %x) nounwind { 26; VSX-LABEL: increment_by_one: 27; VSX: # %bb.0: 28; VSX-NEXT: addis 3, 2, .LCPI2_0@toc@ha 29; VSX-NEXT: addi 3, 3, .LCPI2_0@toc@l 30; VSX-NEXT: lxvd2x 35, 0, 3 31; VSX-NEXT: vadduqm 2, 2, 3 32; VSX-NEXT: blr 33; 34; NOVSX-LABEL: increment_by_one: 35; NOVSX: # %bb.0: 36; NOVSX-NEXT: addis 3, 2, .LCPI2_0@toc@ha 37; NOVSX-NEXT: addi 3, 3, .LCPI2_0@toc@l 38; NOVSX-NEXT: lvx 3, 0, 3 39; NOVSX-NEXT: vadduqm 2, 2, 3 40; NOVSX-NEXT: blr 41 %result = add <1 x i128> %x, <i128 1> 42 ret <1 x i128> %result 43} 44 45define <1 x i128> @increment_by_val(<1 x i128> %x, i128 %val) nounwind { 46; VSX-LABEL: increment_by_val: 47; VSX: # %bb.0: 48; VSX-NEXT: mtfprd 0, 6 49; VSX-NEXT: mtfprd 1, 5 50; VSX-NEXT: xxmrghd 35, 1, 0 51; VSX-NEXT: vadduqm 2, 2, 3 52; VSX-NEXT: blr 53; 54; NOVSX-LABEL: increment_by_val: 55; NOVSX: # %bb.0: 56; NOVSX-NEXT: addi 3, 1, -16 57; NOVSX-NEXT: std 6, -8(1) 58; NOVSX-NEXT: std 5, -16(1) 59; NOVSX-NEXT: lvx 3, 0, 3 60; NOVSX-NEXT: vadduqm 2, 2, 3 61; NOVSX-NEXT: blr 62 %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0 63 %result = add <1 x i128> %x, %tmpvec 64 ret <1 x i128> %result 65} 66 67define <1 x i128> @test_sub(<1 x i128> %x, <1 x i128> %y) nounwind { 68; ALL-LABEL: test_sub: 69; ALL: # %bb.0: 70; ALL-NEXT: vsubuqm 2, 2, 3 71; ALL-NEXT: blr 72 %result = sub <1 x i128> %x, %y 73 ret <1 x i128> %result 74} 75 76define <1 x i128> @decrement_by_one(<1 x i128> %x) nounwind { 77; VSX-LABEL: decrement_by_one: 78; VSX: # %bb.0: 79; VSX-NEXT: addis 3, 2, .LCPI5_0@toc@ha 80; VSX-NEXT: addi 3, 3, .LCPI5_0@toc@l 81; VSX-NEXT: lxvd2x 35, 0, 3 82; VSX-NEXT: vsubuqm 2, 2, 3 83; VSX-NEXT: blr 84; 85; NOVSX-LABEL: decrement_by_one: 86; NOVSX: # %bb.0: 87; NOVSX-NEXT: addis 3, 2, .LCPI5_0@toc@ha 88; NOVSX-NEXT: addi 3, 3, .LCPI5_0@toc@l 89; NOVSX-NEXT: lvx 3, 0, 3 90; NOVSX-NEXT: vsubuqm 2, 2, 3 91; NOVSX-NEXT: blr 92 %result = sub <1 x i128> %x, <i128 1> 93 ret <1 x i128> %result 94} 95 96define <1 x i128> @decrement_by_val(<1 x i128> %x, i128 %val) nounwind { 97; VSX-LABEL: decrement_by_val: 98; VSX: # %bb.0: 99; VSX-NEXT: mtfprd 0, 6 100; VSX-NEXT: mtfprd 1, 5 101; VSX-NEXT: xxmrghd 35, 1, 0 102; VSX-NEXT: vsubuqm 2, 2, 3 103; VSX-NEXT: blr 104; 105; NOVSX-LABEL: decrement_by_val: 106; NOVSX: # %bb.0: 107; NOVSX-NEXT: addi 3, 1, -16 108; NOVSX-NEXT: std 6, -8(1) 109; NOVSX-NEXT: std 5, -16(1) 110; NOVSX-NEXT: lvx 3, 0, 3 111; NOVSX-NEXT: vsubuqm 2, 2, 3 112; NOVSX-NEXT: blr 113 %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0 114 %result = sub <1 x i128> %x, %tmpvec 115 ret <1 x i128> %result 116} 117 118declare <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind readnone 119declare <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x, <1 x i128> %y) nounwind readnone 120declare <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind readnone 121declare <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind readnone 122declare <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x, <1 x i128> %y) nounwind readnone 123declare <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind readnone 124 125define <1 x i128> @test_vaddeuqm(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind { 126; ALL-LABEL: test_vaddeuqm: 127; ALL: # %bb.0: 128; ALL-NEXT: vaddeuqm 2, 2, 3, 4 129; ALL-NEXT: blr 130 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x, 131 <1 x i128> %y, 132 <1 x i128> %z) 133 ret <1 x i128> %tmp 134} 135 136define <1 x i128> @test_vaddcuq(<1 x i128> %x, <1 x i128> %y) nounwind { 137; ALL-LABEL: test_vaddcuq: 138; ALL: # %bb.0: 139; ALL-NEXT: vaddcuq 2, 2, 3 140; ALL-NEXT: blr 141 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x, 142 <1 x i128> %y) 143 ret <1 x i128> %tmp 144} 145 146define <1 x i128> @test_vaddecuq(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind { 147; ALL-LABEL: test_vaddecuq: 148; ALL: # %bb.0: 149; ALL-NEXT: vaddecuq 2, 2, 3, 4 150; ALL-NEXT: blr 151 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x, 152 <1 x i128> %y, 153 <1 x i128> %z) 154 ret <1 x i128> %tmp 155} 156 157define <1 x i128> @test_vsubeuqm(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind { 158; ALL-LABEL: test_vsubeuqm: 159; ALL: # %bb.0: 160; ALL-NEXT: vsubeuqm 2, 2, 3, 4 161; ALL-NEXT: blr 162 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x, 163 <1 x i128> %y, 164 <1 x i128> %z) 165 ret <1 x i128> %tmp 166} 167 168define <1 x i128> @test_vsubcuq(<1 x i128> %x, <1 x i128> %y) nounwind { 169; ALL-LABEL: test_vsubcuq: 170; ALL: # %bb.0: 171; ALL-NEXT: vsubcuq 2, 2, 3 172; ALL-NEXT: blr 173 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x, 174 <1 x i128> %y) 175 ret <1 x i128> %tmp 176} 177 178define <1 x i128> @test_vsubecuq(<1 x i128> %x, <1 x i128> %y, <1 x i128> %z) nounwind { 179; ALL-LABEL: test_vsubecuq: 180; ALL: # %bb.0: 181; ALL-NEXT: vsubecuq 2, 2, 3, 4 182; ALL-NEXT: blr 183 %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x, 184 <1 x i128> %y, 185 <1 x i128> %z) 186 ret <1 x i128> %tmp 187} 188