1; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \ 3; RUN: --check-prefix=CHECK-BE 4; Function Attrs: norecurse nounwind readonly 5define <16 x i8> @vecucuc(i8* nocapture readonly %ptr) { 6entry: 7 %0 = load i8, i8* %ptr, align 1 8 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0 9 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 10 ret <16 x i8> %splat.splat 11; CHECK-LABEL: vecucuc 12; CHECK: lxsibzx 34, 0, 3 13; CHECK-NEXT: vspltb 2, 2, 7 14; CHECK-BE-LABEL: vecucuc 15; CHECK-BE: lxsibzx 34, 0, 3 16; CHECK-BE-NEXT: vspltb 2, 2, 7 17} 18 19; Function Attrs: norecurse nounwind readonly 20define <8 x i16> @vecusuc(i8* nocapture readonly %ptr) { 21entry: 22 %0 = load i8, i8* %ptr, align 1 23 %conv = zext i8 %0 to i16 24 %splat.splatinsert = insertelement <8 x i16> undef, i16 %conv, i32 0 25 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer 26 ret <8 x i16> %splat.splat 27; CHECK-LABEL: vecusuc 28; CHECK: lxsibzx 34, 0, 3 29; CHECK-NEXT: vsplth 2, 2, 3 30; CHECK-BE-LABEL: vecusuc 31; CHECK-BE: lxsibzx 34, 0, 3 32; CHECK-BE-NEXT: vsplth 2, 2, 3 33} 34 35; Function Attrs: norecurse nounwind readonly 36define <4 x i32> @vecuiuc(i8* nocapture readonly %ptr) { 37entry: 38 %0 = load i8, i8* %ptr, align 1 39 %conv = zext i8 %0 to i32 40 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 41 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 42 ret <4 x i32> %splat.splat 43; CHECK-LABEL: vecuiuc 44; CHECK: lxsibzx 0, 0, 3 45; CHECK-NEXT: xxspltw 34, 0, 1 46; CHECK-BE-LABEL: vecuiuc 47; CHECK-BE: lxsibzx 0, 0, 3 48; CHECK-BE-NEXT: xxspltw 34, 0, 1 49} 50 51; Function Attrs: norecurse nounwind readonly 52define <2 x i64> @veculuc(i8* nocapture readonly %ptr) { 53entry: 54 %0 = load i8, i8* %ptr, align 1 55 %conv = zext i8 %0 to i64 56 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 57 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 58 ret <2 x i64> %splat.splat 59; CHECK-LABEL: veculuc 60; CHECK: lxsibzx 0, 0, 3 61; CHECK-NEXT: xxspltd 34, 0, 0 62; CHECK-BE-LABEL: veculuc 63; CHECK-BE: lxsibzx 0, 0, 3 64; CHECK-BE-NEXT: xxspltd 34, 0, 0 65} 66 67; Function Attrs: norecurse nounwind readonly 68define <16 x i8> @vecscuc(i8* nocapture readonly %ptr) { 69entry: 70 %0 = load i8, i8* %ptr, align 1 71 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0 72 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 73 ret <16 x i8> %splat.splat 74; CHECK-LABEL: vecscuc 75; CHECK: lxsibzx 34, 0, 3 76; CHECK-NEXT: vspltb 2, 2, 7 77; CHECK-BE-LABEL: vecscuc 78; CHECK-BE: lxsibzx 34, 0, 3 79; CHECK-BE-NEXT: vspltb 2, 2, 7 80} 81 82; Function Attrs: norecurse nounwind readonly 83define <8 x i16> @vecssuc(i8* nocapture readonly %ptr) { 84entry: 85 %0 = load i8, i8* %ptr, align 1 86 %conv = zext i8 %0 to i16 87 %splat.splatinsert = insertelement <8 x i16> undef, i16 %conv, i32 0 88 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer 89 ret <8 x i16> %splat.splat 90; CHECK-LABEL: vecssuc 91; CHECK: lxsibzx 34, 0, 3 92; CHECK-NEXT: vsplth 2, 2, 3 93; CHECK-BE-LABEL: vecssuc 94; CHECK-BE: lxsibzx 34, 0, 3 95; CHECK-BE-NEXT: vsplth 2, 2, 3 96} 97 98; Function Attrs: norecurse nounwind readonly 99define <4 x i32> @vecsiuc(i8* nocapture readonly %ptr) { 100entry: 101 %0 = load i8, i8* %ptr, align 1 102 %conv = zext i8 %0 to i32 103 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 104 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 105 ret <4 x i32> %splat.splat 106; CHECK-LABEL: vecsiuc 107; CHECK: lxsibzx 0, 0, 3 108; CHECK-NEXT: xxspltw 34, 0, 1 109; CHECK-BE-LABEL: vecsiuc 110; CHECK-BE: lxsibzx 0, 0, 3 111; CHECK-BE-NEXT: xxspltw 34, 0, 1 112} 113 114; Function Attrs: norecurse nounwind readonly 115define <2 x i64> @vecsluc(i8* nocapture readonly %ptr) { 116entry: 117 %0 = load i8, i8* %ptr, align 1 118 %conv = zext i8 %0 to i64 119 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 120 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 121 ret <2 x i64> %splat.splat 122; CHECK-LABEL: vecsluc 123; CHECK: lxsibzx 0, 0, 3 124; CHECK-NEXT: xxspltd 34, 0, 0 125; CHECK-BE-LABEL: vecsluc 126; CHECK-BE: lxsibzx 0, 0, 3 127; CHECK-BE-NEXT: xxspltd 34, 0, 0 128} 129 130; Function Attrs: norecurse nounwind readonly 131define <4 x float> @vecfuc(i8* nocapture readonly %ptr) { 132entry: 133 %0 = load i8, i8* %ptr, align 1 134 %conv = uitofp i8 %0 to float 135 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0 136 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 137 ret <4 x float> %splat.splat 138; CHECK-LABEL: vecfuc 139; CHECK: lxsibzx [[LD:[0-9]+]], 0, 3 140; CHECK-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]] 141; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 142; CHECK-NEXT: xxspltw 34, [[CONVS]], 0 143; CHECK-BE-LABEL: vecfuc 144; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3 145; CHECK-BE-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]] 146; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 147; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0 148} 149 150; Function Attrs: norecurse nounwind readonly 151define <2 x double> @vecduc(i8* nocapture readonly %ptr) { 152entry: 153 %0 = load i8, i8* %ptr, align 1 154 %conv = uitofp i8 %0 to double 155 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0 156 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 157 ret <2 x double> %splat.splat 158; CHECK-LABEL: vecduc 159; CHECK: lxsibzx [[LD:[0-9]+]], 0, 3 160; CHECK-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]] 161; CHECK-NEXT: xxspltd 34, [[CONVD]], 0 162; CHECK-BE-LABEL: vecduc 163; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3 164; CHECK-BE-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]] 165; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0 166} 167 168; Function Attrs: norecurse nounwind readonly 169define <16 x i8> @vecucsc(i8* nocapture readonly %ptr) { 170entry: 171 %0 = load i8, i8* %ptr, align 1 172 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0 173 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 174 ret <16 x i8> %splat.splat 175; CHECK-LABEL: vecucsc 176; CHECK: lxsibzx 34, 0, 3 177; CHECK-NEXT: vspltb 2, 2, 7 178; CHECK-BE-LABEL: vecucsc 179; CHECK-BE: lxsibzx 34, 0, 3 180; CHECK-BE-NEXT: vspltb 2, 2, 7 181} 182 183; Function Attrs: norecurse nounwind readonly 184define <4 x i32> @vecuisc(i8* nocapture readonly %ptr) { 185entry: 186 %0 = load i8, i8* %ptr, align 1 187 %conv = sext i8 %0 to i32 188 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 189 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 190 ret <4 x i32> %splat.splat 191; CHECK-LABEL: vecuisc 192; CHECK: lxsibzx 34, 0, 3 193; CHECK-NEXT: vextsb2w 2, 2 194; CHECK-NEXT: xxspltw 34, 34, 1 195; CHECK-BE-LABEL: vecuisc 196; CHECK-BE: lxsibzx 34, 0, 3 197; CHECK-BE-NEXT: vextsb2w 2, 2 198; CHECK-BE-NEXT: xxspltw 34, 34, 1 199} 200 201; Function Attrs: norecurse nounwind readonly 202define <2 x i64> @veculsc(i8* nocapture readonly %ptr) { 203entry: 204 %0 = load i8, i8* %ptr, align 1 205 %conv = sext i8 %0 to i64 206 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 207 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 208 ret <2 x i64> %splat.splat 209; CHECK-LABEL: veculsc 210; CHECK: lxsibzx 34, 0, 3 211; CHECK-NEXT: vextsb2d 2, 2 212; CHECK-NEXT: xxspltd 34, 34, 0 213; CHECK-BE-LABEL: veculsc 214; CHECK-BE: lxsibzx 34, 0, 3 215; CHECK-BE-NEXT: vextsb2d 2, 2 216; CHECK-BE-NEXT: xxspltd 34, 34, 0 217} 218 219; Function Attrs: norecurse nounwind readonly 220define <16 x i8> @vecscsc(i8* nocapture readonly %ptr) { 221entry: 222 %0 = load i8, i8* %ptr, align 1 223 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0 224 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 225 ret <16 x i8> %splat.splat 226; CHECK-LABEL: vecscsc 227; CHECK: lxsibzx 34, 0, 3 228; CHECK-NEXT: vspltb 2, 2, 7 229; CHECK-BE-LABEL: vecscsc 230; CHECK-BE: lxsibzx 34, 0, 3 231; CHECK-BE-NEXT: vspltb 2, 2, 7 232} 233 234; Function Attrs: norecurse nounwind readonly 235define <4 x i32> @vecsisc(i8* nocapture readonly %ptr) { 236entry: 237 %0 = load i8, i8* %ptr, align 1 238 %conv = sext i8 %0 to i32 239 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 240 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 241 ret <4 x i32> %splat.splat 242; CHECK-LABEL: vecsisc 243; CHECK: lxsibzx 34, 0, 3 244; CHECK-NEXT: vextsb2w 2, 2 245; CHECK-NEXT: xxspltw 34, 34, 1 246; CHECK-BE-LABEL: vecsisc 247; CHECK-BE: lxsibzx 34, 0, 3 248; CHECK-BE-NEXT: vextsb2w 2, 2 249; CHECK-BE-NEXT: xxspltw 34, 34, 1 250} 251 252; Function Attrs: norecurse nounwind readonly 253define <2 x i64> @vecslsc(i8* nocapture readonly %ptr) { 254entry: 255 %0 = load i8, i8* %ptr, align 1 256 %conv = sext i8 %0 to i64 257 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 258 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 259 ret <2 x i64> %splat.splat 260; CHECK-LABEL: vecslsc 261; CHECK: lxsibzx 34, 0, 3 262; CHECK-NEXT: vextsb2d 2, 2 263; CHECK-NEXT: xxspltd 34, 34, 0 264; CHECK-BE-LABEL: vecslsc 265; CHECK-BE: lxsibzx 34, 0, 3 266; CHECK-BE-NEXT: vextsb2d 2, 2 267; CHECK-BE-NEXT: xxspltd 34, 34, 0 268} 269 270; Function Attrs: norecurse nounwind readonly 271define <4 x float> @vecfsc(i8* nocapture readonly %ptr) { 272entry: 273 %0 = load i8, i8* %ptr, align 1 274 %conv = sitofp i8 %0 to float 275 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0 276 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 277 ret <4 x float> %splat.splat 278; CHECK-LABEL: vecfsc 279; CHECK: lxsibzx 280; CHECK-NEXT: vextsb2d 281; CHECK-NEXT: xscvsxdsp [[CONVD:[0-9]+]], 282; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 283; CHECK-NEXT: xxspltw 34, [[CONVS]], 0 284; CHECK-BE-LABEL: vecfsc 285; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3 286; CHECK-BE-NEXT: vextsb2d 287; CHECK-BE-NEXT: xscvsxdsp [[CONVD:[0-9]+]], 288; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 289; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0 290} 291 292; Function Attrs: norecurse nounwind readonly 293define <2 x double> @vecdsc(i8* nocapture readonly %ptr) { 294entry: 295 %0 = load i8, i8* %ptr, align 1 296 %conv = sitofp i8 %0 to double 297 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0 298 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 299 ret <2 x double> %splat.splat 300; CHECK-LABEL: vecdsc 301; CHECK: lxsibzx 302; CHECK-NEXT: vextsb2d 303; CHECK-NEXT: xscvsxddp [[CONVD:[0-9]+]], 304; CHECK-NEXT: xxspltd 34, [[CONVD]], 0 305; CHECK-BE-LABEL: vecdsc 306; CHECK-BE: lxsibzx 307; CHECK-BE-NEXT: vextsb2d 308; CHECK-BE-NEXT: xscvsxddp [[CONVD:[0-9]+]], 309; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0 310} 311 312; Function Attrs: norecurse nounwind readonly 313define <16 x i8> @vecucus(i16* nocapture readonly %ptr) { 314entry: 315 %0 = load i16, i16* %ptr, align 2 316 %conv = trunc i16 %0 to i8 317 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0 318 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 319 ret <16 x i8> %splat.splat 320; CHECK-LABEL: vecucus 321; CHECK: lxsibzx 34, 0, 3 322; CHECK-NEXT: vspltb 2, 2, 7 323; CHECK-BE-LABEL: vecucus 324; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1 325; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]] 326; CHECK-BE-NEXT: vspltb 2, 2, 7 327} 328 329; Function Attrs: norecurse nounwind readonly 330define <8 x i16> @vecusus(i16* nocapture readonly %ptr) { 331entry: 332 %0 = load i16, i16* %ptr, align 2 333 %splat.splatinsert = insertelement <8 x i16> undef, i16 %0, i32 0 334 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer 335 ret <8 x i16> %splat.splat 336; CHECK-LABEL: vecusus 337; CHECK: lxsihzx 34, 0, 3 338; CHECK-NEXT: vsplth 2, 2, 3 339; CHECK-BE-LABEL: vecusus 340; CHECK-BE: lxsihzx 34, 0, 3 341; CHECK-BE-NEXT: vsplth 2, 2, 3 342} 343 344; Function Attrs: norecurse nounwind readonly 345define <4 x i32> @vecuius(i16* nocapture readonly %ptr) { 346entry: 347 %0 = load i16, i16* %ptr, align 2 348 %conv = zext i16 %0 to i32 349 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 350 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 351 ret <4 x i32> %splat.splat 352; CHECK-LABEL: vecuius 353; CHECK: lxsihzx 0, 0, 3 354; CHECK-NEXT: xxspltw 34, 0, 1 355; CHECK-BE-LABEL: vecuius 356; CHECK-BE: lxsihzx 0, 0, 3 357; CHECK-BE-NEXT: xxspltw 34, 0, 1 358} 359 360; Function Attrs: norecurse nounwind readonly 361define <2 x i64> @veculus(i16* nocapture readonly %ptr) { 362entry: 363 %0 = load i16, i16* %ptr, align 2 364 %conv = zext i16 %0 to i64 365 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 366 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 367 ret <2 x i64> %splat.splat 368; CHECK-LABEL: veculus 369; CHECK: lxsihzx 0, 0, 3 370; CHECK-NEXT: xxspltd 34, 0, 0 371; CHECK-BE-LABEL: veculus 372; CHECK-BE: lxsihzx 0, 0, 3 373; CHECK-BE-NEXT: xxspltd 34, 0, 0 374} 375 376; Function Attrs: norecurse nounwind readonly 377define <16 x i8> @vecscus(i16* nocapture readonly %ptr) { 378entry: 379 %0 = load i16, i16* %ptr, align 2 380 %conv = trunc i16 %0 to i8 381 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0 382 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 383 ret <16 x i8> %splat.splat 384; CHECK-LABEL: vecscus 385; CHECK: lxsibzx 34, 0, 3 386; CHECK-NEXT: vspltb 2, 2, 7 387; CHECK-BE-LABEL: vecscus 388; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1 389; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]] 390; CHECK-BE-NEXT: vspltb 2, 2, 7 391} 392 393; Function Attrs: norecurse nounwind readonly 394define <8 x i16> @vecssus(i16* nocapture readonly %ptr) { 395entry: 396 %0 = load i16, i16* %ptr, align 2 397 %splat.splatinsert = insertelement <8 x i16> undef, i16 %0, i32 0 398 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer 399 ret <8 x i16> %splat.splat 400; CHECK-LABEL: vecssus 401; CHECK: lxsihzx 34, 0, 3 402; CHECK-NEXT: vsplth 2, 2, 3 403; CHECK-BE-LABEL: vecssus 404; CHECK-BE: lxsihzx 34, 0, 3 405; CHECK-BE-NEXT: vsplth 2, 2, 3 406} 407 408; Function Attrs: norecurse nounwind readonly 409define <4 x i32> @vecsius(i16* nocapture readonly %ptr) { 410entry: 411 %0 = load i16, i16* %ptr, align 2 412 %conv = zext i16 %0 to i32 413 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 414 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 415 ret <4 x i32> %splat.splat 416; CHECK-LABEL: vecsius 417; CHECK: lxsihzx 0, 0, 3 418; CHECK-NEXT: xxspltw 34, 0, 1 419; CHECK-BE-LABEL: vecsius 420; CHECK-BE: lxsihzx 0, 0, 3 421; CHECK-BE-NEXT: xxspltw 34, 0, 1 422} 423 424; Function Attrs: norecurse nounwind readonly 425define <2 x i64> @vecslus(i16* nocapture readonly %ptr) { 426entry: 427 %0 = load i16, i16* %ptr, align 2 428 %conv = zext i16 %0 to i64 429 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 430 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 431 ret <2 x i64> %splat.splat 432; CHECK-LABEL: vecslus 433; CHECK: lxsihzx 0, 0, 3 434; CHECK-NEXT: xxspltd 34, 0, 0 435; CHECK-BE-LABEL: vecslus 436; CHECK-BE: lxsihzx 0, 0, 3 437; CHECK-BE-NEXT: xxspltd 34, 0, 0 438} 439 440; Function Attrs: norecurse nounwind readonly 441define <4 x float> @vecfus(i16* nocapture readonly %ptr) { 442entry: 443 %0 = load i16, i16* %ptr, align 2 444 %conv = uitofp i16 %0 to float 445 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0 446 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 447 ret <4 x float> %splat.splat 448; CHECK-LABEL: vecfus 449; CHECK: lxsihzx [[LD:[0-9]+]], 0, 3 450; CHECK-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]] 451; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 452; CHECK-NEXT: xxspltw 34, [[CONVS]], 0 453; CHECK-BE-LABEL: vecfus 454; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3 455; CHECK-BE-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]] 456; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 457; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0 458} 459 460; Function Attrs: norecurse nounwind readonly 461define <2 x double> @vecdus(i16* nocapture readonly %ptr) { 462entry: 463 %0 = load i16, i16* %ptr, align 2 464 %conv = uitofp i16 %0 to double 465 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0 466 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 467 ret <2 x double> %splat.splat 468; CHECK-LABEL: vecdus 469; CHECK: lxsihzx [[LD:[0-9]+]], 0, 3 470; CHECK-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]] 471; CHECK-NEXT: xxspltd 34, [[CONVD]], 0 472; CHECK-BE-LABEL: vecdus 473; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3 474; CHECK-BE-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]] 475; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0 476} 477 478; Function Attrs: norecurse nounwind readonly 479define <16 x i8> @vecucss(i16* nocapture readonly %ptr) { 480entry: 481 %0 = load i16, i16* %ptr, align 2 482 %conv = trunc i16 %0 to i8 483 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0 484 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 485 ret <16 x i8> %splat.splat 486; CHECK-LABEL: vecucss 487; CHECK: lxsibzx 34, 0, 3 488; CHECK-NEXT: vspltb 2, 2, 7 489; CHECK-BE-LABEL: vecucss 490; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1 491; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]] 492; CHECK-BE-NEXT: vspltb 2, 2, 7 493} 494 495; Function Attrs: norecurse nounwind readonly 496define <4 x i32> @vecuiss(i16* nocapture readonly %ptr) { 497entry: 498 %0 = load i16, i16* %ptr, align 2 499 %conv = sext i16 %0 to i32 500 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 501 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 502 ret <4 x i32> %splat.splat 503; CHECK-LABEL: vecuiss 504; CHECK: lxsihzx 34, 0, 3 505; CHECK-NEXT: vextsh2w 2, 2 506; CHECK-NEXT: xxspltw 34, 34, 1 507; CHECK-BE-LABEL: vecuiss 508; CHECK-BE: lxsihzx 34, 0, 3 509; CHECK-BE-NEXT: vextsh2w 2, 2 510; CHECK-BE-NEXT: xxspltw 34, 34, 1 511} 512 513; Function Attrs: norecurse nounwind readonly 514define <2 x i64> @veculss(i16* nocapture readonly %ptr) { 515entry: 516 %0 = load i16, i16* %ptr, align 2 517 %conv = sext i16 %0 to i64 518 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 519 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 520 ret <2 x i64> %splat.splat 521; CHECK-LABEL: veculss 522; CHECK: lxsihzx 34, 0, 3 523; CHECK-NEXT: vextsh2d 2, 2 524; CHECK-NEXT: xxspltd 34, 34, 0 525; CHECK-BE-LABEL: veculss 526; CHECK-BE: lxsihzx 34, 0, 3 527; CHECK-BE-NEXT: vextsh2d 2, 2 528; CHECK-BE-NEXT: xxspltd 34, 34, 0 529} 530 531; Function Attrs: norecurse nounwind readonly 532define <16 x i8> @vecscss(i16* nocapture readonly %ptr) { 533entry: 534 %0 = load i16, i16* %ptr, align 2 535 %conv = trunc i16 %0 to i8 536 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0 537 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 538 ret <16 x i8> %splat.splat 539; CHECK-LABEL: vecscss 540; CHECK: lxsibzx 34, 0, 3 541; CHECK-NEXT: vspltb 2, 2, 7 542; CHECK-BE-LABEL: vecscss 543; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1 544; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]] 545; CHECK-BE-NEXT: vspltb 2, 2, 7 546} 547 548; Function Attrs: norecurse nounwind readonly 549define <4 x i32> @vecsiss(i16* nocapture readonly %ptr) { 550entry: 551 %0 = load i16, i16* %ptr, align 2 552 %conv = sext i16 %0 to i32 553 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0 554 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 555 ret <4 x i32> %splat.splat 556; CHECK-LABEL: vecsiss 557; CHECK: lxsihzx 34, 0, 3 558; CHECK-NEXT: vextsh2w 2, 2 559; CHECK-NEXT: xxspltw 34, 34, 1 560; CHECK-BE-LABEL: vecsiss 561; CHECK-BE: lxsihzx 34, 0, 3 562; CHECK-BE-NEXT: vextsh2w 2, 2 563; CHECK-BE-NEXT: xxspltw 34, 34, 1 564} 565 566; Function Attrs: norecurse nounwind readonly 567define <2 x i64> @vecslss(i16* nocapture readonly %ptr) { 568entry: 569 %0 = load i16, i16* %ptr, align 2 570 %conv = sext i16 %0 to i64 571 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 572 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 573 ret <2 x i64> %splat.splat 574; CHECK-LABEL: vecslss 575; CHECK: lxsihzx 34, 0, 3 576; CHECK-NEXT: vextsh2d 2, 2 577; CHECK-NEXT: xxspltd 34, 34, 0 578; CHECK-BE-LABEL: vecslss 579; CHECK-BE: lxsihzx 34, 0, 3 580; CHECK-BE-NEXT: vextsh2d 2, 2 581; CHECK-BE-NEXT: xxspltd 34, 34, 0 582} 583 584; Function Attrs: norecurse nounwind readonly 585define <4 x float> @vecfss(i16* nocapture readonly %ptr) { 586entry: 587 %0 = load i16, i16* %ptr, align 2 588 %conv = sitofp i16 %0 to float 589 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0 590 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 591 ret <4 x float> %splat.splat 592; CHECK-LABEL: vecfss 593; CHECK: lxsihzx 594; CHECK-NEXT: vextsh2d 595; CHECK-NEXT: xscvsxdsp [[CONVD:[0-9]+]], 596; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 597; CHECK-NEXT: xxspltw 34, [[CONVS]], 0 598; CHECK-BE-LABEL: vecfss 599; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3 600; CHECK-BE-NEXT: vextsh2d 601; CHECK-BE-NEXT: xscvsxdsp [[CONVD:[0-9]+]], 602; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]] 603; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0 604} 605 606; Function Attrs: norecurse nounwind readonly 607define <2 x double> @vecdss(i16* nocapture readonly %ptr) { 608entry: 609 %0 = load i16, i16* %ptr, align 2 610 %conv = sitofp i16 %0 to double 611 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0 612 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 613 ret <2 x double> %splat.splat 614; CHECK-LABEL: vecdss 615; CHECK: lxsihzx 616; CHECK-NEXT: vextsh2d 617; CHECK-NEXT: xscvsxddp [[CONVD:[0-9]+]], 618; CHECK-NEXT: xxspltd 34, [[CONVD]], 0 619; CHECK-BE-LABEL: vecdss 620; CHECK-BE: lxsihzx 621; CHECK-BE-NEXT: vextsh2d 622; CHECK-BE-NEXT: xscvsxddp [[CONVD:[0-9]+]], 623; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0 624} 625 626; Function Attrs: norecurse nounwind 627define void @storefsc(float %f, i8* nocapture %ptr) { 628entry: 629 %conv = fptosi float %f to i8 630 store i8 %conv, i8* %ptr, align 1 631 ret void 632; CHECK-LABEL: storefsc 633; CHECK: xscvdpsxws 0, 1 634; CHECK: stxsibx 0, 0, 4 635; CHECK-BE-LABEL: storefsc 636; CHECK-BE: xscvdpsxws 0, 1 637; CHECK-BE: stxsibx 0, 0, 4 638} 639 640; Function Attrs: norecurse nounwind 641define void @storedsc(double %d, i8* nocapture %ptr) { 642entry: 643 %conv = fptosi double %d to i8 644 store i8 %conv, i8* %ptr, align 1 645 ret void 646; CHECK-LABEL: storedsc 647; CHECK: xscvdpsxws 0, 1 648; CHECK: stxsibx 0, 0, 4 649; CHECK-BE-LABEL: storedsc 650; CHECK-BE: xscvdpsxws 0, 1 651; CHECK-BE: stxsibx 0, 0, 4 652} 653 654; Function Attrs: norecurse nounwind 655define void @storevcsc0(<16 x i8> %v, i8* nocapture %ptr) { 656entry: 657 %vecext = extractelement <16 x i8> %v, i32 0 658 store i8 %vecext, i8* %ptr, align 1 659 ret void 660; CHECK-LABEL: storevcsc0 661; CHECK: vsldoi 2, 2, 2, 8 662; CHECK-NEXT: stxsibx 34, 0, 5 663; CHECK-BE-LABEL: storevcsc0 664; CHECK-BE: vsldoi 2, 2, 2, 9 665; CHECK-BE-NEXT: stxsibx 34, 0, 5 666} 667 668; Function Attrs: norecurse nounwind 669define void @storevcsc1(<16 x i8> %v, i8* nocapture %ptr) { 670entry: 671 %vecext = extractelement <16 x i8> %v, i32 1 672 store i8 %vecext, i8* %ptr, align 1 673 ret void 674; CHECK-LABEL: storevcsc1 675; CHECK: vsldoi 2, 2, 2, 7 676; CHECK-NEXT: stxsibx 34, 0, 5 677; CHECK-BE-LABEL: storevcsc1 678; CHECK-BE: vsldoi 2, 2, 2, 10 679; CHECK-BE-NEXT: stxsibx 34, 0, 5 680} 681 682; Function Attrs: norecurse nounwind 683define void @storevcsc2(<16 x i8> %v, i8* nocapture %ptr) { 684entry: 685 %vecext = extractelement <16 x i8> %v, i32 2 686 store i8 %vecext, i8* %ptr, align 1 687 ret void 688; CHECK-LABEL: storevcsc2 689; CHECK: vsldoi 2, 2, 2, 6 690; CHECK-NEXT: stxsibx 34, 0, 5 691; CHECK-BE-LABEL: storevcsc2 692; CHECK-BE: vsldoi 2, 2, 2, 11 693; CHECK-BE-NEXT: stxsibx 34, 0, 5 694} 695 696; Function Attrs: norecurse nounwind 697define void @storevcsc3(<16 x i8> %v, i8* nocapture %ptr) { 698entry: 699 %vecext = extractelement <16 x i8> %v, i32 3 700 store i8 %vecext, i8* %ptr, align 1 701 ret void 702; CHECK-LABEL: storevcsc3 703; CHECK: vsldoi 2, 2, 2, 5 704; CHECK-NEXT: stxsibx 34, 0, 5 705; CHECK-BE-LABEL: storevcsc3 706; CHECK-BE: vsldoi 2, 2, 2, 12 707; CHECK-BE-NEXT: stxsibx 34, 0, 5 708} 709 710; Function Attrs: norecurse nounwind 711define void @storevcsc4(<16 x i8> %v, i8* nocapture %ptr) { 712entry: 713 %vecext = extractelement <16 x i8> %v, i32 4 714 store i8 %vecext, i8* %ptr, align 1 715 ret void 716; CHECK-LABEL: storevcsc4 717; CHECK: vsldoi 2, 2, 2, 4 718; CHECK-NEXT: stxsibx 34, 0, 5 719; CHECK-BE-LABEL: storevcsc4 720; CHECK-BE: vsldoi 2, 2, 2, 13 721; CHECK-BE-NEXT: stxsibx 34, 0, 5 722} 723 724; Function Attrs: norecurse nounwind 725define void @storevcsc5(<16 x i8> %v, i8* nocapture %ptr) { 726entry: 727 %vecext = extractelement <16 x i8> %v, i32 5 728 store i8 %vecext, i8* %ptr, align 1 729 ret void 730; CHECK-LABEL: storevcsc5 731; CHECK: vsldoi 2, 2, 2, 3 732; CHECK-NEXT: stxsibx 34, 0, 5 733; CHECK-BE-LABEL: storevcsc5 734; CHECK-BE: vsldoi 2, 2, 2, 14 735; CHECK-BE-NEXT: stxsibx 34, 0, 5 736} 737 738; Function Attrs: norecurse nounwind 739define void @storevcsc6(<16 x i8> %v, i8* nocapture %ptr) { 740entry: 741 %vecext = extractelement <16 x i8> %v, i32 6 742 store i8 %vecext, i8* %ptr, align 1 743 ret void 744; CHECK-LABEL: storevcsc6 745; CHECK: vsldoi 2, 2, 2, 2 746; CHECK-NEXT: stxsibx 34, 0, 5 747; CHECK-BE-LABEL: storevcsc6 748; CHECK-BE: vsldoi 2, 2, 2, 15 749; CHECK-BE-NEXT: stxsibx 34, 0, 5 750} 751 752; Function Attrs: norecurse nounwind 753define void @storevcsc7(<16 x i8> %v, i8* nocapture %ptr) { 754entry: 755 %vecext = extractelement <16 x i8> %v, i32 7 756 store i8 %vecext, i8* %ptr, align 1 757 ret void 758; CHECK-LABEL: storevcsc7 759; CHECK: vsldoi 2, 2, 2, 1 760; CHECK-NEXT: stxsibx 34, 0, 5 761; CHECK-BE-LABEL: storevcsc7 762; CHECK-BE: stxsibx 34, 0, 5 763} 764 765; Function Attrs: norecurse nounwind 766define void @storevcsc8(<16 x i8> %v, i8* nocapture %ptr) { 767entry: 768 %vecext = extractelement <16 x i8> %v, i32 8 769 store i8 %vecext, i8* %ptr, align 1 770 ret void 771; CHECK-LABEL: storevcsc8 772; CHECK: stxsibx 34, 0, 5 773; CHECK-BE-LABEL: storevcsc8 774; CHECK-BE: vsldoi 2, 2, 2, 1 775; CHECK-BE-NEXT: stxsibx 34, 0, 5 776} 777 778; Function Attrs: norecurse nounwind 779define void @storevcsc9(<16 x i8> %v, i8* nocapture %ptr) { 780entry: 781 %vecext = extractelement <16 x i8> %v, i32 9 782 store i8 %vecext, i8* %ptr, align 1 783 ret void 784; CHECK-LABEL: storevcsc9 785; CHECK: vsldoi 2, 2, 2, 15 786; CHECK-NEXT: stxsibx 34, 0, 5 787; CHECK-BE-LABEL: storevcsc9 788; CHECK-BE: vsldoi 2, 2, 2, 2 789; CHECK-BE-NEXT: stxsibx 34, 0, 5 790} 791 792; Function Attrs: norecurse nounwind 793define void @storevcsc10(<16 x i8> %v, i8* nocapture %ptr) { 794entry: 795 %vecext = extractelement <16 x i8> %v, i32 10 796 store i8 %vecext, i8* %ptr, align 1 797 ret void 798; CHECK-LABEL: storevcsc10 799; CHECK: vsldoi 2, 2, 2, 14 800; CHECK-NEXT: stxsibx 34, 0, 5 801; CHECK-BE-LABEL: storevcsc10 802; CHECK-BE: vsldoi 2, 2, 2, 3 803; CHECK-BE-NEXT: stxsibx 34, 0, 5 804} 805 806; Function Attrs: norecurse nounwind 807define void @storevcsc11(<16 x i8> %v, i8* nocapture %ptr) { 808entry: 809 %vecext = extractelement <16 x i8> %v, i32 11 810 store i8 %vecext, i8* %ptr, align 1 811 ret void 812; CHECK-LABEL: storevcsc11 813; CHECK: vsldoi 2, 2, 2, 13 814; CHECK-NEXT: stxsibx 34, 0, 5 815; CHECK-BE-LABEL: storevcsc11 816; CHECK-BE: vsldoi 2, 2, 2, 4 817; CHECK-BE-NEXT: stxsibx 34, 0, 5 818} 819 820; Function Attrs: norecurse nounwind 821define void @storevcsc12(<16 x i8> %v, i8* nocapture %ptr) { 822entry: 823 %vecext = extractelement <16 x i8> %v, i32 12 824 store i8 %vecext, i8* %ptr, align 1 825 ret void 826; CHECK-LABEL: storevcsc12 827; CHECK: vsldoi 2, 2, 2, 12 828; CHECK-NEXT: stxsibx 34, 0, 5 829; CHECK-BE-LABEL: storevcsc12 830; CHECK-BE: vsldoi 2, 2, 2, 5 831; CHECK-BE-NEXT: stxsibx 34, 0, 5 832} 833 834; Function Attrs: norecurse nounwind 835define void @storevcsc13(<16 x i8> %v, i8* nocapture %ptr) { 836entry: 837 %vecext = extractelement <16 x i8> %v, i32 13 838 store i8 %vecext, i8* %ptr, align 1 839 ret void 840; CHECK-LABEL: storevcsc13 841; CHECK: vsldoi 2, 2, 2, 11 842; CHECK-NEXT: stxsibx 34, 0, 5 843; CHECK-BE-LABEL: storevcsc13 844; CHECK-BE: vsldoi 2, 2, 2, 6 845; CHECK-BE-NEXT: stxsibx 34, 0, 5 846} 847 848; Function Attrs: norecurse nounwind 849define void @storevcsc14(<16 x i8> %v, i8* nocapture %ptr) { 850entry: 851 %vecext = extractelement <16 x i8> %v, i32 14 852 store i8 %vecext, i8* %ptr, align 1 853 ret void 854; CHECK-LABEL: storevcsc14 855; CHECK: vsldoi 2, 2, 2, 10 856; CHECK-NEXT: stxsibx 34, 0, 5 857; CHECK-BE-LABEL: storevcsc14 858; CHECK-BE: vsldoi 2, 2, 2, 7 859; CHECK-BE-NEXT: stxsibx 34, 0, 5 860} 861 862; Function Attrs: norecurse nounwind 863define void @storevcsc15(<16 x i8> %v, i8* nocapture %ptr) { 864entry: 865 %vecext = extractelement <16 x i8> %v, i32 15 866 store i8 %vecext, i8* %ptr, align 1 867 ret void 868; CHECK-LABEL: storevcsc15 869; CHECK: vsldoi 2, 2, 2, 9 870; CHECK-NEXT: stxsibx 34, 0, 5 871; CHECK-BE-LABEL: storevcsc15 872; CHECK-BE: vsldoi 2, 2, 2, 8 873; CHECK-BE-NEXT: stxsibx 34, 0, 5 874} 875 876; Function Attrs: norecurse nounwind 877define void @storefss(float %f, i16* nocapture %ptr) { 878entry: 879 %conv = fptosi float %f to i16 880 store i16 %conv, i16* %ptr, align 2 881 ret void 882; CHECK-LABEL: storefss 883; CHECK: xscvdpsxws 0, 1 884; CHECK: stxsihx 0, 0, 4 885; CHECK-BE-LABEL: storefss 886; CHECK-BE: xscvdpsxws 0, 1 887; CHECK-BE: stxsihx 0, 0, 4 888} 889 890; Function Attrs: norecurse nounwind 891define void @storedss(double %d, i16* nocapture %ptr) { 892entry: 893 %conv = fptosi double %d to i16 894 store i16 %conv, i16* %ptr, align 2 895 ret void 896; CHECK-LABEL: storedss 897; CHECK: xscvdpsxws 0, 1 898; CHECK: stxsihx 0, 0, 4 899; CHECK-BE-LABEL: storedss 900; CHECK-BE: xscvdpsxws 0, 1 901; CHECK-BE: stxsihx 0, 0, 4 902} 903 904; Function Attrs: norecurse nounwind 905define void @storevsss0(<8 x i16> %v, i16* nocapture %ptr) { 906entry: 907 %vecext = extractelement <8 x i16> %v, i32 0 908 store i16 %vecext, i16* %ptr, align 2 909 ret void 910; CHECK-LABEL: storevsss0 911; CHECK: vsldoi 2, 2, 2, 8 912; CHECK-NEXT: stxsihx 34, 0, 5 913; CHECK-BE-LABEL: storevsss0 914; CHECK-BE: vsldoi 2, 2, 2, 10 915; CHECK-BE-NEXT: stxsihx 34, 0, 5 916} 917 918; Function Attrs: norecurse nounwind 919define void @storevsss1(<8 x i16> %v, i16* nocapture %ptr) { 920entry: 921 %vecext = extractelement <8 x i16> %v, i32 1 922 store i16 %vecext, i16* %ptr, align 2 923 ret void 924; CHECK-LABEL: storevsss1 925; CHECK: vsldoi 2, 2, 2, 6 926; CHECK-NEXT: stxsihx 34, 0, 5 927; CHECK-BE-LABEL: storevsss1 928; CHECK-BE: vsldoi 2, 2, 2, 12 929; CHECK-BE-NEXT: stxsihx 34, 0, 5 930} 931 932; Function Attrs: norecurse nounwind 933define void @storevsss2(<8 x i16> %v, i16* nocapture %ptr) { 934entry: 935 %vecext = extractelement <8 x i16> %v, i32 2 936 store i16 %vecext, i16* %ptr, align 2 937 ret void 938; CHECK-LABEL: storevsss2 939; CHECK: vsldoi 2, 2, 2, 4 940; CHECK-NEXT: stxsihx 34, 0, 5 941; CHECK-BE-LABEL: storevsss2 942; CHECK-BE: vsldoi 2, 2, 2, 14 943; CHECK-BE-NEXT: stxsihx 34, 0, 5 944} 945 946; Function Attrs: norecurse nounwind 947define void @storevsss3(<8 x i16> %v, i16* nocapture %ptr) { 948entry: 949 %vecext = extractelement <8 x i16> %v, i32 3 950 store i16 %vecext, i16* %ptr, align 2 951 ret void 952; CHECK-LABEL: storevsss3 953; CHECK: vsldoi 2, 2, 2, 2 954; CHECK-NEXT: stxsihx 34, 0, 5 955; CHECK-BE-LABEL: storevsss3 956; CHECK-BE: stxsihx 34, 0, 5 957} 958 959; Function Attrs: norecurse nounwind 960define void @storevsss4(<8 x i16> %v, i16* nocapture %ptr) { 961entry: 962 %vecext = extractelement <8 x i16> %v, i32 4 963 store i16 %vecext, i16* %ptr, align 2 964 ret void 965; CHECK-LABEL: storevsss4 966; CHECK: stxsihx 34, 0, 5 967; CHECK-BE-LABEL: storevsss4 968; CHECK-BE: vsldoi 2, 2, 2, 2 969; CHECK-BE-NEXT: stxsihx 34, 0, 5 970} 971 972; Function Attrs: norecurse nounwind 973define void @storevsss5(<8 x i16> %v, i16* nocapture %ptr) { 974entry: 975 %vecext = extractelement <8 x i16> %v, i32 5 976 store i16 %vecext, i16* %ptr, align 2 977 ret void 978; CHECK-LABEL: storevsss5 979; CHECK: vsldoi 2, 2, 2, 14 980; CHECK-NEXT: stxsihx 34, 0, 5 981; CHECK-BE-LABEL: storevsss5 982; CHECK-BE: vsldoi 2, 2, 2, 4 983; CHECK-BE-NEXT: stxsihx 34, 0, 5 984} 985 986; Function Attrs: norecurse nounwind 987define void @storevsss6(<8 x i16> %v, i16* nocapture %ptr) { 988entry: 989 %vecext = extractelement <8 x i16> %v, i32 6 990 store i16 %vecext, i16* %ptr, align 2 991 ret void 992; CHECK-LABEL: storevsss6 993; CHECK: vsldoi 2, 2, 2, 12 994; CHECK-NEXT: stxsihx 34, 0, 5 995; CHECK-BE-LABEL: storevsss6 996; CHECK-BE: vsldoi 2, 2, 2, 6 997; CHECK-BE-NEXT: stxsihx 34, 0, 5 998} 999 1000; Function Attrs: norecurse nounwind 1001define void @storevsss7(<8 x i16> %v, i16* nocapture %ptr) { 1002entry: 1003 %vecext = extractelement <8 x i16> %v, i32 7 1004 store i16 %vecext, i16* %ptr, align 2 1005 ret void 1006; CHECK-LABEL: storevsss7 1007; CHECK: vsldoi 2, 2, 2, 10 1008; CHECK-NEXT: stxsihx 34, 0, 5 1009; CHECK-BE-LABEL: storevsss7 1010; CHECK-BE: vsldoi 2, 2, 2, 8 1011; CHECK-BE-NEXT: stxsihx 34, 0, 5 1012} 1013 1014; Function Attrs: norecurse nounwind readonly 1015define float @convscf(i8* nocapture readonly %ptr) { 1016entry: 1017 %0 = load i8, i8* %ptr, align 1 1018 %conv = sitofp i8 %0 to float 1019 ret float %conv 1020; CHECK-LABEL: convscf 1021; CHECK: lxsibzx 34, 0, 3 1022; CHECK-NEXT: vextsb2d 2, 2 1023; CHECK-NEXT: xscvsxdsp 1, 34 1024; CHECK-BE-LABEL: convscf 1025; CHECK-BE: lxsibzx 34, 0, 3 1026; CHECK-BE-NEXT: vextsb2d 2, 2 1027; CHECK-BE-NEXT: xscvsxdsp 1, 34 1028} 1029 1030; Function Attrs: norecurse nounwind readonly 1031define float @convucf(i8* nocapture readonly %ptr) { 1032entry: 1033 %0 = load i8, i8* %ptr, align 1 1034 %conv = uitofp i8 %0 to float 1035 ret float %conv 1036; CHECK-LABEL: convucf 1037; CHECK: lxsibzx 0, 0, 3 1038; CHECK-NEXT: xscvuxdsp 1, 0 1039; CHECK-BE-LABEL: convucf 1040; CHECK-BE: lxsibzx 0, 0, 3 1041; CHECK-BE-NEXT: xscvuxdsp 1, 0 1042} 1043 1044; Function Attrs: norecurse nounwind readonly 1045define double @convscd(i8* nocapture readonly %ptr) { 1046entry: 1047 %0 = load i8, i8* %ptr, align 1 1048 %conv = sitofp i8 %0 to double 1049; CHECK-LABEL: convscd 1050; CHECK: lxsibzx 34, 0, 3 1051; CHECK-NEXT: vextsb2d 2, 2 1052; CHECK-NEXT: xscvsxddp 1, 34 1053; CHECK-BE-LABEL: convscd 1054; CHECK-BE: lxsibzx 34, 0, 3 1055; CHECK-BE-NEXT: vextsb2d 2, 2 1056; CHECK-BE-NEXT: xscvsxddp 1, 34 1057 ret double %conv 1058} 1059 1060; Function Attrs: norecurse nounwind readonly 1061define double @convucd(i8* nocapture readonly %ptr) { 1062entry: 1063 %0 = load i8, i8* %ptr, align 1 1064 %conv = uitofp i8 %0 to double 1065 ret double %conv 1066; CHECK-LABEL: convucd 1067; CHECK: lxsibzx 0, 0, 3 1068; CHECK-NEXT: xscvuxddp 1, 0 1069; CHECK-BE-LABEL: convucd 1070; CHECK-BE: lxsibzx 0, 0, 3 1071; CHECK-BE-NEXT: xscvuxddp 1, 0 1072} 1073 1074; Function Attrs: norecurse nounwind readonly 1075define float @convssf(i16* nocapture readonly %ptr) { 1076entry: 1077 %0 = load i16, i16* %ptr, align 2 1078 %conv = sitofp i16 %0 to float 1079 ret float %conv 1080; CHECK-LABEL: convssf 1081; CHECK: lxsihzx 34, 0, 3 1082; CHECK-NEXT: vextsh2d 2, 2 1083; CHECK-NEXT: xscvsxdsp 1, 34 1084; CHECK-BE-LABEL: convssf 1085; CHECK-BE: lxsihzx 34, 0, 3 1086; CHECK-BE-NEXT: vextsh2d 2, 2 1087; CHECK-BE-NEXT: xscvsxdsp 1, 34 1088} 1089 1090; Function Attrs: norecurse nounwind readonly 1091define float @convusf(i16* nocapture readonly %ptr) { 1092entry: 1093 %0 = load i16, i16* %ptr, align 2 1094 %conv = uitofp i16 %0 to float 1095 ret float %conv 1096; CHECK-LABEL: convusf 1097; CHECK: lxsihzx 0, 0, 3 1098; CHECK-NEXT: xscvuxdsp 1, 0 1099; CHECK-BE-LABEL: convusf 1100; CHECK-BE: lxsihzx 0, 0, 3 1101; CHECK-BE-NEXT: xscvuxdsp 1, 0 1102} 1103 1104; Function Attrs: norecurse nounwind readonly 1105define double @convssd(i16* nocapture readonly %ptr) { 1106entry: 1107 %0 = load i16, i16* %ptr, align 2 1108 %conv = sitofp i16 %0 to double 1109 ret double %conv 1110; CHECK-LABEL: convssd 1111; CHECK: lxsihzx 34, 0, 3 1112; CHECK-NEXT: vextsh2d 2, 2 1113; CHECK-NEXT: xscvsxddp 1, 34 1114; CHECK-BE-LABEL: convssd 1115; CHECK-BE: lxsihzx 34, 0, 3 1116; CHECK-BE-NEXT: vextsh2d 2, 2 1117; CHECK-BE-NEXT: xscvsxddp 1, 34 1118} 1119 1120; Function Attrs: norecurse nounwind readonly 1121define double @convusd(i16* nocapture readonly %ptr) { 1122entry: 1123 %0 = load i16, i16* %ptr, align 2 1124 %conv = uitofp i16 %0 to double 1125 ret double %conv 1126; CHECK-LABEL: convusd 1127; CHECK: lxsihzx 0, 0, 3 1128; CHECK-NEXT: xscvuxddp 1, 0 1129; CHECK-BE-LABEL: convusd 1130; CHECK-BE: lxsihzx 0, 0, 3 1131; CHECK-BE-NEXT: xscvuxddp 1, 0 1132} 1133