1; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \ 2; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s 3 4; Function Attrs: nounwind 5; CHECK-LABEL: and_not 6; CHECK: xxlandc v2, v2, v3 7; CHECK-NEXT: blr 8define dso_local <4 x i32> @and_not(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 9entry: 10 %neg = xor <4 x i32> %B, <i32 -1, i32 -1, i32 -1, i32 -1> 11 %and = and <4 x i32> %neg, %A 12 ret <4 x i32> %and 13} 14 15; Function Attrs: nounwind 16; CHECK-LABEL: and_and8 17; CHECK: xxeval v2, v3, v2, v4, 1 18; CHECK-NEXT: blr 19define dso_local <16 x i8> @and_and8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) local_unnamed_addr #0 { 20entry: 21 %and = and <16 x i8> %B, %A 22 %and1 = and <16 x i8> %and, %C 23 ret <16 x i8> %and1 24} 25 26; Function Attrs: nounwind 27; CHECK-LABEL: and_and16 28; CHECK: xxeval v2, v3, v2, v4, 1 29; CHECK-NEXT: blr 30define dso_local <8 x i16> @and_and16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C) local_unnamed_addr #0 { 31entry: 32 %and = and <8 x i16> %B, %A 33 %and1 = and <8 x i16> %and, %C 34 ret <8 x i16> %and1 35} 36 37; Function Attrs: nounwind 38; CHECK-LABEL: and_and32 39; CHECK: xxeval v2, v3, v2, v4, 1 40; CHECK-NEXT: blr 41define dso_local <4 x i32> @and_and32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 42entry: 43 %and = and <4 x i32> %B, %A 44 %and1 = and <4 x i32> %and, %C 45 ret <4 x i32> %and1 46} 47 48; Function Attrs: nounwind 49; CHECK-LABEL: and_and64 50; CHECK: xxeval v2, v3, v2, v4, 1 51; CHECK-NEXT: blr 52define dso_local <2 x i64> @and_and64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C) local_unnamed_addr #0 { 53entry: 54 %and = and <2 x i64> %B, %A 55 %and1 = and <2 x i64> %and, %C 56 ret <2 x i64> %and1 57} 58 59; Function Attrs: nounwind 60; CHECK-LABEL: and_nand 61; CHECK: xxeval v2, v2, v4, v3, 14 62; CHECK-NEXT: blr 63define dso_local <4 x i32> @and_nand(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 64entry: 65 %and = and <4 x i32> %C, %B 66 %neg = xor <4 x i32> %and, <i32 -1, i32 -1, i32 -1, i32 -1> 67 %and1 = and <4 x i32> %neg, %A 68 ret <4 x i32> %and1 69} 70 71; Function Attrs: nounwind 72; CHECK-LABEL: and_or 73; CHECK: xxeval v2, v2, v4, v3, 7 74; CHECK-NEXT: blr 75define dso_local <4 x i32> @and_or(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 76entry: 77 %or = or <4 x i32> %C, %B 78 %and = and <4 x i32> %or, %A 79 ret <4 x i32> %and 80} 81 82; Function Attrs: nounwind 83; CHECK-LABEL: and_nor 84; CHECK: xxeval v2, v2, v4, v3, 8 85; CHECK-NEXT: blr 86define dso_local <4 x i32> @and_nor(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 87entry: 88 %or = or <4 x i32> %C, %B 89 %neg = xor <4 x i32> %or, <i32 -1, i32 -1, i32 -1, i32 -1> 90 %and = and <4 x i32> %neg, %A 91 ret <4 x i32> %and 92} 93 94; Function Attrs: nounwind 95; CHECK-LABEL: and_xor 96; CHECK: xxeval v2, v2, v4, v3, 6 97; CHECK-NEXT: blr 98define dso_local <4 x i32> @and_xor(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 99entry: 100 %xor = xor <4 x i32> %C, %B 101 %and = and <4 x i32> %xor, %A 102 ret <4 x i32> %and 103} 104 105; Function Attrs: nounwind 106; CHECK-LABEL: and_eqv 107; CHECK: xxeval v2, v2, v3, v4, 9 108; CHECK-NEXT: blr 109define dso_local <4 x i32> @and_eqv(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 110entry: 111 %xor = xor <4 x i32> %B, <i32 -1, i32 -1, i32 -1, i32 -1> 112 %neg = xor <4 x i32> %xor, %C 113 %and = and <4 x i32> %neg, %A 114 ret <4 x i32> %and 115} 116 117; Function Attrs: nounwind 118; CHECK-LABEL: nand_nand 119; CHECK: xxeval v2, v2, v4, v3, 241 120; CHECK-NEXT: blr 121define dso_local <4 x i32> @nand_nand(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 122entry: 123 %and = and <4 x i32> %C, %B 124 %A.not = xor <4 x i32> %A, <i32 -1, i32 -1, i32 -1, i32 -1> 125 %neg2 = or <4 x i32> %and, %A.not 126 ret <4 x i32> %neg2 127} 128 129; Function Attrs: nounwind 130; CHECK-LABEL: nand_and 131; CHECK: xxeval v2, v3, v2, v4, 254 132; CHECK-NEXT: blr 133define dso_local <4 x i32> @nand_and(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 134entry: 135 %and = and <4 x i32> %B, %A 136 %and1 = and <4 x i32> %and, %C 137 %neg = xor <4 x i32> %and1, <i32 -1, i32 -1, i32 -1, i32 -1> 138 ret <4 x i32> %neg 139} 140 141; Function Attrs: nounwind 142; CHECK-LABEL: nand_xor 143; CHECK: xxeval v2, v2, v4, v3, 249 144; CHECK-NEXT: blr 145define dso_local <4 x i32> @nand_xor(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 146entry: 147 %xor = xor <4 x i32> %C, %B 148 %and = and <4 x i32> %xor, %A 149 %neg = xor <4 x i32> %and, <i32 -1, i32 -1, i32 -1, i32 -1> 150 ret <4 x i32> %neg 151} 152 153; Function Attrs: nounwind 154; CHECK-LABEL: nand_eqv 155; CHECK: xxeval v2, v2, v4, v3, 246 156; CHECK-NEXT: blr 157define dso_local <4 x i32> @nand_eqv(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 158entry: 159 %xor = xor <4 x i32> %C, %B 160 %A.not = xor <4 x i32> %A, <i32 -1, i32 -1, i32 -1, i32 -1> 161 %neg1 = or <4 x i32> %xor, %A.not 162 ret <4 x i32> %neg1 163} 164 165; Function Attrs: nounwind 166; CHECK-LABEL: nand_or 167; CHECK: xxeval v2, v2, v4, v3, 248 168; CHECK-NEXT: blr 169define dso_local <4 x i32> @nand_or(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 170entry: 171 %or = or <4 x i32> %C, %B 172 %and = and <4 x i32> %or, %A 173 %neg = xor <4 x i32> %and, <i32 -1, i32 -1, i32 -1, i32 -1> 174 ret <4 x i32> %neg 175} 176 177; Function Attrs: nounwind 178; CHECK-LABEL: nand_nor 179; CHECK: xxeval v2, v2, v3, v4, 247 180; CHECK-NEXT: blr 181define dso_local <4 x i32> @nand_nor(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) local_unnamed_addr #0 { 182entry: 183 %A.not = xor <4 x i32> %A, <i32 -1, i32 -1, i32 -1, i32 -1> 184 %or = or <4 x i32> %A.not, %B 185 %neg1 = or <4 x i32> %or, %C 186 ret <4 x i32> %neg1 187} 188 189attributes #0 = { nounwind } 190