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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+f,+d < %s | FileCheck %s
3
4; Check the GHC call convention works (rv64)
5
6@base  = external global i64 ; assigned to register: s1
7@sp    = external global i64 ; assigned to register: s2
8@hp    = external global i64 ; assigned to register: s3
9@r1    = external global i64 ; assigned to register: s4
10@r2    = external global i64 ; assigned to register: s5
11@r3    = external global i64 ; assigned to register: s6
12@r4    = external global i64 ; assigned to register: s7
13@r5    = external global i64 ; assigned to register: s8
14@r6    = external global i64 ; assigned to register: s9
15@r7    = external global i64 ; assigned to register: s10
16@splim = external global i64 ; assigned to register: s11
17
18@f1 = external global float  ; assigned to register: fs0
19@f2 = external global float  ; assigned to register: fs1
20@f3 = external global float  ; assigned to register: fs2
21@f4 = external global float  ; assigned to register: fs3
22@f5 = external global float  ; assigned to register: fs4
23@f6 = external global float  ; assigned to register: fs5
24
25@d1 = external global double ; assigned to register: fs6
26@d2 = external global double ; assigned to register: fs7
27@d3 = external global double ; assigned to register: fs8
28@d4 = external global double ; assigned to register: fs9
29@d5 = external global double ; assigned to register: fs10
30@d6 = external global double ; assigned to register: fs11
31
32define ghccc void @foo() nounwind {
33; CHECK-LABEL: foo:
34; CHECK:       # %bb.0: # %entry
35; CHECK-NEXT:    lui a0, %hi(d6)
36; CHECK-NEXT:    fld fs11, %lo(d6)(a0)
37; CHECK-NEXT:    lui a0, %hi(d5)
38; CHECK-NEXT:    fld fs10, %lo(d5)(a0)
39; CHECK-NEXT:    lui a0, %hi(d4)
40; CHECK-NEXT:    fld fs9, %lo(d4)(a0)
41; CHECK-NEXT:    lui a0, %hi(d3)
42; CHECK-NEXT:    fld fs8, %lo(d3)(a0)
43; CHECK-NEXT:    lui a0, %hi(d2)
44; CHECK-NEXT:    fld fs7, %lo(d2)(a0)
45; CHECK-NEXT:    lui a0, %hi(d1)
46; CHECK-NEXT:    fld fs6, %lo(d1)(a0)
47; CHECK-NEXT:    lui a0, %hi(f6)
48; CHECK-NEXT:    flw fs5, %lo(f6)(a0)
49; CHECK-NEXT:    lui a0, %hi(f5)
50; CHECK-NEXT:    flw fs4, %lo(f5)(a0)
51; CHECK-NEXT:    lui a0, %hi(f4)
52; CHECK-NEXT:    flw fs3, %lo(f4)(a0)
53; CHECK-NEXT:    lui a0, %hi(f3)
54; CHECK-NEXT:    flw fs2, %lo(f3)(a0)
55; CHECK-NEXT:    lui a0, %hi(f2)
56; CHECK-NEXT:    flw fs1, %lo(f2)(a0)
57; CHECK-NEXT:    lui a0, %hi(f1)
58; CHECK-NEXT:    flw fs0, %lo(f1)(a0)
59; CHECK-NEXT:    lui a0, %hi(splim)
60; CHECK-NEXT:    ld s11, %lo(splim)(a0)
61; CHECK-NEXT:    lui a0, %hi(r7)
62; CHECK-NEXT:    ld s10, %lo(r7)(a0)
63; CHECK-NEXT:    lui a0, %hi(r6)
64; CHECK-NEXT:    ld s9, %lo(r6)(a0)
65; CHECK-NEXT:    lui a0, %hi(r5)
66; CHECK-NEXT:    ld s8, %lo(r5)(a0)
67; CHECK-NEXT:    lui a0, %hi(r4)
68; CHECK-NEXT:    ld s7, %lo(r4)(a0)
69; CHECK-NEXT:    lui a0, %hi(r3)
70; CHECK-NEXT:    ld s6, %lo(r3)(a0)
71; CHECK-NEXT:    lui a0, %hi(r2)
72; CHECK-NEXT:    ld s5, %lo(r2)(a0)
73; CHECK-NEXT:    lui a0, %hi(r1)
74; CHECK-NEXT:    ld s4, %lo(r1)(a0)
75; CHECK-NEXT:    lui a0, %hi(hp)
76; CHECK-NEXT:    ld s3, %lo(hp)(a0)
77; CHECK-NEXT:    lui a0, %hi(sp)
78; CHECK-NEXT:    ld s2, %lo(sp)(a0)
79; CHECK-NEXT:    lui a0, %hi(base)
80; CHECK-NEXT:    ld s1, %lo(base)(a0)
81; CHECK-NEXT:    tail bar
82entry:
83  %0  = load double, double* @d6
84  %1  = load double, double* @d5
85  %2  = load double, double* @d4
86  %3  = load double, double* @d3
87  %4  = load double, double* @d2
88  %5  = load double, double* @d1
89  %6  = load float, float* @f6
90  %7  = load float, float* @f5
91  %8  = load float, float* @f4
92  %9  = load float, float* @f3
93  %10 = load float, float* @f2
94  %11 = load float, float* @f1
95  %12 = load i64, i64* @splim
96  %13 = load i64, i64* @r7
97  %14 = load i64, i64* @r6
98  %15 = load i64, i64* @r5
99  %16 = load i64, i64* @r4
100  %17 = load i64, i64* @r3
101  %18 = load i64, i64* @r2
102  %19 = load i64, i64* @r1
103  %20 = load i64, i64* @hp
104  %21 = load i64, i64* @sp
105  %22 = load i64, i64* @base
106  tail call ghccc void @bar(i64 %22, i64 %21, i64 %20, i64 %19, i64 %18, i64 %17, i64 %16, i64 %15, i64 %14, i64 %13, i64 %12,
107                            float %11, float %10, float %9, float %8, float %7, float %6,
108                            double %5, double %4, double %3, double %2, double %1, double %0) nounwind
109  ret void
110}
111
112declare ghccc void @bar(i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64,
113                        float, float, float, float, float, float,
114                        double, double, double, double, double, double)
115