1; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 2; RUN: | FileCheck -check-prefix=RV32I %s 3; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 4; RUN: | FileCheck -check-prefix=RV64I %s 5; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \ 6; RUN: | FileCheck -check-prefix=RV32I %s 7; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \ 8; RUN: | FileCheck -check-prefix=RV64I %s 9; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \ 10; RUN: | FileCheck -check-prefix=RV32I %s 11; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \ 12; RUN: | FileCheck -check-prefix=RV64I %s 13; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32f -verify-machineinstrs < %s \ 14; RUN: | FileCheck -check-prefix=RV32IF %s 15; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs < %s \ 16; RUN: | FileCheck -check-prefix=RV64IF %s 17; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs < %s \ 18; RUN: | FileCheck -check-prefix=RV32ID %s 19; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d -verify-machineinstrs < %s \ 20; RUN: | FileCheck -check-prefix=RV64ID %s 21 22 23define void @testcase() nounwind { 24; RV32I-LABEL: testcase: 25; RV32I: sw s1, {{[0-9]+}}(sp) 26; RV32I-NEXT: sw s2, {{[0-9]+}}(sp) 27; RV32I-NOT: fsw fs0, {{[0-9]+}}(sp) 28; RV32I-NOT: fsd fs0, {{[0-9]+}}(sp) 29; 30; RV64I-LABEL: testcase: 31; RV64I: sd s1, {{[0-9]+}}(sp) 32; RV64I-NEXT: sd s2, {{[0-9]+}}(sp) 33; RV64I-NOT: fsw fs0, {{[0-9]+}}(sp) 34; RV64I-NOT: fsd fs0, {{[0-9]+}}(sp) 35; 36; RV32IF-LABEL: testcase: 37; RV32IF: sw s1, {{[0-9]+}}(sp) 38; RV32IF-NEXT: sw s2, {{[0-9]+}}(sp) 39; RV32IF-NEXT: fsw fs0, {{[0-9]+}}(sp) 40; RV32IF-NEXT: fsw fs1, {{[0-9]+}}(sp) 41; 42; RV64IF-LABEL: testcase: 43; RV64IF: sd s1, {{[0-9]+}}(sp) 44; RV64IF-NEXT: sd s2, {{[0-9]+}}(sp) 45; RV64IF-NEXT: fsw fs0, {{[0-9]+}}(sp) 46; RV64IF-NEXT: fsw fs1, {{[0-9]+}}(sp) 47; 48; RV32ID-LABEL: testcase: 49; RV32ID: sw s1, {{[0-9]+}}(sp) 50; RV32ID-NEXT: sw s2, {{[0-9]+}}(sp) 51; RV32ID-NEXT: fsd fs0, {{[0-9]+}}(sp) 52; RV32ID-NEXT: fsd fs1, {{[0-9]+}}(sp) 53; 54; RV64ID-LABEL: testcase: 55; RV64ID: sd s1, {{[0-9]+}}(sp) 56; RV64ID-NEXT: sd s2, {{[0-9]+}}(sp) 57; RV64ID-NEXT: fsd fs0, {{[0-9]+}}(sp) 58; RV64ID-NEXT: fsd fs1, {{[0-9]+}}(sp) 59 tail call void asm sideeffect "", "~{f8},~{f9},~{x9},~{x18}"() 60 ret void 61} 62