1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s 4; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \ 5; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s 6; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \ 7; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s 8; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \ 9; RUN: -verify-machineinstrs < %s \ 10; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s 11; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \ 12; RUN: -verify-machineinstrs < %s \ 13; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s 14; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 15; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s 16; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \ 17; RUN: -verify-machineinstrs < %s \ 18; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s 19; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \ 20; RUN: -verify-machineinstrs < %s \ 21; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s 22; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \ 23; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s 24 25; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for 26; lp64/lp64f/lp64d. Different CHECK lines are required for RV32D due to slight 27; codegen differences due to the way the f64 load operations are lowered. 28; The nounwind attribute is omitted for some of the tests, to check that CFI 29; directives are correctly generated. 30 31declare void @llvm.va_start(i8*) 32declare void @llvm.va_end(i8*) 33 34declare void @notdead(i8*) 35 36; Although frontends are recommended to not generate va_arg due to the lack of 37; support for aggregate types, we test simple cases here to ensure they are 38; lowered correctly 39 40define i32 @va1(i8* %fmt, ...) { 41; ILP32-ILP32F-FPELIM-LABEL: va1: 42; ILP32-ILP32F-FPELIM: # %bb.0: 43; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 44; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 48 45; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1 46; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 47; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 48; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 49; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 50; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 51; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 52; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 53; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24 54; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp) 55; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 56; ILP32-ILP32F-FPELIM-NEXT: ret 57; 58; ILP32-ILP32F-WITHFP-LABEL: va1: 59; ILP32-ILP32F-WITHFP: # %bb.0: 60; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 61; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 48 62; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 63; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 64; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36 65; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40 66; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 67; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32 68; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1 69; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 70; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 71; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 72; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 73; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 74; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 75; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 76; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 77; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) 78; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 79; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 80; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 81; ILP32-ILP32F-WITHFP-NEXT: ret 82; 83; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1: 84; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 85; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 86; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 48 87; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 88; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 89; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 90; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 91; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 92; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 93; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 94; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 95; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24 96; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp) 97; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 98; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 99; 100; LP64-LP64F-LP64D-FPELIM-LABEL: va1: 101; LP64-LP64F-LP64D-FPELIM: # %bb.0: 102; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80 103; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 80 104; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp) 105; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp) 106; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp) 107; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp) 108; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp) 109; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp) 110; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp) 111; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24 112; LP64-LP64F-LP64D-FPELIM-NEXT: ori a0, a0, 4 113; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 114; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 24(sp) 115; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80 116; LP64-LP64F-LP64D-FPELIM-NEXT: ret 117; 118; LP64-LP64F-LP64D-WITHFP-LABEL: va1: 119; LP64-LP64F-LP64D-WITHFP: # %bb.0: 120; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 121; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 96 122; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 123; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 124; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72 125; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80 126; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 127; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64 128; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 129; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 130; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 131; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 132; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 133; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 134; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 135; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8 136; LP64-LP64F-LP64D-WITHFP-NEXT: ori a0, a0, 4 137; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0) 138; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0) 139; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 140; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 141; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 142; LP64-LP64F-LP64D-WITHFP-NEXT: ret 143 %va = alloca i8*, align 4 144 %1 = bitcast i8** %va to i8* 145 call void @llvm.va_start(i8* %1) 146 %argp.cur = load i8*, i8** %va, align 4 147 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4 148 store i8* %argp.next, i8** %va, align 4 149 %2 = bitcast i8* %argp.cur to i32* 150 %3 = load i32, i32* %2, align 4 151 call void @llvm.va_end(i8* %1) 152 ret i32 %3 153} 154 155define i32 @va1_va_arg(i8* %fmt, ...) nounwind { 156; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg: 157; ILP32-ILP32F-FPELIM: # %bb.0: 158; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 159; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1 160; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 161; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 162; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 163; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 164; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 165; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 166; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 167; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24 168; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp) 169; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 170; ILP32-ILP32F-FPELIM-NEXT: ret 171; 172; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg: 173; ILP32-ILP32F-WITHFP: # %bb.0: 174; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 175; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 176; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 177; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 178; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1 179; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 180; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 181; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 182; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 183; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 184; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 185; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 186; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 187; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) 188; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 189; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 190; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 191; ILP32-ILP32F-WITHFP-NEXT: ret 192; 193; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg: 194; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 195; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 196; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 197; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 198; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 199; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 200; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 201; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 202; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 203; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 204; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24 205; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp) 206; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 207; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 208; 209; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg: 210; LP64-LP64F-LP64D-FPELIM: # %bb.0: 211; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80 212; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1 213; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp) 214; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp) 215; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp) 216; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp) 217; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp) 218; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp) 219; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp) 220; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24 221; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8 222; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp) 223; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80 224; LP64-LP64F-LP64D-FPELIM-NEXT: ret 225; 226; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg: 227; LP64-LP64F-LP64D-WITHFP: # %bb.0: 228; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 229; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 230; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 231; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 232; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1 233; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 234; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 235; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 236; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 237; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 238; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 239; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 240; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8 241; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8 242; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) 243; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 244; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 245; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 246; LP64-LP64F-LP64D-WITHFP-NEXT: ret 247 %va = alloca i8*, align 4 248 %1 = bitcast i8** %va to i8* 249 call void @llvm.va_start(i8* %1) 250 %2 = va_arg i8** %va, i32 251 call void @llvm.va_end(i8* %1) 252 ret i32 %2 253} 254 255; Ensure the adjustment when restoring the stack pointer using the frame 256; pointer is correct 257define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind { 258; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg_alloca: 259; ILP32-ILP32F-FPELIM: # %bb.0: 260; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 261; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) 262; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) 263; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp) 264; ILP32-ILP32F-FPELIM-NEXT: addi s0, sp, 16 265; ILP32-ILP32F-FPELIM-NEXT: mv s1, a1 266; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(s0) 267; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(s0) 268; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(s0) 269; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(s0) 270; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(s0) 271; ILP32-ILP32F-FPELIM-NEXT: sw a2, 8(s0) 272; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(s0) 273; ILP32-ILP32F-FPELIM-NEXT: addi a0, s0, 8 274; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0) 275; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15 276; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16 277; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0 278; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0 279; ILP32-ILP32F-FPELIM-NEXT: call notdead 280; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1 281; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16 282; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) 283; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) 284; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) 285; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 286; ILP32-ILP32F-FPELIM-NEXT: ret 287; 288; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca: 289; ILP32-ILP32F-WITHFP: # %bb.0: 290; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 291; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 292; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 293; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp) 294; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 295; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1 296; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 297; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 298; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 299; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 300; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 301; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 302; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 303; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8 304; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0) 305; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15 306; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16 307; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0 308; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0 309; ILP32-ILP32F-WITHFP-NEXT: call notdead 310; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1 311; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16 312; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) 313; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 314; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 315; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 316; ILP32-ILP32F-WITHFP-NEXT: ret 317; 318; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca: 319; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 320; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 321; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) 322; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) 323; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp) 324; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi s0, sp, 16 325; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s1, a1 326; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(s0) 327; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(s0) 328; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(s0) 329; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(s0) 330; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(s0) 331; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 8(s0) 332; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(s0) 333; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, s0, 8 334; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0) 335; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15 336; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16 337; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0 338; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0 339; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead 340; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1 341; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16 342; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) 343; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) 344; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) 345; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 346; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 347; 348; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca: 349; LP64-LP64F-LP64D-FPELIM: # %bb.0: 350; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96 351; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) 352; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) 353; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp) 354; LP64-LP64F-LP64D-FPELIM-NEXT: addi s0, sp, 32 355; LP64-LP64F-LP64D-FPELIM-NEXT: mv s1, a1 356; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(s0) 357; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(s0) 358; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(s0) 359; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(s0) 360; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(s0) 361; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(s0) 362; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(s0) 363; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, s0, 8 364; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 8 365; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, -32(s0) 366; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a1, 32 367; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32 368; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15 369; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1 370; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 33 371; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -16 372; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1 373; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0 374; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0 375; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead 376; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1 377; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32 378; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) 379; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) 380; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) 381; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96 382; LP64-LP64F-LP64D-FPELIM-NEXT: ret 383; 384; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca: 385; LP64-LP64F-LP64D-WITHFP: # %bb.0: 386; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 387; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 388; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 389; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp) 390; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 391; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1 392; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 393; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 394; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 395; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 396; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 397; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 398; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 399; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8 400; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 8 401; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0) 402; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a1, 32 403; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32 404; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15 405; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1 406; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 33 407; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -16 408; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1 409; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0 410; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0 411; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead 412; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1 413; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32 414; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) 415; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 416; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 417; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 418; LP64-LP64F-LP64D-WITHFP-NEXT: ret 419 %va = alloca i8*, align 4 420 %1 = bitcast i8** %va to i8* 421 call void @llvm.va_start(i8* %1) 422 %2 = va_arg i8** %va, i32 423 %3 = alloca i8, i32 %2 424 call void @notdead(i8* %3) 425 call void @llvm.va_end(i8* %1) 426 ret i32 %2 427} 428 429define void @va1_caller() nounwind { 430; Pass a double, as a float would be promoted by a C/C++ frontend 431; ILP32-ILP32F-FPELIM-LABEL: va1_caller: 432; ILP32-ILP32F-FPELIM: # %bb.0: 433; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16 434; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) 435; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888 436; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 2 437; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero 438; ILP32-ILP32F-FPELIM-NEXT: call va1 439; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) 440; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16 441; ILP32-ILP32F-FPELIM-NEXT: ret 442; 443; ILP32-ILP32F-WITHFP-LABEL: va1_caller: 444; ILP32-ILP32F-WITHFP: # %bb.0: 445; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16 446; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 447; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 448; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 449; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888 450; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 2 451; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero 452; ILP32-ILP32F-WITHFP-NEXT: call va1 453; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 454; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 455; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 456; ILP32-ILP32F-WITHFP-NEXT: ret 457; 458; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller: 459; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 460; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 461; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) 462; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888 463; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 2 464; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero 465; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va1 466; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) 467; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16 468; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 469; 470; LP64-LP64F-LP64D-FPELIM-LABEL: va1_caller: 471; LP64-LP64F-LP64D-FPELIM: # %bb.0: 472; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16 473; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) 474; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023 475; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52 476; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 2 477; LP64-LP64F-LP64D-FPELIM-NEXT: call va1 478; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) 479; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16 480; LP64-LP64F-LP64D-FPELIM-NEXT: ret 481; 482; LP64-LP64F-LP64D-WITHFP-LABEL: va1_caller: 483; LP64-LP64F-LP64D-WITHFP: # %bb.0: 484; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16 485; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) 486; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) 487; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 488; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023 489; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52 490; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 2 491; LP64-LP64F-LP64D-WITHFP-NEXT: call va1 492; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) 493; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) 494; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 495; LP64-LP64F-LP64D-WITHFP-NEXT: ret 496 %1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2) 497 ret void 498} 499 500; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned" 501; register pair (where the first register is even-numbered). 502 503define i64 @va2(i8 *%fmt, ...) nounwind { 504; ILP32-ILP32F-FPELIM-LABEL: va2: 505; ILP32-ILP32F-FPELIM: # %bb.0: 506; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 507; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 508; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 509; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 510; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 511; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 512; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 513; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 514; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27 515; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8 516; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 35 517; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp) 518; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1) 519; ILP32-ILP32F-FPELIM-NEXT: ori a1, a1, 4 520; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a1) 521; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 522; ILP32-ILP32F-FPELIM-NEXT: ret 523; 524; ILP32-ILP32F-WITHFP-LABEL: va2: 525; ILP32-ILP32F-WITHFP: # %bb.0: 526; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 527; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 528; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 529; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 530; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 531; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 532; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 533; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 534; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 535; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 536; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 537; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 538; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8 539; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 19 540; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0) 541; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1) 542; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4 543; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1) 544; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 545; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 546; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 547; ILP32-ILP32F-WITHFP-NEXT: ret 548; 549; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2: 550; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 551; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 552; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 553; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 554; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 555; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 556; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 557; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 558; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 559; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27 560; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a1, a0, -8 561; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35 562; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp) 563; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a1) 564; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a1, a1, 4 565; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a1) 566; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 567; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 568; 569; LP64-LP64F-LP64D-FPELIM-LABEL: va2: 570; LP64-LP64F-LP64D-FPELIM: # %bb.0: 571; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80 572; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp) 573; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp) 574; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp) 575; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp) 576; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp) 577; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp) 578; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp) 579; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24 580; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 581; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp) 582; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7 583; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32 584; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32 585; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8 586; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp) 587; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1 588; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 32 589; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -8 590; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1 591; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0) 592; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80 593; LP64-LP64F-LP64D-FPELIM-NEXT: ret 594; 595; LP64-LP64F-LP64D-WITHFP-LABEL: va2: 596; LP64-LP64F-LP64D-WITHFP: # %bb.0: 597; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 598; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 599; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 600; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 601; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 602; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 603; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 604; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 605; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 606; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 607; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 608; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8 609; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0) 610; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0) 611; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7 612; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32 613; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32 614; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8 615; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) 616; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1 617; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32 618; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8 619; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1 620; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) 621; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 622; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 623; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 624; LP64-LP64F-LP64D-WITHFP-NEXT: ret 625 %va = alloca i8*, align 4 626 %1 = bitcast i8** %va to i8* 627 call void @llvm.va_start(i8* %1) 628 %2 = bitcast i8** %va to i32* 629 %argp.cur = load i32, i32* %2, align 4 630 %3 = add i32 %argp.cur, 7 631 %4 = and i32 %3, -8 632 %argp.cur.aligned = inttoptr i32 %3 to i8* 633 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8 634 store i8* %argp.next, i8** %va, align 4 635 %5 = inttoptr i32 %4 to double* 636 %6 = load double, double* %5, align 8 637 %7 = bitcast double %6 to i64 638 call void @llvm.va_end(i8* %1) 639 ret i64 %7 640} 641 642define i64 @va2_va_arg(i8 *%fmt, ...) nounwind { 643; ILP32-ILP32F-FPELIM-LABEL: va2_va_arg: 644; ILP32-ILP32F-FPELIM: # %bb.0: 645; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 646; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 647; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 648; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 649; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 650; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 651; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 652; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 653; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27 654; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8 655; ILP32-ILP32F-FPELIM-NEXT: ori a2, a1, 4 656; ILP32-ILP32F-FPELIM-NEXT: sw a2, 12(sp) 657; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1) 658; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 8 659; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp) 660; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a2) 661; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 662; ILP32-ILP32F-FPELIM-NEXT: ret 663; 664; ILP32-ILP32F-WITHFP-LABEL: va2_va_arg: 665; ILP32-ILP32F-WITHFP: # %bb.0: 666; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 667; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 668; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 669; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 670; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 671; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 672; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 673; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 674; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 675; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 676; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 677; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 678; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8 679; ILP32-ILP32F-WITHFP-NEXT: ori a2, a1, 4 680; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0) 681; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1) 682; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, 8 683; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) 684; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a2) 685; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 686; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 687; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 688; ILP32-ILP32F-WITHFP-NEXT: ret 689; 690; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg: 691; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 692; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 693; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 694; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 695; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 696; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 697; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 698; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 699; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 700; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27 701; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8 702; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 8 703; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp) 704; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0) 705; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 0(sp) 706; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(sp) 707; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 4(sp) 708; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 709; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 710; 711; LP64-LP64F-LP64D-FPELIM-LABEL: va2_va_arg: 712; LP64-LP64F-LP64D-FPELIM: # %bb.0: 713; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80 714; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1 715; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp) 716; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp) 717; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp) 718; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp) 719; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp) 720; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp) 721; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp) 722; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24 723; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8 724; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp) 725; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80 726; LP64-LP64F-LP64D-FPELIM-NEXT: ret 727; 728; LP64-LP64F-LP64D-WITHFP-LABEL: va2_va_arg: 729; LP64-LP64F-LP64D-WITHFP: # %bb.0: 730; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 731; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 732; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 733; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 734; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1 735; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 736; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 737; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 738; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 739; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 740; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 741; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 742; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8 743; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8 744; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) 745; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 746; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 747; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 748; LP64-LP64F-LP64D-WITHFP-NEXT: ret 749 %va = alloca i8*, align 4 750 %1 = bitcast i8** %va to i8* 751 call void @llvm.va_start(i8* %1) 752 %2 = va_arg i8** %va, double 753 call void @llvm.va_end(i8* %1) 754 %3 = bitcast double %2 to i64 755 ret i64 %3 756} 757 758define void @va2_caller() nounwind { 759; ILP32-ILP32F-FPELIM-LABEL: va2_caller: 760; ILP32-ILP32F-FPELIM: # %bb.0: 761; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16 762; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) 763; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888 764; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero 765; ILP32-ILP32F-FPELIM-NEXT: call va2 766; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) 767; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16 768; ILP32-ILP32F-FPELIM-NEXT: ret 769; 770; ILP32-ILP32F-WITHFP-LABEL: va2_caller: 771; ILP32-ILP32F-WITHFP: # %bb.0: 772; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16 773; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 774; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 775; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 776; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888 777; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero 778; ILP32-ILP32F-WITHFP-NEXT: call va2 779; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 780; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 781; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 782; ILP32-ILP32F-WITHFP-NEXT: ret 783; 784; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller: 785; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 786; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 787; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) 788; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888 789; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero 790; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va2 791; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) 792; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16 793; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 794; 795; LP64-LP64F-LP64D-FPELIM-LABEL: va2_caller: 796; LP64-LP64F-LP64D-FPELIM: # %bb.0: 797; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16 798; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) 799; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023 800; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52 801; LP64-LP64F-LP64D-FPELIM-NEXT: call va2 802; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) 803; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16 804; LP64-LP64F-LP64D-FPELIM-NEXT: ret 805; 806; LP64-LP64F-LP64D-WITHFP-LABEL: va2_caller: 807; LP64-LP64F-LP64D-WITHFP: # %bb.0: 808; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16 809; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) 810; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) 811; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 812; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023 813; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52 814; LP64-LP64F-LP64D-WITHFP-NEXT: call va2 815; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) 816; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) 817; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 818; LP64-LP64F-LP64D-WITHFP-NEXT: ret 819 %1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00) 820 ret void 821} 822 823; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the 824; vararg double is passed in a4 and a5 (rather than a3 and a4) 825 826define i64 @va3(i32 %a, i64 %b, ...) nounwind { 827; ILP32-ILP32F-FPELIM-LABEL: va3: 828; ILP32-ILP32F-FPELIM: # %bb.0: 829; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32 830; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp) 831; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp) 832; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp) 833; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp) 834; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp) 835; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19 836; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8 837; ILP32-ILP32F-FPELIM-NEXT: addi a3, sp, 27 838; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp) 839; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a0) 840; ILP32-ILP32F-FPELIM-NEXT: ori a0, a0, 4 841; ILP32-ILP32F-FPELIM-NEXT: lw a4, 0(a0) 842; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a3 843; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1 844; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a4 845; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1 846; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32 847; ILP32-ILP32F-FPELIM-NEXT: ret 848; 849; ILP32-ILP32F-WITHFP-LABEL: va3: 850; ILP32-ILP32F-WITHFP: # %bb.0: 851; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 852; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) 853; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) 854; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24 855; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0) 856; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0) 857; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0) 858; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0) 859; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0) 860; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 861; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8 862; ILP32-ILP32F-WITHFP-NEXT: addi a3, s0, 19 863; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0) 864; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0) 865; ILP32-ILP32F-WITHFP-NEXT: ori a0, a0, 4 866; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0) 867; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3 868; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1 869; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4 870; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1 871; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) 872; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) 873; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 874; ILP32-ILP32F-WITHFP-NEXT: ret 875; 876; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3: 877; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 878; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32 879; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp) 880; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp) 881; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(sp) 882; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(sp) 883; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(sp) 884; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 19 885; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8 886; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, sp, 27 887; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp) 888; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 0(a0) 889; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a0, a0, 4 890; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a4, 0(a0) 891; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3 892; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1 893; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a4 894; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1 895; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 32 896; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 897; 898; LP64-LP64F-LP64D-FPELIM-LABEL: va3: 899; LP64-LP64F-LP64D-FPELIM: # %bb.0: 900; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64 901; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp) 902; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp) 903; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp) 904; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp) 905; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp) 906; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16 907; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 908; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp) 909; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp) 910; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7 911; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 32 912; LP64-LP64F-LP64D-FPELIM-NEXT: srli a2, a2, 32 913; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, 8 914; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp) 915; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 1 916; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a2, 32 917; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, -8 918; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a2 919; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0) 920; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a0 921; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64 922; LP64-LP64F-LP64D-FPELIM-NEXT: ret 923; 924; LP64-LP64F-LP64D-WITHFP-LABEL: va3: 925; LP64-LP64F-LP64D-WITHFP: # %bb.0: 926; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80 927; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 928; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 929; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 930; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0) 931; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0) 932; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0) 933; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0) 934; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0) 935; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0 936; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0) 937; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0) 938; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0) 939; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7 940; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 32 941; LP64-LP64F-LP64D-WITHFP-NEXT: srli a2, a2, 32 942; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8 943; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0) 944; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 1 945; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32 946; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8 947; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2 948; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) 949; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0 950; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 951; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 952; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80 953; LP64-LP64F-LP64D-WITHFP-NEXT: ret 954 %va = alloca i8*, align 4 955 %1 = bitcast i8** %va to i8* 956 call void @llvm.va_start(i8* %1) 957 %2 = bitcast i8** %va to i32* 958 %argp.cur = load i32, i32* %2, align 4 959 %3 = add i32 %argp.cur, 7 960 %4 = and i32 %3, -8 961 %argp.cur.aligned = inttoptr i32 %3 to i8* 962 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8 963 store i8* %argp.next, i8** %va, align 4 964 %5 = inttoptr i32 %4 to double* 965 %6 = load double, double* %5, align 8 966 call void @llvm.va_end(i8* %1) 967 %7 = bitcast double %6 to i64 968 %8 = add i64 %b, %7 969 ret i64 %8 970} 971 972define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind { 973; ILP32-ILP32F-FPELIM-LABEL: va3_va_arg: 974; ILP32-ILP32F-FPELIM: # %bb.0: 975; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32 976; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp) 977; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp) 978; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp) 979; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp) 980; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp) 981; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19 982; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8 983; ILP32-ILP32F-FPELIM-NEXT: ori a3, a0, 4 984; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp) 985; ILP32-ILP32F-FPELIM-NEXT: lw a4, 0(a0) 986; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 8 987; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp) 988; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a3) 989; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a4 990; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1 991; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a3 992; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1 993; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32 994; ILP32-ILP32F-FPELIM-NEXT: ret 995; 996; ILP32-ILP32F-WITHFP-LABEL: va3_va_arg: 997; ILP32-ILP32F-WITHFP: # %bb.0: 998; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 999; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) 1000; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) 1001; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24 1002; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0) 1003; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0) 1004; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0) 1005; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0) 1006; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0) 1007; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 1008; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8 1009; ILP32-ILP32F-WITHFP-NEXT: ori a3, a0, 4 1010; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0) 1011; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0) 1012; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 8 1013; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0) 1014; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a3) 1015; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a4 1016; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1 1017; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3 1018; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1 1019; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) 1020; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) 1021; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 1022; ILP32-ILP32F-WITHFP-NEXT: ret 1023; 1024; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg: 1025; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1026; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 1027; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 1028; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 1029; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 1030; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 1031; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 1032; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35 1033; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8 1034; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 8 1035; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 20(sp) 1036; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0) 1037; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 8(sp) 1038; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 12(sp) 1039; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 8(sp) 1040; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a0 1041; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3 1042; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1 1043; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1 1044; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 1045; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1046; 1047; LP64-LP64F-LP64D-FPELIM-LABEL: va3_va_arg: 1048; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1049; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64 1050; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp) 1051; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp) 1052; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp) 1053; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp) 1054; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp) 1055; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp) 1056; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16 1057; LP64-LP64F-LP64D-FPELIM-NEXT: ori a3, a0, 8 1058; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a2 1059; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp) 1060; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64 1061; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1062; 1063; LP64-LP64F-LP64D-WITHFP-LABEL: va3_va_arg: 1064; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1065; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80 1066; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 1067; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 1068; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 1069; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0) 1070; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0) 1071; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0) 1072; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0) 1073; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0) 1074; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0) 1075; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0 1076; LP64-LP64F-LP64D-WITHFP-NEXT: ori a3, a0, 8 1077; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2 1078; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0) 1079; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 1080; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 1081; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80 1082; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1083 %va = alloca i8*, align 4 1084 %1 = bitcast i8** %va to i8* 1085 call void @llvm.va_start(i8* %1) 1086 %2 = va_arg i8** %va, double 1087 call void @llvm.va_end(i8* %1) 1088 %3 = bitcast double %2 to i64 1089 %4 = add i64 %b, %3 1090 ret i64 %4 1091} 1092 1093define void @va3_caller() nounwind { 1094; ILP32-ILP32F-FPELIM-LABEL: va3_caller: 1095; ILP32-ILP32F-FPELIM: # %bb.0: 1096; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16 1097; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) 1098; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 2 1099; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 1111 1100; ILP32-ILP32F-FPELIM-NEXT: lui a5, 262144 1101; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero 1102; ILP32-ILP32F-FPELIM-NEXT: mv a4, zero 1103; ILP32-ILP32F-FPELIM-NEXT: call va3 1104; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) 1105; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16 1106; ILP32-ILP32F-FPELIM-NEXT: ret 1107; 1108; ILP32-ILP32F-WITHFP-LABEL: va3_caller: 1109; ILP32-ILP32F-WITHFP: # %bb.0: 1110; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16 1111; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 1112; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 1113; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 1114; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 2 1115; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 1111 1116; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144 1117; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero 1118; ILP32-ILP32F-WITHFP-NEXT: mv a4, zero 1119; ILP32-ILP32F-WITHFP-NEXT: call va3 1120; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 1121; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 1122; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 1123; ILP32-ILP32F-WITHFP-NEXT: ret 1124; 1125; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller: 1126; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1127; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 1128; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) 1129; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 2 1130; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 1111 1131; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 262144 1132; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero 1133; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a4, zero 1134; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va3 1135; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) 1136; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16 1137; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1138; 1139; LP64-LP64F-LP64D-FPELIM-LABEL: va3_caller: 1140; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1141; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16 1142; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) 1143; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1 1144; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 62 1145; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 2 1146; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1111 1147; LP64-LP64F-LP64D-FPELIM-NEXT: call va3 1148; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) 1149; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16 1150; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1151; 1152; LP64-LP64F-LP64D-WITHFP-LABEL: va3_caller: 1153; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1154; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16 1155; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) 1156; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) 1157; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 1158; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1 1159; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62 1160; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 2 1161; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1111 1162; LP64-LP64F-LP64D-WITHFP-NEXT: call va3 1163; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) 1164; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) 1165; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 1166; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1167 %1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00) 1168 ret void 1169} 1170 1171declare void @llvm.va_copy(i8*, i8*) 1172 1173define i32 @va4_va_copy(i32 %argno, ...) nounwind { 1174; ILP32-ILP32F-FPELIM-LABEL: va4_va_copy: 1175; ILP32-ILP32F-FPELIM: # %bb.0: 1176; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 1177; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) 1178; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) 1179; ILP32-ILP32F-FPELIM-NEXT: mv s0, a1 1180; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 1181; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 1182; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 1183; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 1184; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 1185; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 1186; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 1187; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 24 1188; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp) 1189; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp) 1190; ILP32-ILP32F-FPELIM-NEXT: call notdead 1191; ILP32-ILP32F-FPELIM-NEXT: lw a0, 4(sp) 1192; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 3 1193; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4 1194; ILP32-ILP32F-FPELIM-NEXT: addi a1, a0, 4 1195; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(sp) 1196; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a0) 1197; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7 1198; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4 1199; ILP32-ILP32F-FPELIM-NEXT: addi a2, a0, 4 1200; ILP32-ILP32F-FPELIM-NEXT: sw a2, 4(sp) 1201; ILP32-ILP32F-FPELIM-NEXT: lw a2, 0(a0) 1202; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7 1203; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4 1204; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4 1205; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp) 1206; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0) 1207; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0 1208; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2 1209; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0 1210; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) 1211; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) 1212; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 1213; ILP32-ILP32F-FPELIM-NEXT: ret 1214; 1215; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy: 1216; ILP32-ILP32F-WITHFP: # %bb.0: 1217; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64 1218; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) 1219; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) 1220; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp) 1221; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 32 1222; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1 1223; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 1224; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 1225; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 1226; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 1227; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 1228; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 1229; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 1230; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8 1231; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0) 1232; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0) 1233; ILP32-ILP32F-WITHFP-NEXT: call notdead 1234; ILP32-ILP32F-WITHFP-NEXT: lw a0, -16(s0) 1235; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 3 1236; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4 1237; ILP32-ILP32F-WITHFP-NEXT: addi a1, a0, 4 1238; ILP32-ILP32F-WITHFP-NEXT: sw a1, -16(s0) 1239; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a0) 1240; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7 1241; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4 1242; ILP32-ILP32F-WITHFP-NEXT: addi a2, a0, 4 1243; ILP32-ILP32F-WITHFP-NEXT: sw a2, -16(s0) 1244; ILP32-ILP32F-WITHFP-NEXT: lw a2, 0(a0) 1245; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7 1246; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4 1247; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4 1248; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0) 1249; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0) 1250; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1 1251; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2 1252; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0 1253; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) 1254; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) 1255; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) 1256; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64 1257; ILP32-ILP32F-WITHFP-NEXT: ret 1258; 1259; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy: 1260; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1261; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 1262; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) 1263; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) 1264; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s0, a1 1265; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 1266; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 1267; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 1268; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 1269; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 1270; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 1271; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 1272; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 24 1273; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 4(sp) 1274; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp) 1275; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead 1276; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 4(sp) 1277; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 3 1278; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4 1279; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 4 1280; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(sp) 1281; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a0) 1282; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7 1283; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4 1284; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a0, 4 1285; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 4(sp) 1286; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a2, 0(a0) 1287; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7 1288; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4 1289; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4 1290; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp) 1291; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0) 1292; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0 1293; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2 1294; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0 1295; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) 1296; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) 1297; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 1298; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1299; 1300; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy: 1301; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1302; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96 1303; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) 1304; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) 1305; LP64-LP64F-LP64D-FPELIM-NEXT: mv s0, a1 1306; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 88(sp) 1307; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 80(sp) 1308; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 72(sp) 1309; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 64(sp) 1310; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 56(sp) 1311; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 48(sp) 1312; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 40(sp) 1313; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 40 1314; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 8 1315; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 1316; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 0(sp) 1317; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead 1318; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 8(sp) 1319; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 3 1320; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4 1321; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a0, 8 1322; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp) 1323; LP64-LP64F-LP64D-FPELIM-NEXT: ld a1, 0(a0) 1324; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11 1325; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4 1326; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 8 1327; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp) 1328; LP64-LP64F-LP64D-FPELIM-NEXT: ld a2, 0(a0) 1329; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11 1330; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4 1331; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8 1332; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp) 1333; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0) 1334; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, s0 1335; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, a2 1336; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0 1337; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) 1338; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) 1339; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96 1340; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1341; 1342; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy: 1343; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1344; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112 1345; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) 1346; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) 1347; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp) 1348; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48 1349; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1 1350; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 1351; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 1352; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 1353; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 1354; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 1355; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 1356; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 1357; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8 1358; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 8 1359; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0) 1360; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -40(s0) 1361; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead 1362; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, -32(s0) 1363; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 3 1364; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4 1365; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a0, 8 1366; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -32(s0) 1367; LP64-LP64F-LP64D-WITHFP-NEXT: ld a1, 0(a0) 1368; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11 1369; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4 1370; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 8 1371; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -32(s0) 1372; LP64-LP64F-LP64D-WITHFP-NEXT: ld a2, 0(a0) 1373; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11 1374; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4 1375; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8 1376; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0) 1377; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) 1378; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, s1 1379; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, a2 1380; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0 1381; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) 1382; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) 1383; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) 1384; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112 1385; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1386 %vargs = alloca i8*, align 4 1387 %wargs = alloca i8*, align 4 1388 %1 = bitcast i8** %vargs to i8* 1389 %2 = bitcast i8** %wargs to i8* 1390 call void @llvm.va_start(i8* %1) 1391 %3 = va_arg i8** %vargs, i32 1392 call void @llvm.va_copy(i8* %2, i8* %1) 1393 %4 = load i8*, i8** %wargs, align 4 1394 call void @notdead(i8* %4) 1395 %5 = va_arg i8** %vargs, i32 1396 %6 = va_arg i8** %vargs, i32 1397 %7 = va_arg i8** %vargs, i32 1398 call void @llvm.va_end(i8* %1) 1399 call void @llvm.va_end(i8* %2) 1400 %add1 = add i32 %5, %3 1401 %add2 = add i32 %add1, %6 1402 %add3 = add i32 %add2, %7 1403 ret i32 %add3 1404} 1405 1406; Check 2x*xlen values are aligned appropriately when passed on the stack in a vararg call 1407 1408declare i32 @va5_aligned_stack_callee(i32, ...) 1409 1410define void @va5_aligned_stack_caller() nounwind { 1411; The double should be 8-byte aligned on the stack, but the two-element array 1412; should only be 4-byte aligned 1413; ILP32-ILP32F-FPELIM-LABEL: va5_aligned_stack_caller: 1414; ILP32-ILP32F-FPELIM: # %bb.0: 1415; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -64 1416; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp) 1417; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 17 1418; ILP32-ILP32F-FPELIM-NEXT: sw a0, 24(sp) 1419; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 16 1420; ILP32-ILP32F-FPELIM-NEXT: sw a0, 20(sp) 1421; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 15 1422; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp) 1423; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262236 1424; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 655 1425; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp) 1426; ILP32-ILP32F-FPELIM-NEXT: lui a0, 377487 1427; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 1475 1428; ILP32-ILP32F-FPELIM-NEXT: sw a0, 8(sp) 1429; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 14 1430; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp) 1431; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262153 1432; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 491 1433; ILP32-ILP32F-FPELIM-NEXT: sw a0, 44(sp) 1434; ILP32-ILP32F-FPELIM-NEXT: lui a0, 545260 1435; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -1967 1436; ILP32-ILP32F-FPELIM-NEXT: sw a0, 40(sp) 1437; ILP32-ILP32F-FPELIM-NEXT: lui a0, 964690 1438; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -328 1439; ILP32-ILP32F-FPELIM-NEXT: sw a0, 36(sp) 1440; ILP32-ILP32F-FPELIM-NEXT: lui a0, 335544 1441; ILP32-ILP32F-FPELIM-NEXT: addi a5, a0, 1311 1442; ILP32-ILP32F-FPELIM-NEXT: lui a0, 688509 1443; ILP32-ILP32F-FPELIM-NEXT: addi a6, a0, -2048 1444; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 1 1445; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 11 1446; ILP32-ILP32F-FPELIM-NEXT: addi a2, sp, 32 1447; ILP32-ILP32F-FPELIM-NEXT: addi a3, zero, 12 1448; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 13 1449; ILP32-ILP32F-FPELIM-NEXT: addi a7, zero, 4 1450; ILP32-ILP32F-FPELIM-NEXT: sw a5, 32(sp) 1451; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee 1452; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp) 1453; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 64 1454; ILP32-ILP32F-FPELIM-NEXT: ret 1455; 1456; ILP32-ILP32F-WITHFP-LABEL: va5_aligned_stack_caller: 1457; ILP32-ILP32F-WITHFP: # %bb.0: 1458; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64 1459; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp) 1460; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp) 1461; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 64 1462; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 17 1463; ILP32-ILP32F-WITHFP-NEXT: sw a0, 24(sp) 1464; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 16 1465; ILP32-ILP32F-WITHFP-NEXT: sw a0, 20(sp) 1466; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 15 1467; ILP32-ILP32F-WITHFP-NEXT: sw a0, 16(sp) 1468; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262236 1469; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 655 1470; ILP32-ILP32F-WITHFP-NEXT: sw a0, 12(sp) 1471; ILP32-ILP32F-WITHFP-NEXT: lui a0, 377487 1472; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 1475 1473; ILP32-ILP32F-WITHFP-NEXT: sw a0, 8(sp) 1474; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 14 1475; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(sp) 1476; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262153 1477; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 491 1478; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0) 1479; ILP32-ILP32F-WITHFP-NEXT: lui a0, 545260 1480; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1967 1481; ILP32-ILP32F-WITHFP-NEXT: sw a0, -24(s0) 1482; ILP32-ILP32F-WITHFP-NEXT: lui a0, 964690 1483; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -328 1484; ILP32-ILP32F-WITHFP-NEXT: sw a0, -28(s0) 1485; ILP32-ILP32F-WITHFP-NEXT: lui a0, 335544 1486; ILP32-ILP32F-WITHFP-NEXT: addi a5, a0, 1311 1487; ILP32-ILP32F-WITHFP-NEXT: lui a0, 688509 1488; ILP32-ILP32F-WITHFP-NEXT: addi a6, a0, -2048 1489; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 1 1490; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 11 1491; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32 1492; ILP32-ILP32F-WITHFP-NEXT: addi a3, zero, 12 1493; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 13 1494; ILP32-ILP32F-WITHFP-NEXT: addi a7, zero, 4 1495; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0) 1496; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee 1497; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) 1498; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) 1499; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64 1500; ILP32-ILP32F-WITHFP-NEXT: ret 1501; 1502; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller: 1503; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1504; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64 1505; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) 1506; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236 1507; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 655 1508; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp) 1509; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 377487 1510; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 1475 1511; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 8(sp) 1512; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 17 1513; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 24(sp) 1514; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 16 1515; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 20(sp) 1516; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 15 1517; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp) 1518; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 14 1519; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp) 1520; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262153 1521; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 491 1522; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 44(sp) 1523; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 545260 1524; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -1967 1525; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 40(sp) 1526; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 964690 1527; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -328 1528; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 36(sp) 1529; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 335544 1530; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a0, 1311 1531; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 688509 1532; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a0, -2048 1533; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 1 1534; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 11 1535; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, sp, 32 1536; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, zero, 12 1537; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 13 1538; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, zero, 4 1539; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 32(sp) 1540; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee 1541; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp) 1542; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 64 1543; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1544; 1545; LP64-LP64F-LP64D-FPELIM-LABEL: va5_aligned_stack_caller: 1546; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1547; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -48 1548; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp) 1549; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 17 1550; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 24(sp) 1551; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 16 1552; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp) 1553; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 15 1554; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 1555; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 2049 1556; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, -1147 1557; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13 1558; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983 1559; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14 1560; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 655 1561; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12 1562; LP64-LP64F-LP64D-FPELIM-NEXT: addi t0, a0, 1475 1563; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1192 1564; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 381 1565; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12 1566; LP64-LP64F-LP64D-FPELIM-NEXT: addi a6, a0, -2048 1567; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1048248 1568; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 1311 1569; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12 1570; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1147 1571; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13 1572; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983 1573; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15 1574; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 1311 1575; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 512 1576; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 73 1577; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15 1578; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1311 1579; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12 1580; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 1147 1581; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14 1582; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, -1967 1583; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1 1584; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 11 1585; LP64-LP64F-LP64D-FPELIM-NEXT: addi a4, zero, 12 1586; LP64-LP64F-LP64D-FPELIM-NEXT: addi a5, zero, 13 1587; LP64-LP64F-LP64D-FPELIM-NEXT: addi a7, zero, 14 1588; LP64-LP64F-LP64D-FPELIM-NEXT: sd t0, 0(sp) 1589; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee 1590; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp) 1591; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 48 1592; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1593; 1594; LP64-LP64F-LP64D-WITHFP-LABEL: va5_aligned_stack_caller: 1595; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1596; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -48 1597; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) 1598; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) 1599; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48 1600; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 17 1601; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 24(sp) 1602; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 16 1603; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 16(sp) 1604; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 15 1605; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 8(sp) 1606; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 2049 1607; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1147 1608; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13 1609; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983 1610; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14 1611; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 655 1612; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12 1613; LP64-LP64F-LP64D-WITHFP-NEXT: addi t0, a0, 1475 1614; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1192 1615; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 381 1616; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12 1617; LP64-LP64F-LP64D-WITHFP-NEXT: addi a6, a0, -2048 1618; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1048248 1619; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 1311 1620; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12 1621; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1147 1622; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13 1623; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983 1624; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15 1625; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 1311 1626; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 512 1627; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 73 1628; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15 1629; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1311 1630; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12 1631; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 1147 1632; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14 1633; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, -1967 1634; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1 1635; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 11 1636; LP64-LP64F-LP64D-WITHFP-NEXT: addi a4, zero, 12 1637; LP64-LP64F-LP64D-WITHFP-NEXT: addi a5, zero, 13 1638; LP64-LP64F-LP64D-WITHFP-NEXT: addi a7, zero, 14 1639; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp) 1640; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee 1641; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) 1642; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) 1643; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48 1644; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1645 %1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11, 1646 fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000, 1647 i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17]) 1648 ret void 1649} 1650 1651; A function with no fixed arguments is not valid C, but can be 1652; specified in LLVM IR. We must ensure the vararg save area is 1653; still set up correctly. 1654 1655define i32 @va6_no_fixed_args(...) nounwind { 1656; ILP32-ILP32F-FPELIM-LABEL: va6_no_fixed_args: 1657; ILP32-ILP32F-FPELIM: # %bb.0: 1658; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48 1659; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp) 1660; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp) 1661; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp) 1662; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp) 1663; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp) 1664; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp) 1665; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp) 1666; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp) 1667; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 20 1668; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp) 1669; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 1670; ILP32-ILP32F-FPELIM-NEXT: ret 1671; 1672; ILP32-ILP32F-WITHFP-LABEL: va6_no_fixed_args: 1673; ILP32-ILP32F-WITHFP: # %bb.0: 1674; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 1675; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) 1676; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) 1677; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 1678; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 1679; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 1680; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 1681; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 1682; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 1683; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 1684; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 1685; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0) 1686; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4 1687; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) 1688; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) 1689; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) 1690; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 1691; ILP32-ILP32F-WITHFP-NEXT: ret 1692; 1693; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args: 1694; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1695; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 1696; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) 1697; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) 1698; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp) 1699; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp) 1700; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp) 1701; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp) 1702; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp) 1703; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp) 1704; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 20 1705; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp) 1706; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 1707; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1708; 1709; LP64-LP64F-LP64D-FPELIM-LABEL: va6_no_fixed_args: 1710; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1711; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80 1712; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp) 1713; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp) 1714; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp) 1715; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp) 1716; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp) 1717; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp) 1718; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp) 1719; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp) 1720; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 16 1721; LP64-LP64F-LP64D-FPELIM-NEXT: ori a1, a1, 8 1722; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp) 1723; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80 1724; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1725; 1726; LP64-LP64F-LP64D-WITHFP-LABEL: va6_no_fixed_args: 1727; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1728; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 1729; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) 1730; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) 1731; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32 1732; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 1733; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 1734; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 1735; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 1736; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 1737; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 1738; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 1739; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0) 1740; LP64-LP64F-LP64D-WITHFP-NEXT: mv a1, s0 1741; LP64-LP64F-LP64D-WITHFP-NEXT: ori a1, a1, 8 1742; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) 1743; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) 1744; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) 1745; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 1746; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1747 %va = alloca i8*, align 4 1748 %1 = bitcast i8** %va to i8* 1749 call void @llvm.va_start(i8* %1) 1750 %2 = va_arg i8** %va, i32 1751 call void @llvm.va_end(i8* %1) 1752 ret i32 %2 1753} 1754 1755; TODO: improve constant materialization of stack addresses 1756 1757define i32 @va_large_stack(i8* %fmt, ...) { 1758; ILP32-ILP32F-FPELIM-LABEL: va_large_stack: 1759; ILP32-ILP32F-FPELIM: # %bb.0: 1760; ILP32-ILP32F-FPELIM-NEXT: lui a0, 24414 1761; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 304 1762; ILP32-ILP32F-FPELIM-NEXT: sub sp, sp, a0 1763; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 100000048 1764; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1 1765; ILP32-ILP32F-FPELIM-NEXT: lui t0, 24414 1766; ILP32-ILP32F-FPELIM-NEXT: addi t0, t0, 300 1767; ILP32-ILP32F-FPELIM-NEXT: add t0, sp, t0 1768; ILP32-ILP32F-FPELIM-NEXT: sw a7, 0(t0) 1769; ILP32-ILP32F-FPELIM-NEXT: lui a7, 24414 1770; ILP32-ILP32F-FPELIM-NEXT: addi a7, a7, 296 1771; ILP32-ILP32F-FPELIM-NEXT: add a7, sp, a7 1772; ILP32-ILP32F-FPELIM-NEXT: sw a6, 0(a7) 1773; ILP32-ILP32F-FPELIM-NEXT: lui a6, 24414 1774; ILP32-ILP32F-FPELIM-NEXT: addi a6, a6, 292 1775; ILP32-ILP32F-FPELIM-NEXT: add a6, sp, a6 1776; ILP32-ILP32F-FPELIM-NEXT: sw a5, 0(a6) 1777; ILP32-ILP32F-FPELIM-NEXT: lui a5, 24414 1778; ILP32-ILP32F-FPELIM-NEXT: addi a5, a5, 288 1779; ILP32-ILP32F-FPELIM-NEXT: add a5, sp, a5 1780; ILP32-ILP32F-FPELIM-NEXT: sw a4, 0(a5) 1781; ILP32-ILP32F-FPELIM-NEXT: lui a4, 24414 1782; ILP32-ILP32F-FPELIM-NEXT: addi a4, a4, 284 1783; ILP32-ILP32F-FPELIM-NEXT: add a4, sp, a4 1784; ILP32-ILP32F-FPELIM-NEXT: sw a3, 0(a4) 1785; ILP32-ILP32F-FPELIM-NEXT: lui a3, 24414 1786; ILP32-ILP32F-FPELIM-NEXT: addi a3, a3, 280 1787; ILP32-ILP32F-FPELIM-NEXT: add a3, sp, a3 1788; ILP32-ILP32F-FPELIM-NEXT: sw a2, 0(a3) 1789; ILP32-ILP32F-FPELIM-NEXT: lui a2, 24414 1790; ILP32-ILP32F-FPELIM-NEXT: addi a2, a2, 276 1791; ILP32-ILP32F-FPELIM-NEXT: add a2, sp, a2 1792; ILP32-ILP32F-FPELIM-NEXT: sw a1, 0(a2) 1793; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414 1794; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 280 1795; ILP32-ILP32F-FPELIM-NEXT: add a1, sp, a1 1796; ILP32-ILP32F-FPELIM-NEXT: mv a1, a1 1797; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp) 1798; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414 1799; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 304 1800; ILP32-ILP32F-FPELIM-NEXT: add sp, sp, a1 1801; ILP32-ILP32F-FPELIM-NEXT: ret 1802; 1803; ILP32-ILP32F-WITHFP-LABEL: va_large_stack: 1804; ILP32-ILP32F-WITHFP: # %bb.0: 1805; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -2032 1806; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 2032 1807; ILP32-ILP32F-WITHFP-NEXT: sw ra, 1996(sp) 1808; ILP32-ILP32F-WITHFP-NEXT: sw s0, 1992(sp) 1809; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36 1810; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40 1811; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 2000 1812; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32 1813; ILP32-ILP32F-WITHFP-NEXT: lui a0, 24414 1814; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1728 1815; ILP32-ILP32F-WITHFP-NEXT: sub sp, sp, a0 1816; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1 1817; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0) 1818; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) 1819; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) 1820; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) 1821; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) 1822; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) 1823; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) 1824; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 1825; ILP32-ILP32F-WITHFP-NEXT: lui a2, 1024162 1826; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, -272 1827; ILP32-ILP32F-WITHFP-NEXT: add a2, s0, a2 1828; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2) 1829; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414 1830; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728 1831; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1 1832; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) 1833; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) 1834; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032 1835; ILP32-ILP32F-WITHFP-NEXT: ret 1836; 1837; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va_large_stack: 1838; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: 1839; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 24414 1840; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 304 1841; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub sp, sp, a0 1842; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 100000048 1843; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 1844; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui t0, 24414 1845; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi t0, t0, 300 1846; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add t0, sp, t0 1847; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 0(t0) 1848; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a7, 24414 1849; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, a7, 296 1850; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a7, sp, a7 1851; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 0(a7) 1852; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a6, 24414 1853; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a6, 292 1854; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a6, sp, a6 1855; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 0(a6) 1856; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 24414 1857; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a5, 288 1858; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a5, sp, a5 1859; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 0(a5) 1860; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a4, 24414 1861; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, a4, 284 1862; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a4, sp, a4 1863; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 0(a4) 1864; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 24414 1865; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a3, 280 1866; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a3, sp, a3 1867; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 0(a3) 1868; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a2, 24414 1869; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a2, 276 1870; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, sp, a2 1871; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 0(a2) 1872; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414 1873; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 280 1874; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, sp, a1 1875; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a1, a1 1876; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp) 1877; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414 1878; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 304 1879; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add sp, sp, a1 1880; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret 1881; 1882; LP64-LP64F-LP64D-FPELIM-LABEL: va_large_stack: 1883; LP64-LP64F-LP64D-FPELIM: # %bb.0: 1884; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1885; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 336 1886; LP64-LP64F-LP64D-FPELIM-NEXT: sub sp, sp, a0 1887; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 100000080 1888; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1889; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280 1890; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1891; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 0(a0) 1892; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1893; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 328 1894; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1895; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 0(a0) 1896; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1897; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 320 1898; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1899; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 0(a0) 1900; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1901; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 312 1902; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1903; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 0(a0) 1904; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1905; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 304 1906; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1907; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 0(a0) 1908; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1909; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 296 1910; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1911; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 0(a0) 1912; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1913; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 288 1914; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1915; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 0(a0) 1916; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1917; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280 1918; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1919; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a0 1920; LP64-LP64F-LP64D-FPELIM-NEXT: ori a0, a0, 4 1921; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) 1922; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 1923; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280 1924; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 1925; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 0(a0) 1926; LP64-LP64F-LP64D-FPELIM-NEXT: lui a1, 24414 1927; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a1, a1, 336 1928; LP64-LP64F-LP64D-FPELIM-NEXT: add sp, sp, a1 1929; LP64-LP64F-LP64D-FPELIM-NEXT: ret 1930; 1931; LP64-LP64F-LP64D-WITHFP-LABEL: va_large_stack: 1932; LP64-LP64F-LP64D-WITHFP: # %bb.0: 1933; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -2032 1934; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 2032 1935; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 1960(sp) 1936; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 1952(sp) 1937; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72 1938; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80 1939; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 1968 1940; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64 1941; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 24414 1942; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1680 1943; LP64-LP64F-LP64D-WITHFP-NEXT: sub sp, sp, a0 1944; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) 1945; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0) 1946; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) 1947; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) 1948; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) 1949; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) 1950; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) 1951; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8 1952; LP64-LP64F-LP64D-WITHFP-NEXT: ori a0, a0, 4 1953; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 1024162 1954; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -288 1955; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, s0, a1 1956; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1) 1957; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0) 1958; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414 1959; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680 1960; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1 1961; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) 1962; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) 1963; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032 1964; LP64-LP64F-LP64D-WITHFP-NEXT: ret 1965 %large = alloca [ 100000000 x i8 ] 1966 %va = alloca i8*, align 4 1967 %1 = bitcast i8** %va to i8* 1968 call void @llvm.va_start(i8* %1) 1969 %argp.cur = load i8*, i8** %va, align 4 1970 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4 1971 store i8* %argp.next, i8** %va, align 4 1972 %2 = bitcast i8* %argp.cur to i32* 1973 %3 = load i32, i32* %2, align 4 1974 call void @llvm.va_end(i8* %1) 1975 ret i32 %3 1976} 1977