1; Test 64-bit atomic minimum and maximum. Here we match the z10 versions, 2; which can't use LOCGR. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 5 6; Check signed minium. 7define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { 8; CHECK-LABEL: f1: 9; CHECK: lg %r2, 0(%r3) 10; CHECK: j [[LOOP:\.[^:]*]] 11; CHECK: [[BB1:\.[^:]*]]: 12; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) 13; CHECK: ber %r14 14; CHECK: [[LOOP:\.[^:]*]]: 15; CHECK: lgr [[NEW:%r[0-9]+]], %r2 16; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]] 17; CHECK: lgr [[NEW]], %r4 18; CHECK: j [[BB1]] 19 %res = atomicrmw min i64 *%src, i64 %b seq_cst 20 ret i64 %res 21} 22 23; Check signed maximum. 24define i64 @f2(i64 %dummy, i64 *%src, i64 %b) { 25; CHECK-LABEL: f2: 26; CHECK: lg %r2, 0(%r3) 27; CHECK: j [[LOOP:\.[^:]*]] 28; CHECK: [[BB1:\.[^:]*]]: 29; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) 30; CHECK: ber %r14 31; CHECK: [[LOOP:\.[^:]*]]: 32; CHECK: lgr [[NEW:%r[0-9]+]], %r2 33; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]] 34; CHECK: lgr [[NEW]], %r4 35; CHECK: j [[BB1]] 36 %res = atomicrmw max i64 *%src, i64 %b seq_cst 37 ret i64 %res 38} 39 40; Check unsigned minimum. 41define i64 @f3(i64 %dummy, i64 *%src, i64 %b) { 42; CHECK-LABEL: f3: 43; CHECK: lg %r2, 0(%r3) 44; CHECK: j [[LOOP:\.[^:]*]] 45; CHECK: [[BB1:\.[^:]*]]: 46; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) 47; CHECK: ber %r14 48; CHECK: [[LOOP:\.[^:]*]]: 49; CHECK: lgr [[NEW:%r[0-9]+]], %r2 50; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]] 51; CHECK: lgr [[NEW]], %r4 52; CHECK: j [[BB1]] 53 %res = atomicrmw umin i64 *%src, i64 %b seq_cst 54 ret i64 %res 55} 56 57; Check unsigned maximum. 58define i64 @f4(i64 %dummy, i64 *%src, i64 %b) { 59; CHECK-LABEL: f4: 60; CHECK: lg %r2, 0(%r3) 61; CHECK: j [[LOOP:\.[^:]*]] 62; CHECK: [[BB1:\.[^:]*]]: 63; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) 64; CHECK: ber %r14 65; CHECK: [[LOOP:\.[^:]*]]: 66; CHECK: lgr [[NEW:%r[0-9]+]], %r2 67; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]] 68; CHECK: lgr [[NEW]], %r4 69; CHECK: j [[BB1]] 70 %res = atomicrmw umax i64 *%src, i64 %b seq_cst 71 ret i64 %res 72} 73 74; Check the high end of the aligned CSG range. 75define i64 @f5(i64 %dummy, i64 *%src, i64 %b) { 76; CHECK-LABEL: f5: 77; CHECK: lg %r2, 524280(%r3) 78; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3) 79; CHECK: ber %r14 80 %ptr = getelementptr i64, i64 *%src, i64 65535 81 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst 82 ret i64 %res 83} 84 85; Check the next doubleword up, which requires separate address logic. 86define i64 @f6(i64 %dummy, i64 *%src, i64 %b) { 87; CHECK-LABEL: f6: 88; CHECK: agfi %r3, 524288 89; CHECK: lg %r2, 0(%r3) 90; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 91; CHECK: ber %r14 92 %ptr = getelementptr i64, i64 *%src, i64 65536 93 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst 94 ret i64 %res 95} 96 97; Check the low end of the CSG range. 98define i64 @f7(i64 %dummy, i64 *%src, i64 %b) { 99; CHECK-LABEL: f7: 100; CHECK: lg %r2, -524288(%r3) 101; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3) 102; CHECK: ber %r14 103 %ptr = getelementptr i64, i64 *%src, i64 -65536 104 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst 105 ret i64 %res 106} 107 108; Check the next doubleword down, which requires separate address logic. 109define i64 @f8(i64 %dummy, i64 *%src, i64 %b) { 110; CHECK-LABEL: f8: 111; CHECK: agfi %r3, -524296 112; CHECK: lg %r2, 0(%r3) 113; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 114; CHECK: ber %r14 115 %ptr = getelementptr i64, i64 *%src, i64 -65537 116 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst 117 ret i64 %res 118} 119 120; Check that indexed addresses are not allowed. 121define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) { 122; CHECK-LABEL: f9: 123; CHECK: agr %r3, %r4 124; CHECK: lg %r2, 0(%r3) 125; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3) 126; CHECK: ber %r14 127 %add = add i64 %base, %index 128 %ptr = inttoptr i64 %add to i64 * 129 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst 130 ret i64 %res 131} 132 133; Check that constants are handled. 134define i64 @f10(i64 %dummy, i64 *%ptr) { 135; CHECK-LABEL: f10: 136; CHECK-DAG: lghi [[LIMIT:%r[0-9]+]], 42 137; CHECK-DAG: lg %r2, 0(%r3) 138; CHECK: j [[LOOP:\.[^:]*]] 139; CHECK: [[BB1:\.[^:]*]]: 140; CHECK: csg %r2, [[NEW:%r[0-9]+]], 0(%r3) 141; CHECK: ber %r14 142; CHECK: [[LOOP:\.[^:]*]]: 143; CHECK: lgr [[NEW:%r[0-9]+]], %r2 144; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]] 145; CHECK: lghi [[NEW]], 42 146; CHECK: j [[BB1]] 147 %res = atomicrmw min i64 *%ptr, i64 42 seq_cst 148 ret i64 %res 149} 150