1; Test 32-bit atomic subtractions, z196 version. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 4 5; Check addition of a variable. 6define i32 @f1(i32 %dummy, i32 *%src, i32 %b) { 7; CHECK-LABEL: f1: 8; CHECK: lcr [[NEG:%r[0-5]]], %r4 9; CHECK: laa %r2, [[NEG]], 0(%r3) 10; CHECK: br %r14 11 %res = atomicrmw sub i32 *%src, i32 %b seq_cst 12 ret i32 %res 13} 14 15; Check addition of 1, which needs a temporary. 16define i32 @f2(i32 %dummy, i32 *%src) { 17; CHECK-LABEL: f2: 18; CHECK: lhi [[TMP:%r[0-5]]], -1 19; CHECK: laa %r2, [[TMP]], 0(%r3) 20; CHECK: br %r14 21 %res = atomicrmw sub i32 *%src, i32 1 seq_cst 22 ret i32 %res 23} 24 25; Check the high end of the LAA range. 26define i32 @f3(i32 %dummy, i32 *%src, i32 %b) { 27; CHECK-LABEL: f3: 28; CHECK: lcr [[NEG:%r[0-5]]], %r4 29; CHECK: laa %r2, [[NEG]], 524284(%r3) 30; CHECK: br %r14 31 %ptr = getelementptr i32, i32 *%src, i32 131071 32 %res = atomicrmw sub i32 *%ptr, i32 %b seq_cst 33 ret i32 %res 34} 35 36; Check the next word up, which needs separate address logic. 37define i32 @f4(i32 %dummy, i32 *%src, i32 %b) { 38; CHECK-LABEL: f4: 39; CHECK-DAG: lcr [[NEG:%r[0-5]]], %r4 40; CHECK-DAG: agfi %r3, 524288 41; CHECK: laa %r2, [[NEG]], 0(%r3) 42; CHECK: br %r14 43 %ptr = getelementptr i32, i32 *%src, i32 131072 44 %res = atomicrmw sub i32 *%ptr, i32 %b seq_cst 45 ret i32 %res 46} 47 48; Check the low end of the LAA range. 49define i32 @f5(i32 %dummy, i32 *%src, i32 %b) { 50; CHECK-LABEL: f5: 51; CHECK: lcr [[NEG:%r[0-5]]], %r4 52; CHECK: laa %r2, [[NEG]], -524288(%r3) 53; CHECK: br %r14 54 %ptr = getelementptr i32, i32 *%src, i32 -131072 55 %res = atomicrmw sub i32 *%ptr, i32 %b seq_cst 56 ret i32 %res 57} 58 59; Check the next word down, which needs separate address logic. 60define i32 @f6(i32 %dummy, i32 *%src, i32 %b) { 61; CHECK-LABEL: f6: 62; CHECK-DAG: lcr [[NEG:%r[0-5]]], %r4 63; CHECK-DAG: agfi %r3, -524292 64; CHECK: laa %r2, [[NEG]], 0(%r3) 65; CHECK: br %r14 66 %ptr = getelementptr i32, i32 *%src, i32 -131073 67 %res = atomicrmw sub i32 *%ptr, i32 %b seq_cst 68 ret i32 %res 69} 70