1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs -tail-predication=enabled -o - %s | FileCheck %s 3 4define arm_aapcs_vfpcc void @arm_var_f32_mve(float* %pSrc, i32 %blockSize, float* nocapture %pResult) { 5; CHECK-LABEL: arm_var_f32_mve: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: .save {r7, lr} 8; CHECK-NEXT: push {r7, lr} 9; CHECK-NEXT: vmov.i32 q0, #0x0 10; CHECK-NEXT: mov r3, r1 11; CHECK-NEXT: dlstp.32 lr, r1 12; CHECK-NEXT: mov r12, r0 13; CHECK-NEXT: .LBB0_1: @ %do.body.i 14; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 15; CHECK-NEXT: vldrw.u32 q1, [r12], #16 16; CHECK-NEXT: vadd.f32 q0, q0, q1 17; CHECK-NEXT: letp lr, .LBB0_1 18; CHECK-NEXT: @ %bb.2: @ %arm_mean_f32_mve.exit 19; CHECK-NEXT: vmov s4, r1 20; CHECK-NEXT: mov r3, r1 21; CHECK-NEXT: vadd.f32 s0, s3, s3 22; CHECK-NEXT: cmp r1, #4 23; CHECK-NEXT: vcvt.f32.u32 s4, s4 24; CHECK-NEXT: it ge 25; CHECK-NEXT: movge r3, #4 26; CHECK-NEXT: subs r3, r1, r3 27; CHECK-NEXT: mov.w lr, #1 28; CHECK-NEXT: adds r3, #3 29; CHECK-NEXT: add.w lr, lr, r3, lsr #2 30; CHECK-NEXT: mov r3, r1 31; CHECK-NEXT: dls lr, lr 32; CHECK-NEXT: vdiv.f32 s0, s0, s4 33; CHECK-NEXT: vmov r12, s0 34; CHECK-NEXT: vmov.i32 q0, #0x0 35; CHECK-NEXT: .LBB0_3: @ %do.body 36; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 37; CHECK-NEXT: vctp.32 r3 38; CHECK-NEXT: subs r3, #4 39; CHECK-NEXT: vpsttt 40; CHECK-NEXT: vldrwt.u32 q1, [r0], #16 41; CHECK-NEXT: vsubt.f32 q1, q1, r12 42; CHECK-NEXT: vfmat.f32 q0, q1, q1 43; CHECK-NEXT: le lr, .LBB0_3 44; CHECK-NEXT: @ %bb.4: @ %do.end 45; CHECK-NEXT: subs r0, r1, #1 46; CHECK-NEXT: vadd.f32 s0, s3, s3 47; CHECK-NEXT: vmov s2, r0 48; CHECK-NEXT: vcvt.f32.u32 s2, s2 49; CHECK-NEXT: vdiv.f32 s0, s0, s2 50; CHECK-NEXT: vstr s0, [r2] 51; CHECK-NEXT: pop {r7, pc} 52entry: 53 br label %do.body.i 54 55do.body.i: ; preds = %entry, %do.body.i 56 %blkCnt.0.i = phi i32 [ %sub.i, %do.body.i ], [ %blockSize, %entry ] 57 %sumVec.0.i = phi <4 x float> [ %3, %do.body.i ], [ zeroinitializer, %entry ] 58 %pSrc.addr.0.i = phi float* [ %add.ptr.i, %do.body.i ], [ %pSrc, %entry ] 59 %0 = tail call <4 x i1> @llvm.arm.mve.vctp32(i32 %blkCnt.0.i) 60 %1 = bitcast float* %pSrc.addr.0.i to <4 x float>* 61 %2 = tail call fast <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %1, i32 4, <4 x i1> %0, <4 x float> zeroinitializer) 62 %3 = tail call fast <4 x float> @llvm.arm.mve.add.predicated.v4f32.v4i1(<4 x float> %sumVec.0.i, <4 x float> %2, <4 x i1> %0, <4 x float> %sumVec.0.i) 63 %sub.i = add nsw i32 %blkCnt.0.i, -4 64 %add.ptr.i = getelementptr inbounds float, float* %pSrc.addr.0.i, i32 4 65 %cmp.i = icmp sgt i32 %blkCnt.0.i, 4 66 br i1 %cmp.i, label %do.body.i, label %arm_mean_f32_mve.exit 67 68arm_mean_f32_mve.exit: ; preds = %do.body.i 69 %4 = extractelement <4 x float> %3, i32 3 70 %add2.i.i = fadd fast float %4, %4 71 %conv.i = uitofp i32 %blockSize to float 72 %div.i = fdiv fast float %add2.i.i, %conv.i 73 %.splatinsert = insertelement <4 x float> undef, float %div.i, i32 0 74 %.splat = shufflevector <4 x float> %.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 75 br label %do.body 76 77do.body: ; preds = %do.body, %arm_mean_f32_mve.exit 78 %blkCnt.0 = phi i32 [ %blockSize, %arm_mean_f32_mve.exit ], [ %sub, %do.body ] 79 %sumVec.0 = phi <4 x float> [ zeroinitializer, %arm_mean_f32_mve.exit ], [ %9, %do.body ] 80 %pSrc.addr.0 = phi float* [ %pSrc, %arm_mean_f32_mve.exit ], [ %add.ptr, %do.body ] 81 %5 = tail call <4 x i1> @llvm.arm.mve.vctp32(i32 %blkCnt.0) 82 %6 = bitcast float* %pSrc.addr.0 to <4 x float>* 83 %7 = tail call fast <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %6, i32 4, <4 x i1> %5, <4 x float> zeroinitializer) 84 %8 = tail call fast <4 x float> @llvm.arm.mve.sub.predicated.v4f32.v4i1(<4 x float> %7, <4 x float> %.splat, <4 x i1> %5, <4 x float> undef) 85 %9 = tail call fast <4 x float> @llvm.arm.mve.fma.predicated.v4f32.v4i1(<4 x float> %8, <4 x float> %8, <4 x float> %sumVec.0, <4 x i1> %5) 86 %sub = add nsw i32 %blkCnt.0, -4 87 %add.ptr = getelementptr inbounds float, float* %pSrc.addr.0, i32 4 88 %cmp1 = icmp sgt i32 %blkCnt.0, 4 89 br i1 %cmp1, label %do.body, label %do.end 90 91do.end: ; preds = %do.body 92 %10 = extractelement <4 x float> %9, i32 3 93 %add2.i = fadd fast float %10, %10 94 %sub2 = add i32 %blockSize, -1 95 %conv = uitofp i32 %sub2 to float 96 %div = fdiv fast float %add2.i, %conv 97 br label %cleanup 98 99cleanup: ; preds = %entry, %do.end 100 store float %div, float* %pResult, align 4 101 ret void 102} 103 104declare <4 x float> @llvm.arm.mve.sub.predicated.v4f32.v4i1(<4 x float>, <4 x float>, <4 x i1>, <4 x float>) 105 106declare <4 x float> @llvm.arm.mve.fma.predicated.v4f32.v4i1(<4 x float>, <4 x float>, <4 x float>, <4 x i1>) 107 108declare <4 x i1> @llvm.arm.mve.vctp32(i32) 109 110declare <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>*, i32 immarg, <4 x i1>, <4 x float>) 111 112declare <4 x float> @llvm.arm.mve.add.predicated.v4f32.v4i1(<4 x float>, <4 x float>, <4 x i1>, <4 x float>) 113 114