1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s 3 4--- | 5 define dso_local arm_aapcs_vfpcc void @multi_cond_iter_count(i32* nocapture %0, i32* nocapture readonly %1, i32 %2, i32 %3) local_unnamed_addr #0 { 6 %5 = icmp eq i32 %3, 2 7 %6 = select i1 %5, i32 2, i32 4 8 %7 = icmp eq i32 %3, 4 9 %8 = select i1 %7, i32 1, i32 %6 10 %9 = shl i32 %2, %8 11 %10 = icmp eq i32 %9, 0 12 br i1 %10, label %64, label %11 13 14 11: ; preds = %4 15 %12 = getelementptr i32, i32* %0, i32 %9 16 %13 = getelementptr i32, i32* %1, i32 %9 17 %14 = icmp ugt i32* %13, %0 18 %15 = icmp ugt i32* %12, %1 19 %16 = and i1 %14, %15 20 %17 = add i32 %9, 3 21 %18 = lshr i32 %17, 2 22 %19 = shl nuw i32 %18, 2 23 %20 = add i32 %19, -4 24 %21 = lshr i32 %20, 2 25 %22 = add nuw nsw i32 %21, 1 26 br i1 %16, label %23, label %32 27 28 23: ; preds = %11 29 %24 = add i32 %9, -1 30 %25 = and i32 %9, 2 31 %26 = icmp ult i32 %24, 3 32 %27 = add i32 %9, -4 33 %28 = sub i32 %27, %25 34 %29 = lshr i32 %28, 2 35 %30 = add nuw nsw i32 %29, 1 36 br i1 %26, label %49, label %31 37 38 31: ; preds = %23 39 %start1 = call i32 @llvm.start.loop.iterations.i32(i32 %30) 40 br label %65 41 42 32: ; preds = %11 43 %start2 = call i32 @llvm.start.loop.iterations.i32(i32 %22) 44 br label %33 45 46 33: ; preds = %33, %32 47 %34 = phi i32* [ %46, %33 ], [ %0, %32 ] 48 %35 = phi i32* [ %45, %33 ], [ %1, %32 ] 49 %36 = phi i32 [ %start2, %32 ], [ %47, %33 ] 50 %37 = phi i32 [ %9, %32 ], [ %41, %33 ] 51 %38 = bitcast i32* %34 to <4 x i32>* 52 %39 = bitcast i32* %35 to <4 x i32>* 53 %40 = call <4 x i1> @llvm.arm.mve.vctp32(i32 %37) 54 %41 = sub i32 %37, 4 55 %42 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %39, i32 4, <4 x i1> %40, <4 x i32> undef) 56 %43 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %38, i32 4, <4 x i1> %40, <4 x i32> undef) 57 %44 = mul nsw <4 x i32> %43, %42 58 call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %44, <4 x i32>* %38, i32 4, <4 x i1> %40) 59 %45 = getelementptr i32, i32* %35, i32 4 60 %46 = getelementptr i32, i32* %34, i32 4 61 %47 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %36, i32 1) 62 %48 = icmp ne i32 %47, 0 63 br i1 %48, label %33, label %64 64 65 49: ; preds = %65, %23 66 %50 = phi i32 [ 0, %23 ], [ %107, %65 ] 67 %51 = icmp eq i32 %25, 0 68 br i1 %51, label %64, label %52 69 70 52: ; preds = %49 71 %53 = getelementptr inbounds i32, i32* %1, i32 %50 72 %54 = load i32, i32* %53, align 4 73 %55 = getelementptr inbounds i32, i32* %0, i32 %50 74 %56 = load i32, i32* %55, align 4 75 %57 = mul nsw i32 %56, %54 76 store i32 %57, i32* %55, align 4 77 %58 = add nuw i32 %50, 1 78 %59 = getelementptr inbounds i32, i32* %1, i32 %58 79 %60 = load i32, i32* %59, align 4 80 %61 = getelementptr inbounds i32, i32* %0, i32 %58 81 %62 = load i32, i32* %61, align 4 82 %63 = mul nsw i32 %62, %60 83 store i32 %63, i32* %61, align 4 84 br label %64 85 86 64: ; preds = %33, %52, %49, %4 87 ret void 88 89 65: ; preds = %65, %31 90 %66 = phi i32 [ %108, %65 ], [ 0, %31 ] 91 %67 = phi i32 [ 0, %31 ], [ %107, %65 ] 92 %68 = phi i32 [ %start1, %31 ], [ %109, %65 ] 93 %69 = bitcast i32* %0 to i8* 94 %70 = bitcast i32* %1 to i8* 95 %71 = getelementptr i8, i8* %70, i32 %66 96 %72 = bitcast i8* %71 to i32* 97 %73 = bitcast i32* %72 to i32* 98 %74 = load i32, i32* %73, align 4 99 %75 = getelementptr i8, i8* %69, i32 %66 100 %76 = bitcast i8* %75 to i32* 101 %77 = bitcast i32* %76 to i32* 102 %78 = load i32, i32* %77, align 4 103 %79 = mul nsw i32 %78, %74 104 store i32 %79, i32* %77, align 4 105 %80 = getelementptr i8, i8* %70, i32 %66 106 %81 = bitcast i8* %80 to i32* 107 %82 = getelementptr i32, i32* %81, i32 1 108 %83 = load i32, i32* %82, align 4 109 %84 = getelementptr i8, i8* %69, i32 %66 110 %85 = bitcast i8* %84 to i32* 111 %86 = getelementptr i32, i32* %85, i32 1 112 %87 = load i32, i32* %86, align 4 113 %88 = mul nsw i32 %87, %83 114 store i32 %88, i32* %86, align 4 115 %89 = getelementptr i8, i8* %70, i32 %66 116 %90 = bitcast i8* %89 to i32* 117 %91 = getelementptr i32, i32* %90, i32 2 118 %92 = load i32, i32* %91, align 4 119 %93 = getelementptr i8, i8* %69, i32 %66 120 %94 = bitcast i8* %93 to i32* 121 %95 = getelementptr i32, i32* %94, i32 2 122 %96 = load i32, i32* %95, align 4 123 %97 = mul nsw i32 %96, %92 124 store i32 %97, i32* %95, align 4 125 %98 = getelementptr i8, i8* %70, i32 %66 126 %99 = bitcast i8* %98 to i32* 127 %100 = getelementptr i32, i32* %99, i32 3 128 %101 = load i32, i32* %100, align 4 129 %102 = getelementptr i8, i8* %69, i32 %66 130 %103 = bitcast i8* %102 to i32* 131 %104 = getelementptr i32, i32* %103, i32 3 132 %105 = load i32, i32* %104, align 4 133 %106 = mul nsw i32 %105, %101 134 store i32 %106, i32* %104, align 4 135 %107 = add nuw i32 %67, 4 136 %108 = add i32 %66, 16 137 %109 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %68, i32 1) 138 %110 = icmp ne i32 %109, 0 139 br i1 %110, label %65, label %49 140 } 141 142 declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32 immarg, <4 x i1>, <4 x i32>) #1 143 declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32 immarg, <4 x i1>) #2 144 declare i32 @llvm.start.loop.iterations.i32(i32) #3 145 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #3 146 declare <4 x i1> @llvm.arm.mve.vctp32(i32) #4 147 148... 149--- 150name: multi_cond_iter_count 151alignment: 2 152tracksRegLiveness: true 153registers: [] 154liveins: 155 - { reg: '$r0', virtual-reg: '' } 156 - { reg: '$r1', virtual-reg: '' } 157 - { reg: '$r2', virtual-reg: '' } 158 - { reg: '$r3', virtual-reg: '' } 159frameInfo: 160 stackSize: 32 161 offsetAdjustment: -24 162 maxAlignment: 4 163fixedStack: [] 164stack: 165 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 166 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 167 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 168 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 169 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 170 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 171 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 172 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 173 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 174 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 175 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 176 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 177 - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 178 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 179 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 180 - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 181 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 182 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 183 - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 184 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 185 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 186 - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 187 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 188 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 189callSites: [] 190constants: [] 191machineFunctionInfo: {} 192body: | 193 ; CHECK-LABEL: name: multi_cond_iter_count 194 ; CHECK: bb.0 (%ir-block.4): 195 ; CHECK: successors: %bb.4(0x30000000), %bb.1(0x50000000) 196 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r8, $r9, $r10 197 ; CHECK: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 198 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 20 199 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 200 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 201 ; CHECK: frame-setup CFI_INSTRUCTION offset $r6, -12 202 ; CHECK: frame-setup CFI_INSTRUCTION offset $r5, -16 203 ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -20 204 ; CHECK: dead $r7 = frame-setup tADDrSPi $sp, 3, 14 /* CC::al */, $noreg 205 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa $r7, 8 206 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r8, killed $r9, killed $r10 207 ; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -24 208 ; CHECK: frame-setup CFI_INSTRUCTION offset $r9, -28 209 ; CHECK: frame-setup CFI_INSTRUCTION offset $r8, -32 210 ; CHECK: tCMPi8 renamable $r3, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 211 ; CHECK: $r12 = tMOVr $r3, 14 /* CC::al */, $noreg 212 ; CHECK: t2IT 1, 8, implicit-def $itstate 213 ; CHECK: $r12 = t2MOVi 4, 1 /* CC::ne */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 214 ; CHECK: tCMPi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr 215 ; CHECK: t2IT 0, 8, implicit-def $itstate 216 ; CHECK: $r12 = t2MOVi 1, 0 /* CC::eq */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 217 ; CHECK: renamable $r3 = t2LSLrr killed renamable $r2, killed renamable $r12, 14 /* CC::al */, $noreg, def $cpsr 218 ; CHECK: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr 219 ; CHECK: bb.1 (%ir-block.11): 220 ; CHECK: successors: %bb.2(0x55555555), %bb.5(0x2aaaaaab) 221 ; CHECK: liveins: $r0, $r1, $r3 222 ; CHECK: renamable $r2 = t2ADDrs renamable $r1, renamable $r3, 18, 14 /* CC::al */, $noreg, $noreg 223 ; CHECK: tCMPr killed renamable $r2, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 224 ; CHECK: t2IT 8, 4, implicit-def $itstate 225 ; CHECK: renamable $r2 = t2ADDrs renamable $r0, renamable $r3, 18, 8 /* CC::hi */, $cpsr, $noreg, implicit $itstate 226 ; CHECK: tCMPr killed renamable $r2, renamable $r1, 8 /* CC::hi */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate 227 ; CHECK: tBcc %bb.5, 8 /* CC::hi */, killed $cpsr 228 ; CHECK: bb.2 (%ir-block.32): 229 ; CHECK: successors: %bb.3(0x80000000) 230 ; CHECK: liveins: $r0, $r1, $r3 231 ; CHECK: $r2 = tMOVr $r0, 14 /* CC::al */, $noreg 232 ; CHECK: $lr = MVE_DLSTP_32 killed renamable $r3 233 ; CHECK: bb.3 (%ir-block.33): 234 ; CHECK: successors: %bb.3(0x7c000000), %bb.4(0x04000000) 235 ; CHECK: liveins: $lr, $r0, $r1, $r2 236 ; CHECK: renamable $r1, renamable $q0 = MVE_VLDRWU32_post killed renamable $r1, 16, 0, $noreg 237 ; CHECK: renamable $r2, renamable $q1 = MVE_VLDRWU32_post killed renamable $r2, 16, 0, $noreg 238 ; CHECK: renamable $q0 = nsw MVE_VMULi32 killed renamable $q1, killed renamable $q0, 0, $noreg, undef renamable $q0 239 ; CHECK: MVE_VSTRWU32 killed renamable $q0, killed renamable $r0, 0, 0, killed $noreg 240 ; CHECK: $r0 = tMOVr $r2, 14 /* CC::al */, $noreg 241 ; CHECK: $lr = MVE_LETP killed renamable $lr, %bb.3 242 ; CHECK: bb.4 (%ir-block.64): 243 ; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r10 244 ; CHECK: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 245 ; CHECK: bb.5 (%ir-block.23): 246 ; CHECK: successors: %bb.6(0x40000000), %bb.7(0x40000000) 247 ; CHECK: liveins: $r0, $r1, $r3 248 ; CHECK: renamable $r2, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 249 ; CHECK: renamable $r12 = t2ANDri renamable $r3, 2, 14 /* CC::al */, $noreg, $noreg 250 ; CHECK: tCMPi8 killed renamable $r2, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 251 ; CHECK: tBcc %bb.7, 2 /* CC::hs */, killed $cpsr 252 ; CHECK: bb.6: 253 ; CHECK: successors: %bb.9(0x80000000) 254 ; CHECK: liveins: $r0, $r1, $r12 255 ; CHECK: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 256 ; CHECK: tB %bb.9, 14 /* CC::al */, $noreg 257 ; CHECK: bb.7 (%ir-block.31): 258 ; CHECK: successors: %bb.8(0x80000000) 259 ; CHECK: liveins: $r0, $r1, $r3, $r12 260 ; CHECK: renamable $r2 = t2BICri killed renamable $r3, 2, 14 /* CC::al */, $noreg, $noreg 261 ; CHECK: renamable $r3, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg 262 ; CHECK: renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 4, 14 /* CC::al */, $noreg 263 ; CHECK: renamable $lr = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r2, 19, 14 /* CC::al */, $noreg, $noreg 264 ; CHECK: renamable $r2, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 265 ; CHECK: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 266 ; CHECK: $lr = t2DLS killed renamable $lr 267 ; CHECK: bb.8 (%ir-block.65): 268 ; CHECK: successors: %bb.8(0x7c000000), %bb.9(0x04000000) 269 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r3, $r12 270 ; CHECK: renamable $r4 = tLDRr renamable $r1, $r2, 14 /* CC::al */, $noreg 271 ; CHECK: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 272 ; CHECK: renamable $r5 = tLDRr renamable $r0, $r2, 14 /* CC::al */, $noreg 273 ; CHECK: renamable $r4, dead $cpsr = nsw tMUL killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg 274 ; CHECK: renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r2, 14 /* CC::al */, $noreg 275 ; CHECK: $r10, $r8 = t2LDRDi8 $r5, 4, 14 /* CC::al */, $noreg 276 ; CHECK: renamable $r9 = t2LDRi12 renamable $r5, 12, 14 /* CC::al */, $noreg 277 ; CHECK: tSTRr killed renamable $r4, renamable $r0, $r2, 14 /* CC::al */, $noreg 278 ; CHECK: renamable $r4, dead $cpsr = tADDrr renamable $r1, renamable $r2, 14 /* CC::al */, $noreg 279 ; CHECK: renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 16, 14 /* CC::al */, $noreg 280 ; CHECK: renamable $r6 = tLDRi renamable $r4, 1, 14 /* CC::al */, $noreg 281 ; CHECK: renamable $r6 = nsw t2MUL killed renamable $r10, killed renamable $r6, 14 /* CC::al */, $noreg 282 ; CHECK: tSTRi killed renamable $r6, renamable $r5, 1, 14 /* CC::al */, $noreg 283 ; CHECK: renamable $r6 = tLDRi renamable $r4, 2, 14 /* CC::al */, $noreg 284 ; CHECK: renamable $r6 = nsw t2MUL killed renamable $r8, killed renamable $r6, 14 /* CC::al */, $noreg 285 ; CHECK: tSTRi killed renamable $r6, renamable $r5, 2, 14 /* CC::al */, $noreg 286 ; CHECK: renamable $r4 = tLDRi killed renamable $r4, 3, 14 /* CC::al */, $noreg 287 ; CHECK: renamable $r4 = nsw t2MUL killed renamable $r9, killed renamable $r4, 14 /* CC::al */, $noreg 288 ; CHECK: tSTRi killed renamable $r4, killed renamable $r5, 3, 14 /* CC::al */, $noreg 289 ; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.8 290 ; CHECK: bb.9 (%ir-block.49): 291 ; CHECK: successors: %bb.4(0x40000000), %bb.10(0x40000000) 292 ; CHECK: liveins: $r0, $r1, $r3, $r12 293 ; CHECK: t2CMPri killed renamable $r12, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 294 ; CHECK: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr 295 ; CHECK: bb.10 (%ir-block.52): 296 ; CHECK: liveins: $r0, $r1, $r3 297 ; CHECK: renamable $r12 = t2LDRs renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg 298 ; CHECK: renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg 299 ; CHECK: renamable $r12 = nsw t2MUL killed renamable $r2, killed renamable $r12, 14 /* CC::al */, $noreg 300 ; CHECK: renamable $r2, dead $cpsr = tADDi3 renamable $r3, 1, 14 /* CC::al */, $noreg 301 ; CHECK: renamable $lr = t2LDRs renamable $r0, renamable $r2, 2, 14 /* CC::al */, $noreg 302 ; CHECK: t2STRs killed renamable $r12, renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg 303 ; CHECK: renamable $r1 = t2LDRs killed renamable $r1, renamable $r2, 2, 14 /* CC::al */, $noreg 304 ; CHECK: renamable $r1 = nsw t2MUL killed renamable $lr, killed renamable $r1, 14 /* CC::al */, $noreg 305 ; CHECK: t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r2, 2, 14 /* CC::al */, $noreg 306 ; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r10 307 ; CHECK: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 308 bb.0 (%ir-block.4): 309 successors: %bb.4(0x30000000), %bb.1(0x50000000) 310 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r10 311 312 frame-setup tPUSH 14, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 313 frame-setup CFI_INSTRUCTION def_cfa_offset 20 314 frame-setup CFI_INSTRUCTION offset $lr, -4 315 frame-setup CFI_INSTRUCTION offset $r7, -8 316 frame-setup CFI_INSTRUCTION offset $r6, -12 317 frame-setup CFI_INSTRUCTION offset $r5, -16 318 frame-setup CFI_INSTRUCTION offset $r4, -20 319 $r7 = frame-setup tADDrSPi $sp, 3, 14, $noreg 320 frame-setup CFI_INSTRUCTION def_cfa $r7, 8 321 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r8, killed $r9, killed $r10 322 frame-setup CFI_INSTRUCTION offset $r10, -24 323 frame-setup CFI_INSTRUCTION offset $r9, -28 324 frame-setup CFI_INSTRUCTION offset $r8, -32 325 tCMPi8 renamable $r3, 2, 14, $noreg, implicit-def $cpsr 326 $r12 = tMOVr $r3, 14, $noreg 327 t2IT 1, 8, implicit-def $itstate 328 $r12 = t2MOVi 4, 1, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 329 tCMPi8 killed renamable $r3, 4, 14, $noreg, implicit-def $cpsr 330 t2IT 0, 8, implicit-def $itstate 331 $r12 = t2MOVi 1, 0, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 332 renamable $r3 = t2LSLrr killed renamable $r2, killed renamable $r12, 14, $noreg, def $cpsr 333 tBcc %bb.4, 0, killed $cpsr 334 335 bb.1 (%ir-block.11): 336 successors: %bb.2(0x80000000), %bb.5(0x40000000) 337 liveins: $r0, $r1, $r3 338 339 renamable $r2 = t2ADDrs renamable $r1, renamable $r3, 18, 14, $noreg, $noreg 340 tCMPr killed renamable $r2, renamable $r0, 14, $noreg, implicit-def $cpsr 341 t2IT 8, 4, implicit-def $itstate 342 renamable $r2 = t2ADDrs renamable $r0, renamable $r3, 18, 8, $cpsr, $noreg, implicit $itstate 343 tCMPr killed renamable $r2, renamable $r1, 8, killed $cpsr, implicit-def $cpsr, implicit killed $itstate 344 tBcc %bb.5, 8, killed $cpsr 345 346 bb.2 (%ir-block.32): 347 successors: %bb.3(0x80000000) 348 liveins: $r0, $r1, $r3 349 350 renamable $r2, dead $cpsr = tADDi3 renamable $r3, 3, 14, $noreg 351 renamable $r2 = t2BICri killed renamable $r2, 3, 14, $noreg, $noreg 352 renamable $r12 = t2SUBri killed renamable $r2, 4, 14, $noreg, $noreg 353 renamable $r2, dead $cpsr = tMOVi8 1, 14, $noreg 354 renamable $lr = nuw nsw t2ADDrs killed renamable $r2, killed renamable $r12, 19, 14, $noreg, $noreg 355 $r2 = tMOVr $r0, 14, $noreg 356 $lr = t2DoLoopStart renamable $lr 357 358 bb.3 (%ir-block.33): 359 successors: %bb.3(0x7c000000), %bb.4(0x04000000) 360 liveins: $lr, $r0, $r1, $r2, $r3 361 362 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg 363 MVE_VPST 4, implicit $vpr 364 renamable $r1, renamable $q0 = MVE_VLDRWU32_post killed renamable $r1, 16, 1, renamable $vpr 365 renamable $r2, renamable $q1 = MVE_VLDRWU32_post killed renamable $r2, 16, 1, renamable $vpr 366 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 367 renamable $q0 = nsw MVE_VMULi32 killed renamable $q1, killed renamable $q0, 0, $noreg, undef renamable $q0 368 MVE_VPST 8, implicit $vpr 369 MVE_VSTRWU32 killed renamable $q0, killed renamable $r0, 0, 1, killed renamable $vpr 370 renamable $lr = t2LoopDec killed renamable $lr, 1 371 $r0 = tMOVr $r2, 14, $noreg 372 t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr 373 tB %bb.4, 14, $noreg 374 375 bb.4 (%ir-block.64): 376 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r10 377 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 378 379 bb.5 (%ir-block.23): 380 successors: %bb.6(0x40000000), %bb.7(0x40000000) 381 liveins: $r0, $r1, $r3 382 383 renamable $r2, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 384 renamable $r12 = t2ANDri renamable $r3, 2, 14, $noreg, $noreg 385 tCMPi8 killed renamable $r2, 3, 14, $noreg, implicit-def $cpsr 386 tBcc %bb.7, 2, killed $cpsr 387 388 bb.6: 389 successors: %bb.9(0x80000000) 390 liveins: $r0, $r1, $r12 391 392 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 393 tB %bb.9, 14, $noreg 394 395 bb.7 (%ir-block.31): 396 successors: %bb.8(0x80000000) 397 liveins: $r0, $r1, $r3, $r12 398 399 renamable $r2 = t2BICri killed renamable $r3, 2, 14, $noreg, $noreg 400 renamable $r3, dead $cpsr = tMOVi8 1, 14, $noreg 401 renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 4, 14, $noreg 402 renamable $lr = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r2, 19, 14, $noreg, $noreg 403 renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg 404 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 405 $lr = t2DoLoopStart renamable $lr 406 407 bb.8 (%ir-block.65): 408 successors: %bb.8(0x7c000000), %bb.9(0x04000000) 409 liveins: $lr, $r0, $r1, $r2, $r3, $r12 410 411 renamable $r4 = tLDRr renamable $r1, $r2, 14, $noreg 412 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14, $noreg 413 renamable $r5 = tLDRr renamable $r0, $r2, 14, $noreg 414 renamable $lr = t2LoopDec killed renamable $lr, 1 415 renamable $r4, dead $cpsr = nsw tMUL killed renamable $r5, killed renamable $r4, 14, $noreg 416 renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r2, 14, $noreg 417 $r10, $r8 = t2LDRDi8 $r5, 4, 14, $noreg 418 renamable $r9 = t2LDRi12 renamable $r5, 12, 14, $noreg 419 tSTRr killed renamable $r4, renamable $r0, $r2, 14, $noreg 420 renamable $r4, dead $cpsr = tADDrr renamable $r1, renamable $r2, 14, $noreg 421 renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 16, 14, $noreg 422 renamable $r6 = tLDRi renamable $r4, 1, 14, $noreg 423 renamable $r6 = nsw t2MUL killed renamable $r10, killed renamable $r6, 14, $noreg 424 tSTRi killed renamable $r6, renamable $r5, 1, 14, $noreg 425 renamable $r6 = tLDRi renamable $r4, 2, 14, $noreg 426 renamable $r6 = nsw t2MUL killed renamable $r8, killed renamable $r6, 14, $noreg 427 tSTRi killed renamable $r6, renamable $r5, 2, 14, $noreg 428 renamable $r4 = tLDRi killed renamable $r4, 3, 14, $noreg 429 renamable $r4 = nsw t2MUL killed renamable $r9, killed renamable $r4, 14, $noreg 430 tSTRi killed renamable $r4, killed renamable $r5, 3, 14, $noreg 431 t2LoopEnd renamable $lr, %bb.8, implicit-def dead $cpsr 432 tB %bb.9, 14, $noreg 433 434 bb.9 (%ir-block.49): 435 successors: %bb.4(0x40000000), %bb.10(0x40000000) 436 liveins: $r0, $r1, $r3, $r12 437 438 t2CMPri killed renamable $r12, 0, 14, $noreg, implicit-def $cpsr 439 tBcc %bb.4, 0, killed $cpsr 440 441 bb.10 (%ir-block.52): 442 liveins: $r0, $r1, $r3 443 444 renamable $r12 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg 445 renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg 446 renamable $r12 = nsw t2MUL killed renamable $r2, killed renamable $r12, 14, $noreg 447 renamable $r2, dead $cpsr = tADDi3 renamable $r3, 1, 14, $noreg 448 renamable $lr = t2LDRs renamable $r0, renamable $r2, 2, 14, $noreg 449 t2STRs killed renamable $r12, renamable $r0, killed renamable $r3, 2, 14, $noreg 450 renamable $r1 = t2LDRs killed renamable $r1, renamable $r2, 2, 14, $noreg 451 renamable $r1 = nsw t2MUL killed renamable $lr, killed renamable $r1, 14, $noreg 452 t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r2, 2, 14, $noreg 453 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r10 454 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 455 456... 457