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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -run-pass regallocfast %s -o - | FileCheck %s
3
4# This test examines register allocation and spilling with Fast Register
5# Allocator. The test uses inline assembler that requests an input variable to
6# be loaded in a high register but at the same time has r12 marked as clobbered.
7# The allocator initially satisfies the load request by selecting r12 but then
8# needs to spill this register when it reaches the INLINEASM instruction and
9# notices its clobber definition.
10#
11# The test checks that the compiler is able to spill a register from the hGPR
12# class in Thumb2 by inserting the t2STRi12/t2LDRi12 instructions.
13
14--- |
15  ; ModuleID = 'test.ll'
16  source_filename = "test.c"
17  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
18  target triple = "thumbv7m-none-unknown-eabi"
19
20  define dso_local void @constraint_h() {
21  entry:
22    %i = alloca i32, align 4
23    %0 = load i32, i32* %i, align 4
24    call void asm sideeffect "@ $0", "h,~{r12}"(i32 %0)
25    ret void
26  }
27
28...
29---
30name:            constraint_h
31tracksRegLiveness: true
32registers:
33  - { id: 0, class: hgpr }
34  - { id: 1, class: tgpr }
35stack:
36  - { id: 0, name: i, size: 4, alignment: 4, stack-id: default, local-offset: -4 }
37body:             |
38  bb.0.entry:
39    ; CHECK-LABEL: name: constraint_h
40    ; CHECK: renamable $r0 = tLDRspi %stack.0.i, 0, 14 /* CC::al */, $noreg :: (dereferenceable load 4 from %ir.i)
41    ; CHECK: renamable $r8 = COPY killed renamable $r0
42    ; CHECK: INLINEASM &"@ $0", 1 /* sideeffect attdialect */, 589833 /* reguse:GPRnopc */, killed renamable $r8, 12 /* clobber */, implicit-def dead early-clobber $r12
43    ; CHECK: tBX_RET 14 /* CC::al */, $noreg
44    %1:tgpr = tLDRspi %stack.0.i, 0, 14, $noreg :: (dereferenceable load 4 from %ir.i)
45    %0:hgpr = COPY %1
46    INLINEASM &"@ $0", 1, 589833, %0, 12, implicit-def early-clobber $r12
47    tBX_RET 14, $noreg
48
49...
50