1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv7m-none-eabi -run-pass=if-converter -o - %s | FileCheck %s 3 4--- | 5 define i32 @f1(i32 %x) #0 { ret i32 %x } 6 define i32 @f2(i32 %x) #0 { ret i32 %x } 7 define i32 @f3(i32 %x) #0 { ret i32 %x } 8 declare i32 @fn(i32 %x) #0 9 10 attributes #0 = { minsize nounwind optsize } 11 12... 13--- 14name: f1 15tracksRegLiveness: true 16liveins: 17 - { reg: '$r0', virtual-reg: '' } 18stack: 19 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 20 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, 21 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 22 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 23 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 24 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 25body: | 26 ; CHECK-LABEL: name: f1 27 ; CHECK: bb.0: 28 ; CHECK: liveins: $r0, $lr, $r7 29 ; CHECK: t2CMPri killed renamable $r0, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 30 ; CHECK: tBX_RET 1 /* CC::ne */, killed $cpsr 31 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr 32 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 33 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 34 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 35 ; CHECK: $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 36 ; CHECK: tBL 14 /* CC::al */, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 37 ; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr 38 ; CHECK: tBX_RET 14 /* CC::al */, $noreg 39 bb.0: 40 successors: %bb.1(0x40000000), %bb.2(0x40000000) 41 liveins: $r0, $lr, $r7 42 43 t2CMPri killed renamable $r0, 1, 14, $noreg, implicit-def $cpsr 44 t2Bcc %bb.2, 1, killed $cpsr 45 46 bb.1: 47 liveins: $r7, $lr 48 49 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr 50 frame-setup CFI_INSTRUCTION def_cfa_offset 8 51 frame-setup CFI_INSTRUCTION offset $lr, -4 52 frame-setup CFI_INSTRUCTION offset $r7, -8 53 $r0 = t2MOVi 0, 14, $noreg, $noreg 54 tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 55 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr 56 tBX_RET 14, $noreg 57 58 bb.2: 59 liveins: $lr, $r7 60 61 tBX_RET 14, $noreg 62 63... 64--- 65name: f2 66tracksRegLiveness: true 67liveins: 68 - { reg: '$r0', virtual-reg: '' } 69stack: 70 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 71 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, 72 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 73 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 74 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 75 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 76body: | 77 ; CHECK-LABEL: name: f2 78 ; CHECK: bb.0: 79 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 80 ; CHECK: liveins: $r0, $lr, $r7 81 ; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 82 ; CHECK: t2Bcc %bb.2, 1 /* CC::ne */, killed $cpsr 83 ; CHECK: bb.1: 84 ; CHECK: liveins: $r7, $lr 85 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr 86 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 87 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 88 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 89 ; CHECK: $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 90 ; CHECK: tBL 14 /* CC::al */, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 91 ; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr 92 ; CHECK: tBX_RET 14 /* CC::al */, $noreg 93 ; CHECK: bb.2: 94 ; CHECK: liveins: $lr, $r7 95 ; CHECK: tBX_RET 14 /* CC::al */, $noreg 96 bb.0: 97 successors: %bb.1(0x40000000), %bb.2(0x40000000) 98 liveins: $r0, $lr, $r7 99 100 t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr 101 t2Bcc %bb.2, 1, killed $cpsr 102 103 bb.1: 104 liveins: $r7, $lr 105 106 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr 107 frame-setup CFI_INSTRUCTION def_cfa_offset 8 108 frame-setup CFI_INSTRUCTION offset $lr, -4 109 frame-setup CFI_INSTRUCTION offset $r7, -8 110 $r0 = t2MOVi 0, 14, $noreg, $noreg 111 tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 112 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr 113 tBX_RET 14, $noreg 114 115 bb.2: 116 liveins: $lr, $r7 117 118 tBX_RET 14, $noreg 119 120... 121--- 122name: f3 123tracksRegLiveness: true 124liveins: 125 - { reg: '$r0', virtual-reg: '' } 126stack: 127 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 128 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, 129 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 130 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 131 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 132 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 133body: | 134 ; CHECK-LABEL: name: f3 135 ; CHECK: bb.0: 136 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 137 ; CHECK: liveins: $r0, $lr, $r7 138 ; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 139 ; CHECK: $r1 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 140 ; CHECK: t2Bcc %bb.2, 1 /* CC::ne */, killed $cpsr 141 ; CHECK: bb.1: 142 ; CHECK: liveins: $r7, $lr 143 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr 144 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 145 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 146 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 147 ; CHECK: $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 148 ; CHECK: tBL 14 /* CC::al */, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 149 ; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr 150 ; CHECK: tBX_RET 14 /* CC::al */, $noreg 151 ; CHECK: bb.2: 152 ; CHECK: liveins: $lr, $r7 153 ; CHECK: tBX_RET 14 /* CC::al */, $noreg 154 bb.0: 155 successors: %bb.1(0x40000000), %bb.2(0x40000000) 156 liveins: $r0, $lr, $r7 157 158 t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr 159 $r1 = t2MOVi 0, 14, $noreg, $noreg 160 t2Bcc %bb.2, 1, killed $cpsr 161 162 bb.1: 163 liveins: $r7, $lr 164 165 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr 166 frame-setup CFI_INSTRUCTION def_cfa_offset 8 167 frame-setup CFI_INSTRUCTION offset $lr, -4 168 frame-setup CFI_INSTRUCTION offset $r7, -8 169 $r0 = t2MOVi 0, 14, $noreg, $noreg 170 tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 171 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr 172 tBX_RET 14, $noreg 173 174 bb.2: 175 liveins: $lr, $r7 176 177 tBX_RET 14, $noreg 178 179... 180