1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: opt -instcombine -mtriple=thumbv8.1m.main-none-eabi %s | llc -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve --verify-machineinstrs -o - | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 5 6define arm_aapcs_vfpcc <8 x i16> @test_vpt_block(<8 x i16> %v_inactive, <8 x i16> %v1, <8 x i16> %v2, <8 x i16> %v3) { 7; CHECK-LABEL: test_vpt_block: 8; CHECK: @ %bb.0: @ %entry 9; CHECK-NEXT: vpt.i16 eq, q1, q2 10; CHECK-NEXT: vaddt.i16 q0, q3, q2 11; CHECK-NEXT: bx lr 12entry: 13 %0 = icmp eq <8 x i16> %v1, %v2 14 %1 = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %0) 15 %2 = trunc i32 %1 to i16 16 %3 = zext i16 %2 to i32 17 %4 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %3) 18 %5 = call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %v3, <8 x i16> %v2, <8 x i1> %4, <8 x i16> %v_inactive) 19 ret <8 x i16> %5 20} 21 22define arm_aapcs_vfpcc <8 x i16> @test_vpnot(<8 x i16> %v, <8 x i16> %w, <8 x i16> %x, i32 %n) { 23; CHECK-LABEL: test_vpnot: 24; CHECK: @ %bb.0: @ %entry 25; CHECK-NEXT: vctp.16 r0 26; CHECK-NEXT: vpnot 27; CHECK-NEXT: vpst 28; CHECK-NEXT: vaddt.i16 q0, q1, q2 29; CHECK-NEXT: bx lr 30entry: 31 %0 = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n) 32 %1 = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %0) 33 %2 = trunc i32 %1 to i16 34 %3 = xor i16 %2, -1 35 %4 = zext i16 %3 to i32 36 %5 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %4) 37 %6 = call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %w, <8 x i16> %x, <8 x i1> %5, <8 x i16> %v) 38 ret <8 x i16> %6 39} 40 41declare i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1>) 42declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) 43declare <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>) 44declare <8 x i1> @llvm.arm.mve.vctp16(i32) 45