1; RUN: llc < %s -fast-isel -mattr=+simd128,+sign-ext -verify-machineinstrs 2 3;; Ensures fastisel produces valid code when storing and loading split 4;; up v2i64 values. Lowering away v2i64s is a temporary measure while 5;; V8 does not have support for i64x2.* operations, and is done when 6;; -wasm-enable-unimplemented-simd is not present. This is a 7;; regression test for a bug that crashed llc after fastisel produced 8;; machineinstrs that used registers that had never been defined. 9 10target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 11target triple = "wasm32-unknown-unknown" 12 13define i64 @foo(<2 x i64> %vec) { 14entry: 15 %vec.addr = alloca <2 x i64>, align 16 16 store <2 x i64> %vec, <2 x i64>* %vec.addr, align 16 17 %0 = load <2 x i64>, <2 x i64>* %vec.addr, align 16 18 %1 = extractelement <2 x i64> %0, i32 0 19 ret i64 %1 20} 21