1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128 | FileCheck %s 2 3; Test that operations that are not supported by SIMD are properly 4; unrolled. 5 6target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 7target triple = "wasm32-unknown-unknown" 8 9; ============================================================================== 10; 16 x i8 11; ============================================================================== 12 13; CHECK-LABEL: ctlz_v16i8: 14; CHECK: i32.clz 15declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) 16define <16 x i8> @ctlz_v16i8(<16 x i8> %x) { 17 %v = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x, i1 false) 18 ret <16 x i8> %v 19} 20 21; CHECK-LABEL: ctlz_v16i8_undef: 22; CHECK: i32.clz 23define <16 x i8> @ctlz_v16i8_undef(<16 x i8> %x) { 24 %v = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x, i1 true) 25 ret <16 x i8> %v 26} 27 28; CHECK-LABEL: cttz_v16i8: 29; CHECK: i32.ctz 30declare <16 x i8> @llvm.cttz.v16i8(<16 x i8>, i1) 31define <16 x i8> @cttz_v16i8(<16 x i8> %x) { 32 %v = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %x, i1 false) 33 ret <16 x i8> %v 34} 35 36; CHECK-LABEL: cttz_v16i8_undef: 37; CHECK: i32.ctz 38define <16 x i8> @cttz_v16i8_undef(<16 x i8> %x) { 39 %v = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %x, i1 true) 40 ret <16 x i8> %v 41} 42 43; CHECK-LABEL: ctpop_v16i8: 44; Note: expansion does not use i32.popcnt 45; CHECK: v128.and 46declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) 47define <16 x i8> @ctpop_v16i8(<16 x i8> %x) { 48 %v = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %x) 49 ret <16 x i8> %v 50} 51 52; CHECK-LABEL: sdiv_v16i8: 53; CHECK: i32.div_s 54define <16 x i8> @sdiv_v16i8(<16 x i8> %x, <16 x i8> %y) { 55 %v = sdiv <16 x i8> %x, %y 56 ret <16 x i8> %v 57} 58 59; CHECK-LABEL: udiv_v16i8: 60; CHECK: i32.div_u 61define <16 x i8> @udiv_v16i8(<16 x i8> %x, <16 x i8> %y) { 62 %v = udiv <16 x i8> %x, %y 63 ret <16 x i8> %v 64} 65 66; CHECK-LABEL: srem_v16i8: 67; CHECK: i32.rem_s 68define <16 x i8> @srem_v16i8(<16 x i8> %x, <16 x i8> %y) { 69 %v = srem <16 x i8> %x, %y 70 ret <16 x i8> %v 71} 72 73; CHECK-LABEL: urem_v16i8: 74; CHECK: i32.rem_u 75define <16 x i8> @urem_v16i8(<16 x i8> %x, <16 x i8> %y) { 76 %v = urem <16 x i8> %x, %y 77 ret <16 x i8> %v 78} 79 80; CHECK-LABEL: rotl_v16i8: 81; Note: expansion does not use i32.rotl 82; CHECK: i32.shl 83declare <16 x i8> @llvm.fshl.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) 84define <16 x i8> @rotl_v16i8(<16 x i8> %x, <16 x i8> %y) { 85 %v = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %y) 86 ret <16 x i8> %v 87} 88 89; CHECK-LABEL: rotr_v16i8: 90; Note: expansion does not use i32.rotr 91; CHECK: i32.shr_u 92declare <16 x i8> @llvm.fshr.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) 93define <16 x i8> @rotr_v16i8(<16 x i8> %x, <16 x i8> %y) { 94 %v = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %y) 95 ret <16 x i8> %v 96} 97 98; ============================================================================== 99; 8 x i16 100; ============================================================================== 101 102; CHECK-LABEL: ctlz_v8i16: 103; CHECK: i32.clz 104declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) 105define <8 x i16> @ctlz_v8i16(<8 x i16> %x) { 106 %v = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x, i1 false) 107 ret <8 x i16> %v 108} 109 110; CHECK-LABEL: ctlz_v8i16_undef: 111; CHECK: i32.clz 112define <8 x i16> @ctlz_v8i16_undef(<8 x i16> %x) { 113 %v = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x, i1 true) 114 ret <8 x i16> %v 115} 116 117; CHECK-LABEL: cttz_v8i16: 118; CHECK: i32.ctz 119declare <8 x i16> @llvm.cttz.v8i16(<8 x i16>, i1) 120define <8 x i16> @cttz_v8i16(<8 x i16> %x) { 121 %v = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %x, i1 false) 122 ret <8 x i16> %v 123} 124 125; CHECK-LABEL: cttz_v8i16_undef: 126; CHECK: i32.ctz 127define <8 x i16> @cttz_v8i16_undef(<8 x i16> %x) { 128 %v = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %x, i1 true) 129 ret <8 x i16> %v 130} 131 132; CHECK-LABEL: ctpop_v8i16: 133; Note: expansion does not use i32.popcnt 134; CHECK: v128.and 135declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>) 136define <8 x i16> @ctpop_v8i16(<8 x i16> %x) { 137 %v = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %x) 138 ret <8 x i16> %v 139} 140 141; CHECK-LABEL: sdiv_v8i16: 142; CHECK: i32.div_s 143define <8 x i16> @sdiv_v8i16(<8 x i16> %x, <8 x i16> %y) { 144 %v = sdiv <8 x i16> %x, %y 145 ret <8 x i16> %v 146} 147 148; CHECK-LABEL: udiv_v8i16: 149; CHECK: i32.div_u 150define <8 x i16> @udiv_v8i16(<8 x i16> %x, <8 x i16> %y) { 151 %v = udiv <8 x i16> %x, %y 152 ret <8 x i16> %v 153} 154 155; CHECK-LABEL: srem_v8i16: 156; CHECK: i32.rem_s 157define <8 x i16> @srem_v8i16(<8 x i16> %x, <8 x i16> %y) { 158 %v = srem <8 x i16> %x, %y 159 ret <8 x i16> %v 160} 161 162; CHECK-LABEL: urem_v8i16: 163; CHECK: i32.rem_u 164define <8 x i16> @urem_v8i16(<8 x i16> %x, <8 x i16> %y) { 165 %v = urem <8 x i16> %x, %y 166 ret <8 x i16> %v 167} 168 169; CHECK-LABEL: rotl_v8i16: 170; Note: expansion does not use i32.rotl 171; CHECK: i32.shl 172declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) 173define <8 x i16> @rotl_v8i16(<8 x i16> %x, <8 x i16> %y) { 174 %v = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %y) 175 ret <8 x i16> %v 176} 177 178; CHECK-LABEL: rotr_v8i16: 179; Note: expansion does not use i32.rotr 180; CHECK: i32.shr_u 181declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) 182define <8 x i16> @rotr_v8i16(<8 x i16> %x, <8 x i16> %y) { 183 %v = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %y) 184 ret <8 x i16> %v 185} 186 187; ============================================================================== 188; 4 x i32 189; ============================================================================== 190 191; CHECK-LABEL: ctlz_v4i32: 192; CHECK: i32.clz 193declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) 194define <4 x i32> @ctlz_v4i32(<4 x i32> %x) { 195 %v = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x, i1 false) 196 ret <4 x i32> %v 197} 198 199; CHECK-LABEL: ctlz_v4i32_undef: 200; CHECK: i32.clz 201define <4 x i32> @ctlz_v4i32_undef(<4 x i32> %x) { 202 %v = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x, i1 true) 203 ret <4 x i32> %v 204} 205 206; CHECK-LABEL: cttz_v4i32: 207; CHECK: i32.ctz 208declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1) 209define <4 x i32> @cttz_v4i32(<4 x i32> %x) { 210 %v = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %x, i1 false) 211 ret <4 x i32> %v 212} 213 214; CHECK-LABEL: cttz_v4i32_undef: 215; CHECK: i32.ctz 216define <4 x i32> @cttz_v4i32_undef(<4 x i32> %x) { 217 %v = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %x, i1 true) 218 ret <4 x i32> %v 219} 220 221; CHECK-LABEL: ctpop_v4i32: 222; Note: expansion does not use i32.popcnt 223; CHECK: v128.and 224declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>) 225define <4 x i32> @ctpop_v4i32(<4 x i32> %x) { 226 %v = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %x) 227 ret <4 x i32> %v 228} 229 230; CHECK-LABEL: sdiv_v4i32: 231; CHECK: i32.div_s 232define <4 x i32> @sdiv_v4i32(<4 x i32> %x, <4 x i32> %y) { 233 %v = sdiv <4 x i32> %x, %y 234 ret <4 x i32> %v 235} 236 237; CHECK-LABEL: udiv_v4i32: 238; CHECK: i32.div_u 239define <4 x i32> @udiv_v4i32(<4 x i32> %x, <4 x i32> %y) { 240 %v = udiv <4 x i32> %x, %y 241 ret <4 x i32> %v 242} 243 244; CHECK-LABEL: srem_v4i32: 245; CHECK: i32.rem_s 246define <4 x i32> @srem_v4i32(<4 x i32> %x, <4 x i32> %y) { 247 %v = srem <4 x i32> %x, %y 248 ret <4 x i32> %v 249} 250 251; CHECK-LABEL: urem_v4i32: 252; CHECK: i32.rem_u 253define <4 x i32> @urem_v4i32(<4 x i32> %x, <4 x i32> %y) { 254 %v = urem <4 x i32> %x, %y 255 ret <4 x i32> %v 256} 257 258; CHECK-LABEL: rotl_v4i32: 259; Note: expansion does not use i32.rotl 260; CHECK: i32.shl 261declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) 262define <4 x i32> @rotl_v4i32(<4 x i32> %x, <4 x i32> %y) { 263 %v = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %y) 264 ret <4 x i32> %v 265} 266 267; CHECK-LABEL: rotr_v4i32: 268; Note: expansion does not use i32.rotr 269; CHECK: i32.shr_u 270declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) 271define <4 x i32> @rotr_v4i32(<4 x i32> %x, <4 x i32> %y) { 272 %v = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %y) 273 ret <4 x i32> %v 274} 275 276; ============================================================================== 277; 2 x i64 278; ============================================================================== 279 280; CHECK-LABEL: ctlz_v2i64: 281; CHECK: i64.clz 282declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) 283define <2 x i64> @ctlz_v2i64(<2 x i64> %x) { 284 %v = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x, i1 false) 285 ret <2 x i64> %v 286} 287 288; CHECK-LABEL: ctlz_v2i64_undef: 289; CHECK: i64.clz 290define <2 x i64> @ctlz_v2i64_undef(<2 x i64> %x) { 291 %v = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x, i1 true) 292 ret <2 x i64> %v 293} 294 295; CHECK-LABEL: cttz_v2i64: 296; CHECK: i64.ctz 297declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1) 298define <2 x i64> @cttz_v2i64(<2 x i64> %x) { 299 %v = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %x, i1 false) 300 ret <2 x i64> %v 301} 302 303; CHECK-LABEL: cttz_v2i64_undef: 304; CHECK: i64.ctz 305define <2 x i64> @cttz_v2i64_undef(<2 x i64> %x) { 306 %v = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %x, i1 true) 307 ret <2 x i64> %v 308} 309 310; CHECK-LABEL: ctpop_v2i64: 311; Note: expansion does not use i64.popcnt 312; CHECK: v128.and 313declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) 314define <2 x i64> @ctpop_v2i64(<2 x i64> %x) { 315 %v = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %x) 316 ret <2 x i64> %v 317} 318 319; CHECK-LABEL: sdiv_v2i64: 320; CHECK: i64.div_s 321define <2 x i64> @sdiv_v2i64(<2 x i64> %x, <2 x i64> %y) { 322 %v = sdiv <2 x i64> %x, %y 323 ret <2 x i64> %v 324} 325 326; CHECK-LABEL: udiv_v2i64: 327; CHECK: i64.div_u 328define <2 x i64> @udiv_v2i64(<2 x i64> %x, <2 x i64> %y) { 329 %v = udiv <2 x i64> %x, %y 330 ret <2 x i64> %v 331} 332 333; CHECK-LABEL: srem_v2i64: 334; CHECK: i64.rem_s 335define <2 x i64> @srem_v2i64(<2 x i64> %x, <2 x i64> %y) { 336 %v = srem <2 x i64> %x, %y 337 ret <2 x i64> %v 338} 339 340; CHECK-LABEL: urem_v2i64: 341; CHECK: i64.rem_u 342define <2 x i64> @urem_v2i64(<2 x i64> %x, <2 x i64> %y) { 343 %v = urem <2 x i64> %x, %y 344 ret <2 x i64> %v 345} 346 347; CHECK-LABEL: rotl_v2i64: 348; Note: expansion does not use i64.rotl 349; CHECK: i64.shl 350declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) 351define <2 x i64> @rotl_v2i64(<2 x i64> %x, <2 x i64> %y) { 352 %v = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %y) 353 ret <2 x i64> %v 354} 355 356; CHECK-LABEL: rotr_v2i64: 357; Note: expansion does not use i64.rotr 358; CHECK: i64.shr_u 359declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) 360define <2 x i64> @rotr_v2i64(<2 x i64> %x, <2 x i64> %y) { 361 %v = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %y) 362 ret <2 x i64> %v 363} 364 365; ============================================================================== 366; 4 x f32 367; ============================================================================== 368 369; CHECK-LABEL: ceil_v4f32: 370; CHECK: f32.ceil 371declare <4 x float> @llvm.ceil.v4f32(<4 x float>) 372define <4 x float> @ceil_v4f32(<4 x float> %x) { 373 %v = call <4 x float> @llvm.ceil.v4f32(<4 x float> %x) 374 ret <4 x float> %v 375} 376 377; CHECK-LABEL: floor_v4f32: 378; CHECK: f32.floor 379declare <4 x float> @llvm.floor.v4f32(<4 x float>) 380define <4 x float> @floor_v4f32(<4 x float> %x) { 381 %v = call <4 x float> @llvm.floor.v4f32(<4 x float> %x) 382 ret <4 x float> %v 383} 384 385; CHECK-LABEL: trunc_v4f32: 386; CHECK: f32.trunc 387declare <4 x float> @llvm.trunc.v4f32(<4 x float>) 388define <4 x float> @trunc_v4f32(<4 x float> %x) { 389 %v = call <4 x float> @llvm.trunc.v4f32(<4 x float> %x) 390 ret <4 x float> %v 391} 392 393; CHECK-LABEL: nearbyint_v4f32: 394; CHECK: f32.nearest 395declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>) 396define <4 x float> @nearbyint_v4f32(<4 x float> %x) { 397 %v = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %x) 398 ret <4 x float> %v 399} 400 401; CHECK-LABEL: copysign_v4f32: 402; CHECK: f32.copysign 403declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>) 404define <4 x float> @copysign_v4f32(<4 x float> %x, <4 x float> %y) { 405 %v = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> %y) 406 ret <4 x float> %v 407} 408 409; CHECK-LABEL: sin_v4f32: 410; CHECK: call $push[[L:[0-9]+]]=, sinf 411declare <4 x float> @llvm.sin.v4f32(<4 x float>) 412define <4 x float> @sin_v4f32(<4 x float> %x) { 413 %v = call <4 x float> @llvm.sin.v4f32(<4 x float> %x) 414 ret <4 x float> %v 415} 416 417; CHECK-LABEL: cos_v4f32: 418; CHECK: call $push[[L:[0-9]+]]=, cosf 419declare <4 x float> @llvm.cos.v4f32(<4 x float>) 420define <4 x float> @cos_v4f32(<4 x float> %x) { 421 %v = call <4 x float> @llvm.cos.v4f32(<4 x float> %x) 422 ret <4 x float> %v 423} 424 425; CHECK-LABEL: powi_v4f32: 426; CHECK: call $push[[L:[0-9]+]]=, __powisf2 427declare <4 x float> @llvm.powi.v4f32(<4 x float>, i32) 428define <4 x float> @powi_v4f32(<4 x float> %x, i32 %y) { 429 %v = call <4 x float> @llvm.powi.v4f32(<4 x float> %x, i32 %y) 430 ret <4 x float> %v 431} 432 433; CHECK-LABEL: pow_v4f32: 434; CHECK: call $push[[L:[0-9]+]]=, powf 435declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>) 436define <4 x float> @pow_v4f32(<4 x float> %x, <4 x float> %y) { 437 %v = call <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> %y) 438 ret <4 x float> %v 439} 440 441; CHECK-LABEL: log_v4f32: 442; CHECK: call $push[[L:[0-9]+]]=, logf 443declare <4 x float> @llvm.log.v4f32(<4 x float>) 444define <4 x float> @log_v4f32(<4 x float> %x) { 445 %v = call <4 x float> @llvm.log.v4f32(<4 x float> %x) 446 ret <4 x float> %v 447} 448 449; CHECK-LABEL: log2_v4f32: 450; CHECK: call $push[[L:[0-9]+]]=, log2f 451declare <4 x float> @llvm.log2.v4f32(<4 x float>) 452define <4 x float> @log2_v4f32(<4 x float> %x) { 453 %v = call <4 x float> @llvm.log2.v4f32(<4 x float> %x) 454 ret <4 x float> %v 455} 456 457; CHECK-LABEL: log10_v4f32: 458; CHECK: call $push[[L:[0-9]+]]=, log10f 459declare <4 x float> @llvm.log10.v4f32(<4 x float>) 460define <4 x float> @log10_v4f32(<4 x float> %x) { 461 %v = call <4 x float> @llvm.log10.v4f32(<4 x float> %x) 462 ret <4 x float> %v 463} 464 465; CHECK-LABEL: exp_v4f32: 466; CHECK: call $push[[L:[0-9]+]]=, expf 467declare <4 x float> @llvm.exp.v4f32(<4 x float>) 468define <4 x float> @exp_v4f32(<4 x float> %x) { 469 %v = call <4 x float> @llvm.exp.v4f32(<4 x float> %x) 470 ret <4 x float> %v 471} 472 473; CHECK-LABEL: exp2_v4f32: 474; CHECK: call $push[[L:[0-9]+]]=, exp2f 475declare <4 x float> @llvm.exp2.v4f32(<4 x float>) 476define <4 x float> @exp2_v4f32(<4 x float> %x) { 477 %v = call <4 x float> @llvm.exp2.v4f32(<4 x float> %x) 478 ret <4 x float> %v 479} 480 481; CHECK-LABEL: rint_v4f32: 482; CHECK: f32.nearest 483declare <4 x float> @llvm.rint.v4f32(<4 x float>) 484define <4 x float> @rint_v4f32(<4 x float> %x) { 485 %v = call <4 x float> @llvm.rint.v4f32(<4 x float> %x) 486 ret <4 x float> %v 487} 488 489; CHECK-LABEL: round_v4f32: 490; CHECK: call $push[[L:[0-9]+]]=, roundf 491declare <4 x float> @llvm.round.v4f32(<4 x float>) 492define <4 x float> @round_v4f32(<4 x float> %x) { 493 %v = call <4 x float> @llvm.round.v4f32(<4 x float> %x) 494 ret <4 x float> %v 495} 496 497; ============================================================================== 498; 2 x f64 499; ============================================================================== 500 501; CHECK-LABEL: ceil_v2f64: 502; CHECK: f64.ceil 503declare <2 x double> @llvm.ceil.v2f64(<2 x double>) 504define <2 x double> @ceil_v2f64(<2 x double> %x) { 505 %v = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x) 506 ret <2 x double> %v 507} 508 509; CHECK-LABEL: floor_v2f64: 510; CHECK: f64.floor 511declare <2 x double> @llvm.floor.v2f64(<2 x double>) 512define <2 x double> @floor_v2f64(<2 x double> %x) { 513 %v = call <2 x double> @llvm.floor.v2f64(<2 x double> %x) 514 ret <2 x double> %v 515} 516 517; CHECK-LABEL: trunc_v2f64: 518; CHECK: f64.trunc 519declare <2 x double> @llvm.trunc.v2f64(<2 x double>) 520define <2 x double> @trunc_v2f64(<2 x double> %x) { 521 %v = call <2 x double> @llvm.trunc.v2f64(<2 x double> %x) 522 ret <2 x double> %v 523} 524 525; CHECK-LABEL: nearbyint_v2f64: 526; CHECK: f64.nearest 527declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>) 528define <2 x double> @nearbyint_v2f64(<2 x double> %x) { 529 %v = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %x) 530 ret <2 x double> %v 531} 532 533; CHECK-LABEL: copysign_v2f64: 534; CHECK: f64.copysign 535declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>) 536define <2 x double> @copysign_v2f64(<2 x double> %x, <2 x double> %y) { 537 %v = call <2 x double> @llvm.copysign.v2f64(<2 x double> %x, <2 x double> %y) 538 ret <2 x double> %v 539} 540 541; CHECK-LABEL: sin_v2f64: 542; CHECK: call $push[[L:[0-9]+]]=, sin 543declare <2 x double> @llvm.sin.v2f64(<2 x double>) 544define <2 x double> @sin_v2f64(<2 x double> %x) { 545 %v = call <2 x double> @llvm.sin.v2f64(<2 x double> %x) 546 ret <2 x double> %v 547} 548 549; CHECK-LABEL: cos_v2f64: 550; CHECK: call $push[[L:[0-9]+]]=, cos 551declare <2 x double> @llvm.cos.v2f64(<2 x double>) 552define <2 x double> @cos_v2f64(<2 x double> %x) { 553 %v = call <2 x double> @llvm.cos.v2f64(<2 x double> %x) 554 ret <2 x double> %v 555} 556 557; CHECK-LABEL: powi_v2f64: 558; CHECK: call $push[[L:[0-9]+]]=, __powidf2 559declare <2 x double> @llvm.powi.v2f64(<2 x double>, i32) 560define <2 x double> @powi_v2f64(<2 x double> %x, i32 %y) { 561 %v = call <2 x double> @llvm.powi.v2f64(<2 x double> %x, i32 %y) 562 ret <2 x double> %v 563} 564 565; CHECK-LABEL: pow_v2f64: 566; CHECK: call $push[[L:[0-9]+]]=, pow 567declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>) 568define <2 x double> @pow_v2f64(<2 x double> %x, <2 x double> %y) { 569 %v = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> %y) 570 ret <2 x double> %v 571} 572 573; CHECK-LABEL: log_v2f64: 574; CHECK: call $push[[L:[0-9]+]]=, log 575declare <2 x double> @llvm.log.v2f64(<2 x double>) 576define <2 x double> @log_v2f64(<2 x double> %x) { 577 %v = call <2 x double> @llvm.log.v2f64(<2 x double> %x) 578 ret <2 x double> %v 579} 580 581; CHECK-LABEL: log2_v2f64: 582; CHECK: call $push[[L:[0-9]+]]=, log2 583declare <2 x double> @llvm.log2.v2f64(<2 x double>) 584define <2 x double> @log2_v2f64(<2 x double> %x) { 585 %v = call <2 x double> @llvm.log2.v2f64(<2 x double> %x) 586 ret <2 x double> %v 587} 588 589; CHECK-LABEL: log10_v2f64: 590; CHECK: call $push[[L:[0-9]+]]=, log10 591declare <2 x double> @llvm.log10.v2f64(<2 x double>) 592define <2 x double> @log10_v2f64(<2 x double> %x) { 593 %v = call <2 x double> @llvm.log10.v2f64(<2 x double> %x) 594 ret <2 x double> %v 595} 596 597; CHECK-LABEL: exp_v2f64: 598; CHECK: call $push[[L:[0-9]+]]=, exp 599declare <2 x double> @llvm.exp.v2f64(<2 x double>) 600define <2 x double> @exp_v2f64(<2 x double> %x) { 601 %v = call <2 x double> @llvm.exp.v2f64(<2 x double> %x) 602 ret <2 x double> %v 603} 604 605; CHECK-LABEL: exp2_v2f64: 606; CHECK: call $push[[L:[0-9]+]]=, exp2 607declare <2 x double> @llvm.exp2.v2f64(<2 x double>) 608define <2 x double> @exp2_v2f64(<2 x double> %x) { 609 %v = call <2 x double> @llvm.exp2.v2f64(<2 x double> %x) 610 ret <2 x double> %v 611} 612 613; CHECK-LABEL: rint_v2f64: 614; CHECK: f64.nearest 615declare <2 x double> @llvm.rint.v2f64(<2 x double>) 616define <2 x double> @rint_v2f64(<2 x double> %x) { 617 %v = call <2 x double> @llvm.rint.v2f64(<2 x double> %x) 618 ret <2 x double> %v 619} 620 621; CHECK-LABEL: round_v2f64: 622; CHECK: call $push[[L:[0-9]+]]=, round 623declare <2 x double> @llvm.round.v2f64(<2 x double>) 624define <2 x double> @round_v2f64(<2 x double> %x) { 625 %v = call <2 x double> @llvm.round.v2f64(<2 x double> %x) 626 ret <2 x double> %v 627} 628