1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s 3 4define void @test_amx(i8* %pointer, i8* %base, i64 %stride) { 5; CHECK-LABEL: test_amx: 6; CHECK: # %bb.0: 7 call void @llvm.x86.ldtilecfg(i8* %pointer) 8; CHECK-NEXT: ldtilecfg (%rdi) 9 10 call void @llvm.x86.sttilecfg(i8* %pointer) 11; CHECK-NEXT: sttilecfg (%rdi) 12 13 call void @llvm.x86.tilerelease() 14; CHECK-NEXT: tilerelease 15 16 call void @llvm.x86.tilezero(i8 3) 17; CHECK-NEXT: tilezero %tmm3 18 19 call void @llvm.x86.tileloadd64(i8 3, i8* %base, i64 %stride) 20; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm3 21 22 call void @llvm.x86.tileloaddt164(i8 3, i8* %base, i64 %stride) 23; CHECK-NEXT: tileloaddt1 (%rsi,%rdx), %tmm3 24 25 call void @llvm.x86.tilestored64(i8 3, i8* %base, i64 %stride) 26; CHECK-NEXT: tilestored %tmm3, (%rsi,%rdx) 27 ret void 28} 29 30declare void @llvm.x86.tileloadd64(i8 %tile, i8* %base, i64 %stride) 31declare void @llvm.x86.tileloaddt164(i8 %tile, i8* %base, i64 %stride) 32declare void @llvm.x86.tilestored64(i8 %tile, i8* %base, i64 %stride) 33declare void @llvm.x86.ldtilecfg(i8* %pointer) 34declare void @llvm.x86.sttilecfg(i8* %pointer) 35declare void @llvm.x86.tilerelease() 36declare void @llvm.x86.tilezero(i8 %tile) 37