• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X64
3# RUN: llc -O0 -mtriple=i386-linux-gnu  -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*'  %s 2>%t -o - | FileCheck %s --check-prefix=X32
4# RUN: FileCheck -check-prefix=ERR32  %s < %t
5
6# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %7:_(s32), %8:_(s1) = G_UADDO %3:_, %5:_ (in function: test_add_i64)
7
8--- |
9
10  define void @test_add_i1() { ret void}
11  define void @test_add_i32() { ret void }
12  define void @test_add_i64() { ret void }
13
14...
15---
16name:            test_add_i1
17# CHECK-LABEL: name:  test_add_i1
18alignment:       16
19legalized:       false
20regBankSelected: false
21registers:
22  - { id: 0, class: _, preferred-register: '' }
23  - { id: 1, class: _, preferred-register: '' }
24  - { id: 2, class: _, preferred-register: '' }
25# CHECK:          %0(s32) = COPY $edx
26# CHECK-NEXT:     %3(s8) = G_TRUNC %0(s32)
27# CHECK-NEXT:     %4(s8) = G_TRUNC %0(s32)
28# CHECK-NEXT:     %5(s8) = G_ADD %3, %4
29# CHECK:     RET 0
30body:             |
31  bb.1 (%ir-block.0):
32
33    ; X64-LABEL: name: test_add_i1
34    ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
35    ; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
36    ; X64: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
37    ; X64: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
38    ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
39    ; X64: $eax = COPY [[ANYEXT]](s32)
40    ; X64: RET 0
41    ; X32-LABEL: name: test_add_i1
42    ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
43    ; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
44    ; X32: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
45    ; X32: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
46    ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
47    ; X32: $eax = COPY [[ANYEXT]](s32)
48    ; X32: RET 0
49    %0(s32) = COPY $edx
50    %1(s1) = G_TRUNC %0(s32)
51    %2(s1) = G_ADD %1, %1
52    %3:_(s32) = G_ANYEXT %2
53    $eax = COPY %3
54    RET 0
55...
56---
57name:            test_add_i32
58alignment:       16
59legalized:       false
60regBankSelected: false
61registers:
62  - { id: 0, class: _ }
63  - { id: 1, class: _ }
64  - { id: 2, class: _ }
65body:             |
66  bb.1 (%ir-block.0):
67    ; X64-LABEL: name: test_add_i32
68    ; X64: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
69    ; X64: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
70    ; X64: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
71    ; X64: $eax = COPY [[ADD]](s32)
72    ; X64: RET 0
73    ; X32-LABEL: name: test_add_i32
74    ; X32: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
75    ; X32: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
76    ; X32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
77    ; X32: $eax = COPY [[ADD]](s32)
78    ; X32: RET 0
79    %0(s32) = IMPLICIT_DEF
80    %1(s32) = IMPLICIT_DEF
81    %2(s32) = G_ADD %0, %1
82    $eax = COPY %2
83    RET 0
84
85...
86---
87name:            test_add_i64
88alignment:       16
89legalized:       false
90regBankSelected: false
91registers:
92  - { id: 0, class: _ }
93  - { id: 1, class: _ }
94  - { id: 2, class: _ }
95body:             |
96  bb.1 (%ir-block.0):
97    ; X64-LABEL: name: test_add_i64
98    ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
99    ; X64: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
100    ; X64: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[DEF]], [[DEF1]]
101    ; X64: $rax = COPY [[ADD]](s64)
102    ; X64: RET 0
103    ; X32-LABEL: name: test_add_i64
104    ; X32: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
105    ; X32: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
106    ; X32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
107    ; X32: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
108    ; X32: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]
109    ; X32: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
110    ; X32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)
111    ; X32: $rax = COPY [[MV]](s64)
112    ; X32: RET 0
113    %0(s64) = IMPLICIT_DEF
114    %1(s64) = IMPLICIT_DEF
115    %2(s64) = G_ADD %0, %1
116    $rax = COPY %2
117    RET 0
118
119...
120